📄 c8051f360.inc
字号:
;-----------------------------------------------------------------------------
; C8051F360.INC
;-----------------------------------------------------------------------------
; Copyright 2006 Silicon Laboratories, Inc.
; http://www.silabs.com
;
; Program Description:
;
; Register/bit definitions for the C8051F36x/F37x product family.
;
;
; FID:
; Target: C8051F360, F361, F362, F363, F364, F365, F366, F367, F368
; C8051F370, F371, F372, F373
; Tool chain: Keil
; Command Line: None
;
;
; Release 1.0
; -Initial Release (TP)
; -29 MAR 2006
;
;-----------------------------------------------------------------------------
; Byte Registers
;-----------------------------------------------------------------------------
P0 DATA 080H ; Port 0 latch
SP DATA 081H ; Stack pointer
DPL DATA 082H ; Data pointer low
DPH DATA 083H ; Data pointer high
CCH0CN DATA 084H ; Cache control
SFRNEXT DATA 085H ; SFR stack next page
SFRLAST DATA 086H ; SFR stack last page
PCON DATA 087H ; Power control
TCON DATA 088H ; Timer/counter control
TMOD DATA 089H ; Timer/counter mode
TL0 DATA 08AH ; Timer/counter 0 low
TL1 DATA 08BH ; Timer/counter 1 low
TH0 DATA 08CH ; Timer/counter 0 high
TH1 DATA 08DH ; Timer/counter 1 high
CKCON DATA 08EH ; Clock control
PSCTL DATA 08FH ; Program store R/W control
CLKSEL DATA 08FH ; Clock select
P1 DATA 090H ; Port 1 latch
TMR3CN DATA 091H ; Timer/counter 3 control
TMR3RLL DATA 092H ; Timer/counter 3 reload low
TMR3RLH DATA 093H ; Timer/counter 3 reload high
TMR3L DATA 094H ; Timer/counter 3 low
TMR3H DATA 095H ; Timer/counter 3 high
IDA0L DATA 096H ; Current mode DAC0 low
IDA0H DATA 097H ; Current mode DAC0 high
SCON0 DATA 098H ; UART0 control
SBUF0 DATA 099H ; UART0 data buffer
CPT1CN DATA 09AH ; Comparator1 control
CPT0CN DATA 09BH ; Comparator0 control
CPT1MD DATA 09CH ; Comparator1 mode selection
CPT0MD DATA 09DH ; Comparator0 mode selection
CPT1MX DATA 09EH ; Comparator1 mux selection
CPT0MX DATA 09FH ; Comparator0 mux selection
P2 DATA 0A0H ; Port 2 latch
SPI0CFG DATA 0A1H ; SPI0 configuration
SPI0CKR DATA 0A2H ; SPI0 clock rate control
SPI0DAT DATA 0A3H ; SPI0 data
MAC0AL DATA 0A4H ; MAC0 A register low byte
P0MDOUT DATA 0A4H ; Port 0 output mode configuration
MAC0AH DATA 0A5H ; MAC0 A register high byte
P1MDOUT DATA 0A5H ; Port 1 output mode configuration
P2MDOUT DATA 0A6H ; Port 2 output mode configuration
SFRPAGE DATA 0A7H ; SFR page select
IE DATA 0A8H ; Interrupt enable
PLL0DIV DATA 0A9H ; PLL divider
EMI0CN DATA 0AAH ; External memory interface control
FLSTAT DATA 0ACH ; Flash status
OSCLCN DATA 0ADH ; Low-frequency oscillator control
MAC0RNDL DATA 0AEH ; MAC0 rounding register low byte
P4MDOUT DATA 0AEH ; Port 4 output mode configuration
MAC0RNDH DATA 0AFH ; MAC0 rounding register high byte
P3MDOUT DATA 0AFH ; Port 3 output mode configuration
P3 DATA 0B0H ; Port 3 latch
P2MAT DATA 0B1H ; Port 2 match
PLL0MUL DATA 0B1H ; PLL multiplier
P2MASK DATA 0B2H ; Port 2 mask
PLL0FLT DATA 0B2H ; PLL filter
PLL0CN DATA 0B3H ; PLL control
P4 DATA 0B5H ; Port 4 latch
FLSCL DATA 0B6H ; Flash scale
OSCXCN DATA 0B6H ; External oscillator control
FLKEY DATA 0B7H ; Flash lock and key
OSCICN DATA 0B7H ; Internal oscillator control
IP DATA 0B8H ; Interrupt priority
IDA0CN DATA 0B9H ; Current mode DAC0 control
AMX0N DATA 0BAH ; AMUX0 negative channel select
AMX0P DATA 0BBH ; AMUX0 positive channel select
ADC0CF DATA 0BCH ; ADC0 configuration
ADC0L DATA 0BDH ; ADC0 data low
ADC0H DATA 0BEH ; ADC0 data high
OSCICL DATA 0BFH ; Internal oscillator calibration
SMB0CN DATA 0C0H ; SMBus0 control
SMB0CF DATA 0C1H ; SMBus0 configuration
SMB0DAT DATA 0C2H ; SMBus0 data
ADC0GTL DATA 0C3H ; ADC0 window greater than low byte
ADC0GTH DATA 0C4H ; ADC0 window greater than high byte
ADC0LTL DATA 0C5H ; ADC0 window less than low byte
ADC0LTH DATA 0C6H ; ADC0 window less than high byte
ONESHOT DATA 0C7H ; Flash oneshot timing
EMI0CF DATA 0C7H ; EMIF configuration
TMR2CN DATA 0C8H ; Timer/counter 2 control
CCH0TN DATA 0C9H ; Cache tuning
TMR2RLL DATA 0CAH ; Timer/counter 2 reload low
TMR2RLH DATA 0CBH ; Timer/counter 2 reload high
TMR2L DATA 0CCH ; Timer/counter 2 low
TMR2H DATA 0CDH ; Timer/counter 2 high
EIP1 DATA 0CEH ; Extended interrupt priority 1
MAC0STA DATA 0CFH ; MAC0 status
EIP2 DATA 0CFH ; Extended interrupt priority 2
PSW DATA 0D0H ; Program status word
REF0CN DATA 0D1H ; Voltage reference control
MAC0ACC0 DATA 0D2H ; MAC0 accumulator byte 0
CCH0LC DATA 0D2H ; Cache lock
MAC0ACC1 DATA 0D3H ; MAC0 accumulator byte 1
CCH0MA DATA 0D3H ; Cache miss accumulator
MAC0ACC2 DATA 0D4H ; MAC0 accumulator byte 2
P0SKIP DATA 0D4H ; Port 0 skip
MAC0ACC3 DATA 0D5H ; MAC0 accumulator byte 3
P1SKIP DATA 0D5H ; Port 1 skip
MAC0OVR DATA 0D6H ; MAC0 accumulator overflow byte
P2SKIP DATA 0D6H ; Port 2 skip
MAC0CF DATA 0D7H ; MAC0 configuration register
P3SKIP DATA 0D7H ; Port 3 skip
PCA0CN DATA 0D8H ; PCA0 control
PCA0MD DATA 0D9H ; PCA0 mode
PCA0CPM0 DATA 0DAH ; PCA0 module 0 mode
PCA0CPM1 DATA 0DBH ; PCA0 module 1 mode
PCA0CPM2 DATA 0DCH ; PCA0 module 2 mode
PCA0CPM3 DATA 0DDH ; PCA0 module 3 mode
PCA0CPM4 DATA 0DEH ; PCA0 module 4 mode
PCA0CPM5 DATA 0DFH ; PCA0 module 5 mode
ACC DATA 0E0H ; Accumulator
P1MAT DATA 0E1H ; Port 1 match
XBR0 DATA 0E1H ; Port I/O crossbar control 0
P1MASK DATA 0E2H ; Port 1 mask
XBR1 DATA 0E2H ; Port I/O crossbar control 1
IT01CF DATA 0E4H ; INT0/INT1 configuration
SFR0CN DATA 0E5H ; SFR page control
EIE1 DATA 0E6H ; Extended interrupt enable 1
EIE2 DATA 0E7H ; Extended interrupt enable 2
ADC0CN DATA 0E8H ; ADC0 control
PCA0CPL1 DATA 0E9H ; PCA0 module 1 capture low
PCA0CPH1 DATA 0EAH ; PCA0 module 1 capture high
PCA0CPL2 DATA 0EBH ; PCA0 module 2 capture low
PCA0CPH2 DATA 0ECH ; PCA0 module 2 capture high
PCA0CPL3 DATA 0EDH ; PCA0 module 3 capture low
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -