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📄 otg_dev.c

📁 s3c6410基于USB OTG下载内核至NORFLASH的源代码
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	else
	{
		if (oOtgDev.m_eOpMode == USB_CPU)
		{
			DbgUsb("downloadFileSize!=0, 2nd BYTE_READ_CNT_REG : %x\n", fifoCntByte);
			OTGDEV_RdPktBulkOutEp((u8 *)oOtgDev.m_pDownPt, fifoCntByte);
			oOtgDev.m_pDownPt += fifoCntByte;
			
			OTGDEV_SetOutEpXferSize(EP_TYPE_BULK, 1, oOtgDev.m_uBulkOutEPMaxPktSize);
			Outp32(bulkOut_DOEPCTL, 1u<<31|1<<26|2<<18|1<<15|oOtgDev.m_uBulkOutEPMaxPktSize<<0);		//ep3 enable, clear nak, bulk, usb active, next ep3, max pkt 64
		}
	}
}


//////////
// Function Name : OTGDEV_InitPhyCon
// Function Desctiption : This function initializes OTG Phy.
// Input : NONE
// Output : NONE
// Version :
void OTGDEV_InitPhyCon(void)
{
	Outp32(PHYPWR, 0x0);
	
	//if 48Mhz Oscillator is used
	Outp32(PHYCTRL, 0x20);
	//if 48Mhz X-tal is used
	//Outp32(PHYCTRL, 0x00);

	//if 24Mhz Oscillator is used
	//Outp32(PHYCTRL, 0x23);
	//if 24Mhz X-tal is used
	//Outp32(PHYCTRL, 0x03);

	//if 12Mhz Oscillator is used
	//Outp32(PHYCTRL, 0x22);
	//if 12Mhz X-tal is used
	//Outp32(PHYCTRL, 0x02);
	
	//PHY Tuning
	//Outp32(PHYTUNE, 0x00271B98);
							
	Outp32(RSTCON, 0x1);
	Delay(10);
	Outp32(RSTCON, 0x0);
	Delay(10);
}

//////////
// Function Name : OTGDEV_SoftResetCore
// Function Desctiption : This function soft-resets OTG Core and then unresets again.
// Input : NONE
// Output : NONE
// Version :
void OTGDEV_SoftResetCore(void)
{
	u32 uTemp;

	Outp32(GRSTCTL, CORE_SOFT_RESET);

	do
	{
		uTemp = Inp32(GRSTCTL);
	}while(!(uTemp & AHB_MASTER_IDLE));
	
}

//////////
// Function Name : OTGDEV_WaitCableInsertion
// Function Desctiption : This function checks if the cable is inserted.
// Input : NONE
// Output : NONE
// Version :
void OTGDEV_WaitCableInsertion(void)
{
	u32 uTemp, i=0;
	bool ucFirst=1;

	do
	{
		Delay(10);
		
		uTemp = Inp32(GOTGCTL);

		if (uTemp & (B_SESSION_VALID|A_SESSION_VALID))
		{
			break;
		}
		else if(ucFirst == 1)
		{
			Disp("\nInsert an OTG cable into the connector!\n");
			ucFirst = 0;
		}
		
		if(i%0x400==0)
			DisplayLED(0x1);
		if(i%0x400==0x100)
			DisplayLED(0x2);
		if(i%0x400==0x200)
			DisplayLED(0x4);
		if(i%0x400==0x300)
			DisplayLED(0x8);
		i++;

	}while(1);
}

//////////
// Function Name : OTGDEV_InitCore
// Function Desctiption : This function initializes OTG Link Core.
// Input : NONE
// Output : NONE
// Version :
void OTGDEV_InitCore(void)
{	
	Outp32(GAHBCFG, PTXFE_HALF|NPTXFE_HALF|MODE_SLAVE|BURST_SINGLE|GBL_INT_UNMASK);
	
	Outp32(GUSBCFG, 0<<15			// PHY Low Power Clock sel
					|1<<14			// Non-Periodic TxFIFO Rewind Enable
					|0x5<<10		// Turnaround time
					|0<<9|0<<8		// [0:HNP disable, 1:HNP enable][ 0:SRP disable, 1:SRP enable] H1= 1,1							
					|0<<7			// Ulpi DDR sel
					|0<<6			// 0: high speed utmi+, 1: full speed serial
					|0<<4			// 0: utmi+, 1:ulpi
					|1<<3			// phy i/f  0:8bit, 1:16bit
					|0x7<<0			// HS/FS Timeout*
					);
}

//////////
// Function Name : OTGDEV_CheckCurrentMode
// Function Desctiption : This function checks the current mode.
// Input : pucMode, current mode(device or host)
// Output : NONE
// Version :
void OTGDEV_CheckCurrentMode(u8 *pucMode)
{
	u32 uTemp;

	uTemp = Inp32(GINTSTS);
	*pucMode = uTemp & 0x1;
}

//////////
// Function Name : OTGDEV_SetSoftDisconnect
// Function Desctiption : This function puts the OTG device core in the disconnected state.
// Input : NONE
// Output : NONE
// Version :
void OTGDEV_SetSoftDisconnect(void)
{
	u32 uTemp;

	uTemp = Inp32(DCTL);
	uTemp |= SOFT_DISCONNECT;
	Outp32(DCTL, uTemp);
}

//////////
// Function Name : OTGDEV_ClearSoftDisconnect
// Function Desctiption : This function makes the OTG device core to exit from the disconnected state.
// Input : NONE
// Output : NONE
// Version :
void OTGDEV_ClearSoftDisconnect(void)
{
	u32 uTemp;

	uTemp = Inp32(DCTL);
	uTemp = uTemp & ~SOFT_DISCONNECT;
	Outp32(DCTL, uTemp);
}

//////////
// Function Name : OTGDEV_InitDevice
// Function Desctiption : This function configures OTG Core to initial settings of device mode.
// Input : NONE
// Output : NONE
// Version :
void OTGDEV_InitDevice(void)
{
	Outp32(DCFG, 1<<18|oOtgDev.m_eSpeed<<0);				// [][1: full speed(30Mhz) 0:high speed]

	Outp32(GINTMSK, INT_RESUME|INT_OUT_EP|INT_IN_EP|INT_ENUMDONE|INT_RESET
					|INT_SUSPEND|INT_RX_FIFO_NOT_EMPTY);	//gint unmask	
}



//////////
// Function Name : OTGDEV_SetAllOutEpNak
// Function Desctiption : This function sets NAK bit of all EPs.
// Input : NONE
// Output : NONE
// Version :
void OTGDEV_SetAllOutEpNak(void)
{
	u8 i;
	u32 uTemp;
	
	for(i=0;i<16;i++)
	{
		uTemp = Inp32(DOEPCTL0+0x20*i);
		uTemp |= DEPCTL_SNAK;
		Outp32(DOEPCTL0+0x20*i, uTemp);
	}
}

//////////
// Function Name : OTGDEV_ClearAllOutEpNak
// Function Desctiption : This function clears NAK bit of all EPs.
// Input : NONE
// Output : NONE
// Version :
void OTGDEV_ClearAllOutEpNak(void)
{
	u8 i;
	u32 uTemp;
	
	for(i=0;i<16;i++)
	{
		uTemp = Inp32(DOEPCTL0+0x20*i);
		uTemp |= (DEPCTL_EPENA|DEPCTL_CNAK);
		Outp32(DOEPCTL0+0x20*i, uTemp);
	}
}

//////////
// Function Name : OTGDEV_SetMaxPktSizes
// Function Desctiption : This function sets the max packet sizes of USB transfer types according to the speed.
// Input : eSpeed, usb speed(high or full)
// Output : NONE
// Version :
void OTGDEV_SetMaxPktSizes(USB_SPEED eSpeed)
{
	if (eSpeed == USB_HIGH)
	{
		oOtgDev.m_eSpeed = USB_HIGH;
		oOtgDev.m_uControlEPMaxPktSize = HIGH_SPEED_CONTROL_PKT_SIZE;
		oOtgDev.m_uBulkInEPMaxPktSize = HIGH_SPEED_BULK_PKT_SIZE;
		oOtgDev.m_uBulkOutEPMaxPktSize = HIGH_SPEED_BULK_PKT_SIZE;
	}
	else
	{
		oOtgDev.m_eSpeed = USB_FULL;
		oOtgDev.m_uControlEPMaxPktSize = FULL_SPEED_CONTROL_PKT_SIZE;
		oOtgDev.m_uBulkInEPMaxPktSize = FULL_SPEED_BULK_PKT_SIZE;
		oOtgDev.m_uBulkOutEPMaxPktSize = FULL_SPEED_BULK_PKT_SIZE;
	}
}

//////////
// Function Name : OTEDEV_SetOtherSpeedConfDescTable
// Function Desctiption : This function sets the endpoint-specific CSRs.
// Input : NONE
// Output : NONE
// Version :
void OTEDEV_SetOtherSpeedConfDescTable(u32 length)
{
	// Standard device descriptor
	if (oOtgDev.m_eSpeed == USB_HIGH) 
	{	
	    if (length ==9)
	    {	    
	    	OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, 9);
			Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(CONTROL_EP<<11)|(0<<0));	//ep0 enable, clear nak, next ep0, max 64byte
			OTGDEV_WrPktEp0(((u8 *)&aOtherSpeedConfiguration_full)+0, 9); // EP0_PKT_SIZE
		}
	    else if(length ==32)
		{	    
	    	OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, 32);
			Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(CONTROL_EP<<11)|(0<<0));	//ep0 enable, clear nak, next ep0, max 64byte
			OTGDEV_WrPktEp0(((u8 *)&aOtherSpeedConfiguration_fullTotal)+0, 32); // EP0_PKT_SIZE			
	    }
	}
	else
	{
	    if (length ==9)
	    {	    
	    	OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, 9);
			Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(CONTROL_EP<<11)|(0<<0));	//ep0 enable, clear nak, next ep0, max 64byte
			OTGDEV_WrPktEp0(((u8 *)&aOtherSpeedConfiguration_high)+0, 9); // EP0_PKT_SIZE
		}
	    else if(length ==32)
		{	    
	    	OTGDEV_SetInEpXferSize(EP_TYPE_CONTROL, 1, 32);
			Outp32(DIEPCTL0, (1u<<31)|(1<<26)|(CONTROL_EP<<11)|(0<<0));	//ep0 enable, clear nak, next ep0, max 64byte
			OTGDEV_WrPktEp0(((u8 *)&aOtherSpeedConfiguration_highTotal)+0, 32); // EP0_PKT_SIZE
	    }	 			
	}
	oOtgDev.m_uEp0State = EP0_STATE_INIT;
}

//////////
// Function Name : OTGDEV_SetEndpoint
// Function Desctiption : This function sets the endpoint-specific CSRs.
// Input : NONE
// Output : NONE
// Version :
void OTGDEV_SetEndpoint(void)
{
	// Unmask DAINT source
	Outp32(DIEPINT0, 0xff);
	Outp32(DOEPINT0, 0xff);	
	Outp32(bulkIn_DIEPINT, 0xff);
	Outp32(bulkOut_DOEPINT, 0xff);
	
	// Init For Ep0
	Outp32(DIEPCTL0, ((1<<26)|(CONTROL_EP<<11)|(0<<0)));	//MPS:64bytes
	Outp32(DOEPCTL0, (1u<<31)|(1<<26)|(0<<0));		//ep0 enable, clear nak
}

//////////
// Function Name : OTGDEV_SetDescriptorTable
// Function Desctiption : This function sets the standard descriptors.
// Input : NONE
// Output : NONE
// Version :
void OTGDEV_SetDescriptorTable(void)
{
	// Standard device descriptor
	oOtgDev.m_oDesc.oDescDevice.bLength=DEVICE_DESC_SIZE;	//0x12 
	oOtgDev.m_oDesc.oDescDevice.bDescriptorType=DEVICE_DESCRIPTOR;
	oOtgDev.m_oDesc.oDescDevice.bDeviceClass=0xFF; // 0x0
	oOtgDev.m_oDesc.oDescDevice.bDeviceSubClass=0x0;
	oOtgDev.m_oDesc.oDescDevice.bDeviceProtocol=0x0;
	oOtgDev.m_oDesc.oDescDevice.bMaxPacketSize0=oOtgDev.m_uControlEPMaxPktSize;
	oOtgDev.m_oDesc.oDescDevice.idVendorL=0xE8;	//0x45;
	oOtgDev.m_oDesc.oDescDevice.idVendorH=0x04;	//0x53;
	oOtgDev.m_oDesc.oDescDevice.idProductL=0x34; //0x00
	oOtgDev.m_oDesc.oDescDevice.idProductH=0x12; //0x64
	oOtgDev.m_oDesc.oDescDevice.bcdDeviceL=0x00;
	oOtgDev.m_oDesc.oDescDevice.bcdDeviceH=0x01;
	oOtgDev.m_oDesc.oDescDevice.iManufacturer=0x1; // index of string descriptor
	oOtgDev.m_oDesc.oDescDevice.iProduct=0x2;	// index of string descriptor
	oOtgDev.m_oDesc.oDescDevice.iSerialNumber=0x0;
	oOtgDev.m_oDesc.oDescDevice.bNumConfigurations=0x1;
	
	oOtgDev.m_oDesc.oDescDevice.bcdUSBL=0x00;
	oOtgDev.m_oDesc.oDescDevice.bcdUSBH=0x02; 	// Ver 2.0

	// Standard configuration descriptor
	oOtgDev.m_oDesc.oDescConfig.bLength=CONFIG_DESC_SIZE; // 0x9 bytes
	oOtgDev.m_oDesc.oDescConfig.bDescriptorType=CONFIGURATION_DESCRIPTOR;
	oOtgDev.m_oDesc.oDescConfig.wTotalLengthL=CONFIG_DESC_TOTAL_SIZE; 
	oOtgDev.m_oDesc.oDescConfig.wTotalLengthH=0;
	oOtgDev.m_oDesc.oDescConfig.bNumInterfaces=1;
// dbg    descConf.bConfigurationValue=2; // why 2? There's no reason.
	oOtgDev.m_oDesc.oDescConfig.bConfigurationValue=1;
	oOtgDev.m_oDesc.oDescConfig.iConfiguration=0;
	oOtgDev.m_oDesc.oDescConfig.bmAttributes=CONF_ATTR_DEFAULT|CONF_ATTR_SELFPOWERED; // bus powered only.
	oOtgDev.m_oDesc.oDescConfig.maxPower=25; // draws 50mA current from the USB bus.

	// Standard interface descriptor
	oOtgDev.m_oDesc.oDescInterface.bLength=INTERFACE_DESC_SIZE; // 9
	oOtgDev.m_oDesc.oDescInterface.bDescriptorType=INTERFACE_DESCRIPTOR;
	oOtgDev.m_oDesc.oDescInterface.bInterfaceNumber=0x0;
	oOtgDev.m_oDesc.oDescInterface.bAlternateSetting=0x0; // ?
	oOtgDev.m_oDesc.oDescInterface.bNumEndpoints = 2;	// # of endpoints except EP0
	oOtgDev.m_oDesc.oDescInterface.bInterfaceClass=0xff; // 0x0 ?
	oOtgDev.m_oDesc.oDescInterface.bInterfaceSubClass=0x0;
	oOtgDev.m_oDesc.oDescInterface.bInterfaceProtocol=0x0;
	oOtgDev.m_oDesc.oDescInterface.iInterface=0x0;

	// Standard endpoint0 descriptor
	oOtgDev.m_oDesc.oDescEndpt1.bLength=ENDPOINT_DESC_SIZE;
	oOtgDev.m_oDesc.oDescEndpt1.bDescriptorType=ENDPOINT_DESCRIPTOR;
	oOtgDev.m_oDesc.oDescEndpt1.bEndpointAddress=BULK_IN_EP|EP_ADDR_IN; // 2400Xendpoint 1 is IN endpoint.
	oOtgDev.m_oDesc.oDescEndpt1.bmAttributes=EP_ATTR_BULK;
	oOtgDev.m_oDesc.oDescEndpt1.wMaxPacketSizeL=(u8)oOtgDev.m_uBulkInEPMaxPktSize; // 64
	oOtgDev.m_oDesc.oDescEndpt1.wMaxPacketSizeH=(u8)(oOtgDev.m_uBulkInEPMaxPktSize>>8);
	oOtgDev.m_oDesc.oDescEndpt1.bInterval=0x0; // not used

	// Standard endpoint1 descriptor
	oOtgDev.m_oDesc.oDescEndpt2.bLength=ENDPOINT_DESC_SIZE;
	oOtgDev.m_oDesc.oDescEndpt2.bDescriptorType=ENDPOINT_DESCRIPTOR;
	oOtgDev.m_oDesc.oDescEndpt2.bEndpointAddress=BULK_OUT_EP|EP_ADDR_OUT; // 2400X endpoint 3 is OUT endpoint.
	oOtgDev.m_oDesc.oDescEndpt2.bmAttributes=EP_ATTR_BULK;
	oOtgDev.m_oDesc.oDescEndpt2.wMaxPacketSizeL=(u8)oOtgDev.m_uBulkOutEPMaxPktSize; // 64
	oOtgDev.m_oDesc.oDescEndpt2.wMaxPacketSizeH=(u8)(oOtgDev.m_uBulkOutEPMaxPktSize>>8);
	oOtgDev.m_oDesc.oDescEndpt2.bInterval=0x0; // not used
}

//////////

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