📄 sysc.c
字号:
{
case eAPLL:
Outp32(rAPLL_LOCK, uLockCount); break;
case eMPLL:
Outp32(rMPLL_LOCK, uLockCount); break;
case eEPLL:
Outp32(rEPLL_LOCK, uLockCount); break;
}
}
//////////
// Function Name : SYSC_ClkSrc
// Function Description : This function select Clock Source
//
// Input : CLKSRC_eId
// Output : NONE
// Version :
void SYSC_ClkSrc( CLKSRC_eId eClkSrc)
{
u32 uCtrl, uOffset, uFuct;
u32 uRegValue;
uCtrl = (eClkSrc&0xF000)>>12;
uOffset = (eClkSrc&0x0FF0)>>4;
uFuct = eClkSrc&0x000F;
uRegValue = Inp32(rCLK_SRC);
uRegValue = (uRegValue & ~(uCtrl<<(uOffset))) | (uFuct<<(uOffset));
Outp32(rCLK_SRC, uRegValue);
}
//////////
// Function Name : SYSC_SetDIV0
// Function Description : This function set Clock divider0 register ratio
//
// Input : uAratio : DIV_APLL ( 0 ~ 15)
// uMratio : DIV_MPLL ( 0~1)
// uHratio : DIV_HCLK (0~1), HCLKx2
// uHx2ratio: DIV_HCLKx2(0~7), (APLL or MPLL)
// uPratio : DIV_PCLK (0~15), HCLKx2
// uONDratio: DIV_ONDCLK(0~3), HCLKx2
// uSECUratio:DIV_Security(0~3), HCLKx2
// uCAMratio: DIV_CAM(0~15), HCLKx2
// uJPEGratio: DIV_JPEG(0~15), HCLKx2
// uMFCratio: DIV_MFC(0~15), HCLKx2
// Output : NONE
// Version :
void SYSC_SetDIV0( u32 uAratio, u32 uMratio, u32 uHratio, u32 uHx2ratio, u32 uPratio,
u32 uONDratio, u32 uSECUratio, u32 uCAMratio, u32 uJPEGratio, u32 uMFCratio )
{
u32 uRegValue;
uRegValue =
( (uMFCratio<<28)| // HCLKx2/(uMFCratio + 1)
(uJPEGratio<<24) | // HCLKx2/(uJPEGratio + 1)
(uCAMratio<<20) | // HCLKx2/(uCAMratio + 1)
(uSECUratio<<18)| // HCLKx2/(uSECUratio + 1)
(uONDratio<<16) | // HCLKx2/(uONDratio +1 )
(uPratio<<12) | // HCLKx2/(uPratio+1)
(uHx2ratio<<9) |
(uHratio<<8)| // HCLKx2(uHratio+1)
(uMratio<<4)|
(uAratio<<0)) ;
Outp32(rCLK_DIV0, uRegValue);
}
//////////
// Function Name : SYSC_SetDIV0_all
// Function Description : This function set Clock divider0 register ratio
// Input : None
// Version :
// add by rb1004
void SYSC_SetDIV0_all(u32 uSetRatio)
{
Outp32(rCLK_DIV0, uSetRatio);
}
//////////
// Function Name : SYSC_GetDIV0
// Function Description : This function get Clock divider0 register ratio
// Input : None
// Version :
// add by rb1004
u32 SYSC_GetDIV0( void)
{
return Inp32(rCLK_DIV0);
}
//////////
// Function Name : SYSC_SetDIV1
// Function Description : This function set Clock divider1 register ratio
//
// Input : uMMC0ratio : (0~15)
// uMMC1ratio : (0~15)
// uMMC2ratio : (0~15)
// uLCDratio : (0~15)
// uSCALERratio : (0~15)
// uHOSTratio : (0~15)
// Output : NONE
// Version :
void SYSC_SetDIV1( u32 uMMC0ratio, u32 uMMC1ratio, u32 uMMC2ratio, u32 uLCDratio, u32 uSCALERratio, u32 uHOSTratio)
{
u32 uRegValue;
uRegValue =
((uHOSTratio<<20) |
(uSCALERratio<<16) |
(uLCDratio<<12) |
(uMMC2ratio<<8)|
(uMMC1ratio<<4)|
(uMMC0ratio<<0)) ;
Outp32(rCLK_DIV1, uRegValue);
}
//////////
// Function Name : SYSC_SetDIV2
// Function Description : This function set Clock divider2 register ratio
//
// Input : uSPI0ratio : (0~15)
// uSPI1ratio : (0~15)
// uAUDIO0ratio : (0~15)
// uAUDIO1ratio : (0~15)
// uUARTratio : (0~15)
// uIRDAratio : (0~15)
// Output : NONE
// Version :
void SYSC_SetDIV2( u32 uSPI0ratio , u32 uSPI1ratio, u32 uAUDIO0ratio, u32 uAUDIO1ratio, u32 uUARTratio, u32 uIRDAratio)
{
u32 uRegValue;
uRegValue =
((uIRDAratio<<20) |
(uUARTratio<<16) |
(uAUDIO1ratio<<12) |
(uAUDIO0ratio<<8)|
(uSPI1ratio<<4)|
(uSPI0ratio<<0)) ;
Outp32(rCLK_DIV2, uRegValue);
}
//////////
// Function Name : SYSC_CtrlHCLKGate
// Function Description : This function control HCLK_GATE Register
//
// Input : H_eGATE
// uCtrl : Enable_CLK : (1),
// Disable_CLK : (0)
// Output : NONE
// Version :
void SYSC_CtrlHCLKGate( H_eGATE eHCLKGATE , u32 uCtrl)
{
u32 uRegValue, uTemp;
uTemp = eHCLKGATE;
uRegValue =Inp32(rHCLK_GATE);
uRegValue = (uRegValue & ~(0x1<<(uTemp))) | (uCtrl<<(uTemp));
Outp32(rHCLK_GATE, uRegValue);
}
//////////
// Function Name : SYSC_CtrlPCLKGate
// Function Description : This function control PCLK_GATE Register
//
// Input : P_eGATE
// uCtrl : Enable_CLK : (1),
// Disable_CLK : (0)
// Output : NONE
// Version :
void SYSC_CtrlPCLKGate( P_eGATE ePCLKGATE , u32 uCtrl)
{
u32 uRegValue, uTemp;
uTemp = ePCLKGATE;
uRegValue =Inp32(rPCLK_GATE);
uRegValue = (uRegValue & ~(0x1<<(uTemp))) | (uCtrl<<(uTemp));
Outp32(rPCLK_GATE, uRegValue);
}
//////////
// Function Name : SYSC_CtrlSCLKGate
// Function Description : This function control SCLK_GATE Register
//
// Input : S_eGATE
// uCtrl : Enable_CLK : (1),
// Disable_CLK : (0)
// Output : NONE
// Version :
void SYSC_CtrlSCLKGate( S_eGATE eSCLKGATE , u32 uCtrl)
{
u32 uRegValue, uTemp;
uTemp = eSCLKGATE;
uRegValue =Inp32(rSCLK_GATE);
uRegValue = (uRegValue & ~(0x1<<(uTemp))) | (uCtrl<<(uTemp));
Outp32(rSCLK_GATE, uRegValue);
}
//////////
// Function Name : SYSC_CtrlCLKOUT
// Function Description : This function select CLK output
//
// Input : CLKOUT_eTYPE : FOUT_APLL, FOUT_EPLL, HCLK, CLK27M, CLK48M, RTC, Tick, DOUT
// uDivVAL : (0~15)
//
// Output : NONE
// Version :
void SYSC_CtrlCLKOUT( CLKOUT_eTYPE eCLKOUT_TYPE, u32 uDivVAL)
{
u32 uRegValue;
u32 uFunct;
GPIO_SetFunctionEach(eGPIO_F, eGPIO_14, 3); // Select GPIO_SELECT
GPIO_SetPullUpDownEach(eGPIO_F, eGPIO_14, 0);
uFunct = eCLKOUT_TYPE;
uRegValue =Inp32(rCLK_OUT);
uRegValue = (uRegValue & ~(0xFF<<12)) | ((uFunct<<12)|(uDivVAL<<16));
Outp32(rCLK_OUT, uRegValue);
}
//////////
// Function Name : SYSC_CtrlDCLK
// Function Description : This function control DCLK output
//
// Input : uDCLKCMP :(0~15) DCLK compare value, clock toggle value,
// uDCLKDIV : (0~15) DCLK divid value, F_DCLK= Src_CLK/(uDCLKDIV+1)
// uDCLKSEL : "0" PCLK, "1" 48MHz
// uDCLKEN : Enable_CLK : (1),
// Disable_CLK : (0)
// Output : NONE
// Version :
void SYSC_CtrlDCLK( u32 uDCLKCMP, u32 uDCLKDIV, u32 uDCLKSEL, u32 uDCLKEN)
{
u32 uRegValue;
uRegValue =Inp32(rCLK_OUT);
uRegValue = (uRegValue & ~(0xFFF<<0)) | ((uDCLKCMP<<8)|(uDCLKDIV<<4)|(uDCLKSEL<<1)|(uDCLKEN<<0));
Outp32(rCLK_OUT, uRegValue);
}
// Value & 0xF00 : The BUS Control Register ID, OffSet
// Value & 0x0F0 : The BUS Priority Type ID
// Value & 0x00F : The Fixed Priority Order
//////////
// Function Name : SYSC_CtrlBUSPrio
// Function Description : This function control AHB Bus Priority
//
// Input : BUSCTRL_eId
// Output : NONE
// Version :
void SYSC_CtrlBUSPrio( BUSCTRL_eId eBusId)
{
u32 uOffset, uPType, uForder, uOffset1;
u32 uRegValue;
uOffset = (eBusId&0xF00)>>8;
uPType = (eBusId&0x0F0)>>4;
uForder = eBusId&0x00F;
if(uOffset <= 3)
{
uOffset1 = uOffset;
uRegValue = Inp32(rAHB_CON0);
uRegValue = (uRegValue & ~(0xFF<<(uOffset1*7))) | ((uPType<<(uOffset1*7 + 4))|(uForder<<(uOffset1*7)));
Outp32(rAHB_CON0, uRegValue);
}
else if(uOffset >= 4 && uOffset <= 7)
{
uOffset1 = uOffset - 4;
uRegValue = Inp32(rAHB_CON1);
uRegValue = (uRegValue & ~(0xFF<<(uOffset1*7))) | ((uPType<<(uOffset1*7 + 4))|(uForder<<(uOffset1*7)));
Outp32(rAHB_CON1, uRegValue);
}
else if(uOffset >= 8 && uOffset <= 9)
{
uOffset1 = uOffset - 8;
uRegValue = Inp32(rAHB_CON2);
uRegValue = (uRegValue & ~(0xFF<<(uOffset1*7))) | ((uPType<<(uOffset1*7 + 4))|(uForder<<(uOffset1*7)));
Outp32(rAHB_CON2, uRegValue);
}
}
//////////
// Function Name : SYSC_CtrlBUSLock
// Function Description : This function control HLOCK for each bus
//
// Input :
// Output : NONE
// Version :
// TBD
//////////
// Function Name : SYSC_SeletDMA
// Function Description : This function select between SDMA and General DMA
//
// Input : SEL_eSDMA :
// uSEL : #define SEL_SDMA (0)
// #define SEL_GDMA (1)
//
// Output : NONE
// Version :
void SYSC_SelectDMA( DMASELECT_eID eSEL_DMA, u32 uSEL)
{
u32 uRegValue;
u32 uOffset;
uOffset = eSEL_DMA;
uRegValue =Inp32(rSDMA_SEL);
uRegValue = (uRegValue & ~(0x1<<uOffset)) | (uSEL<<uOffset);
Outp32(rSDMA_SEL, uRegValue);
}
//////////
// Function Name : SYSC_CtrlEBIPrio
// Function Description : This function control EBI Priority
//
// Input : EBIPrio_eID
// Output : NONE
// Version :
void SYSC_CtrlEBIPrio( EBIPrio_eID eEBIId)
{
u32 uPType, uForder;
u32 uRegValue;
uPType = (eEBIId&0xF0)>>4;
uForder = eEBIId&0x0F;
uRegValue = Inp32(rMEM_SYS_CFG);
uRegValue = (uRegValue & ~(0xF<<8)) | ((uPType<<11)|(uForder<<8));
Outp32(rMEM_SYS_CFG, uRegValue);
}
//////////
// Function Name : SYSC_CtrlCSMEM0
// Function Description : This function control static memory chip selection muxing of MEM0
//
// Input : eM0CSn2 : eCS_SROMC, eCS_ONDC, eCS_NFC
// eM0CSn3 : eCS_SROMC, eCS_ONDC, eCS_NFC
// eM0CSn4 : eCS_SROMC, eCS_CFC
// eM0CSn5 : eCS_SROMC, eCS_CFC
// Output : NONE
// Version :
void SYSC_CtrlCSMEM0( SelCS_eMEM0 eM0CSn2, SelCS_eMEM0 eM0CSn3, SelCS_eMEM0 eM0CSn4, SelCS_eMEM0 eM0CSn5 )
{
u32 uRegValue;
uRegValue = Inp32(rMEM_SYS_CFG);
uRegValue = (uRegValue & ~(0x3F<<0)) | ((eM0CSn5<<5)|(eM0CSn4<<4)|(eM0CSn3<<2)|(eM0CSn2<<0));
Outp32(rMEM_SYS_CFG, uRegValue);
}
//////////
// Function Name : SYSC_SetQos
// Function Description : This function set QOS_OV_ID
//
// Input :
// Output : NONE
// Version :
// TBD
//////////
// Function Name : SYSC_RdMEMCFG
// Function Description : This function read MEM_CFC_STAT Register
//
// Input : NONE
// Output : NONE
// Version :
void SYSC_RdMEMCFGSTAT( void )
{
u32 uRegValue;
u32 uTemp;
uRegValue = Inp32(rMEM_CFG_STAT);
// EBI Priority Scheme
uTemp = ( uRegValue >>15 ) & 0x1;
printf(" Current EBI Priority Scheme (0: Fixed, 1: Circular) : %d \n", uTemp);
uTemp = (uRegValue >> 12) & 0x7 ;
printf(" Current EBI Fixed Priority setting : %d \n", uTemp);
// CF I/F
uTemp = ( uRegValue >>10 ) & 0x1;
printf(" Current CF I/F Setting (0: EBI, 1: Independet) : %d \n", uTemp);
// NAND Type Setting
uTemp = ( uRegValue >>9 ) & 0x1;
printf(" Current NAND Type (0:OneNAND, 1: NAND) : %d \n", uTemp);
uTemp = ( uRegValue >>3 ) & 0x1;
printf(" Current NAND Init Setting (0: Normal NAND, 1: Advanced NAND) : %d \n", uTemp);
uTemp = ( uRegValue >>2 ) & 0x1;
printf(" Show address cycle init. setting of NAND : %d \n", uTemp);
uTemp = ( uRegValue >>0 ) & 0x1;
printf(" Show NAND Page Size : %d \n", uTemp);
uTemp = ( uRegValue >>8 ) & 0x1;
printf(" Current CS0 Bus Width (0: 8-bit, 1: 16-bit) : %d \n", uTemp);
uTemp = ( uRegValue >>1 ) & 0x1;
printf(" Show CS0 Bus width (init. Setting) (0:8bit, 1: 16bit) : %d \n", uTemp);
uTemp = ( uRegValue >>7 ) & 0x1;
printf(" NAND Booting (0: not Used, 1: used) : %d \n", uTemp);
uTemp = ( uRegValue >>5 ) & 0x3;
printf(" Current Booting Type (0: NFCON, 1: SROMC, 2: ONDC, 3: Internal ROM) : %d \n", uTemp);
uTemp = ( uRegValue >>4 ) & 0x1;
printf(" Current ADDR Expand (0: Used MEM1 Data, 1:Used MEM0 Addr) : %d \n", uTemp);
}
//////////
// Function Name : SYSC_RdMEMCFG
// Function Description : This function gets MEM_CFC_STAT Register
//
// Input : NONE
// Output : NONE
// rb1004
u32 SYSC_GetMEMCFGSTAT( void )
{
return Inp32(rMEM_CFG_STAT);
}
//////////
// Function Name : SYSC_SetCFGWFI
// Function Description : This function configure ARM1176 STANBYWFI ( CFG_STANDBY (in PWR_CFG Register))
// ( CFG_STANDBYWFI & OSC Control in Power Mode )
// Input : eWFIMode : eIGNORE, eIDLE, eSTOP, eSLEEP
// uOSCCLK : #define Disable_CLK (0)
// #define Enable_CLK (1)
//
// Output : NONE
// Version :
void SYSC_SetCFGWFI( CFG_eWFI eWFIMode, u32 uOSCCLK)
{
u32 uRegValue, uRegValue1;
uRegValue =Inp32(rPWR_CFG);
switch(eWFIMode)
{
case eIGNORE:
uRegValue = (uRegValue & ~(0x61<<0)) | ((eWFIMode<<5)|(1<<0)); // CFG_STANDBY= ignore, OSC_27 = Enable
Outp32(rPWR_CFG, uRegValue); break;
case eIDLE:
uRegValue = (uRegValue & ~(0x61<<0)) | ((eWFIMode<<5)|(uOSCCLK<<0));
Outp32(rPWR_CFG, uRegValue); break;
case eSTOP:
uRegValue = (uRegValue & ~(0x61<<0)) | ((eWFIMode<<5)|(uOSCCLK<<0));
uRegValue1=Inp32(rSTOP_CFG);
uRegValue1 = (uRegValue1 & ~(0x3<<0)) | ((uOSCCLK<<1)|(uOSCCLK<<0));
Outp32(rPWR_CFG, uRegValue);
Outp32(rSTOP_CFG, uRegValue1);
break;
case eSLEEP:
uRegValue = (uRegValue & ~(0x61<<0)) | ((eWFIMode<<5)|(uOSCCLK<<0));
uRegValue1=Inp32(rSLEEP_CFG);
uRegValue1 = (uRegValue1 & ~(0x61<<0)) | ((uOSCCLK<<0));
Outp32(rPWR_CFG, uRegValue);
Outp32(rSLEEP_CFG, uRegValue1);
break;
}
}
//////////
// Function Name : SYSC_SetBATF
// Function Description : This function configure BATFLT ( (in PWR_CFG Register))
//
// Input : eBATFLT : eFLT_IGNORE, eFLT_INT, eFLT_SLEEP
// uINTSRC : (0) Wake-up Source in ESLEEP : nWRESET
// (1) Wake-up Source in ESLEEP : SLEEP Wake-up Source
//
//
// Output : NONE
// Version :
void SYSC_SetBATF( BATFLT_eMODE eBATFLT, u32 uINTSRC)
{
u32 uRegValue;
uRegValue =Inp32(rPWR_CFG);
switch(eBATFLT)
{
case eFLT_IGNORE:
uRegValue = (uRegValue & ~(0x1F<<0)) | ((eBATFLT<<3)|(1<<0));
Outp32(rPWR_CFG, uRegValue); break;
case eFLT_INT:
uRegValue = (uRegValue & ~(0x1F<<0)) | ((eBATFLT<<3)|(1<<0));
Outp32(rPWR_CFG, uRegValue); break;
case eFLT_SLEEP:
uRegValue = (uRegValue & ~(0x1F<<0)) | ((eBATFLT<<3)|(uINTSRC<<2)|(1<<0));
Outp32(rPWR_CFG, uRegValue);
break;
}
}
//////////
// Function Name : SYSC_SetSTOPCFG
// Function Description : This function configure Power Control of the internal block in the Stop Mode
//
// Input : uMEM_ARM : Power Control of the Memory Block in ARM Module (0: OFF, 1:ON)
// uMEM_TOP : Power Control of the Memory Block in Top Module (0: OFF, 1:ON)
// uLogic_ARM : Power Control of the Logic Block in ARM Module (0: OFF, 1:ON)
// uLogic_ARM : Power Control of the Logic Block in Top Module (0: OFF, 1:ON)
// Output : NONE
// Version :
void SYSC_SetSTOPCFG( u32 uMEM_ARM, u32 uMEM_Top, u32 uLogic_ARM, u32 uLogic_Top)
{
u32 uRegValue;
uRegValue =Inp32(rSTOP_CFG);
uRegValue = (uRegValue & ~(0x3FFFFF<<8)) | ((uMEM_ARM<<29)|(uMEM_Top<<20)|(uLogic_ARM<<17)|(uLogic_Top<<8));
Outp32(rSTOP_CFG, uRegValue);
}
//////////
// Function Name : SYSC_SetWakeMASK
// Function Description : This function control Wake-up source Mask
//
// Input : WKUPMSK_eID : Wake-up Source ID
// uMaskCtrl : (0) Mask disable , Wake-up source Enable
// (1) Mask Enable, Wake-up source disable
//
//
// Output : NONE
// Version :
void SYSC_SetWakeMASK( WKUPMSK_eID eWKUPSRC, u32 uMaskCtrl)
{
u32 uRegValue;
u32 uRegOffset, uMaskID;
uRegOffset = (eWKUPSRC&0xF00)>>8;
uMaskID = eWKUPSRC&0x0FF;
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