📄 sysc.h
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/**************************************************************************************
*
* Project Name : S3C6410 Validation
*
* Copyright 2006 by Samsung Electronics, Inc.
* All rights reserved.
*
* Project Description :
* This software is only for validating functions of the S3C6410.
* Anybody can use this software without our permission.
*
*--------------------------------------------------------------------------------------
*
* File Name : sysc.h
*
* File Description : This file declares prototypes of system controller API funcions.
*
* Author : Haksoo,Kim
* Dept. : AP Development Team
* Created Date : 2006/11/08
* Version : 0.1
*
* History
* - Created(Haksoo,Kim 2006/11/08)
*
**************************************************************************************/
#ifndef __SYSC_H__
#define __SYSC_H__
#ifdef __cplusplus
extern "C" {
#endif
#include <stdio.h>
#include "def.h"
extern u32 g_System_ID;
extern u8 g_System_Revision, g_System_Pass, g_SYNCACK;
extern u32 g_MPLL, g_ARMCLK, g_HCLK, g_PCLK, g_MCLK;
#define DBGMSG
#undef DBGMSG
#define Enable_CLK (1)
#define Disable_CLK (0)
// for rSDMA_SEL
#define SEL_SDMA (0)
#define SEL_GDMA (1)
typedef enum PLL_TYPE
{
eAPLL = 0x0,
eMPLL = 0x1,
eEPLL = 0x2
}PLL_eTYPE;
typedef enum CLKSRC_Id
{
// Value & 0xF000 : The control bit number of the Clock Source register
// Value & 0x0FF0 : The Offset bit number of the Clock Source register (0(0x)~31(0x1F))
// Value & 0x000F : The control bit value of the Clock Source register
eTV_27M = 0x11F0, // Control : 1bit, Control bit : [31], Value : 0, (27MHz)
eTV_FINEPLL = 0x11F1, // Control : 1bit, Control bit : [31], Value : 1, (FIN_EPLL)
eDAC_27M = 0x11E0, // Control : 1bit, Control bit : [30], Value : 0, (27MHz)
eDAC_FINEPLL = 0x11E1, // Control : 1bit, Control bit : [30], Value : 1, (FIN_EPLL)
eSCALER_MOUTEPLL = 0x31C0, // Control : 2bit, Control bit : [28], Value : 0, (FOUT_EPLL)
eSCALER_DOUTMPLL = 0x31C1, // Control : 2bit, Control bit : [28], Value : 1, (DOUT_MPLL)
eSCALER_FINEPLL = 0x31C2, // Control : 2bit, Control bit : [28], Value : 2, (FIN_EPLL)
eLCD_MOUTEPLL = 0x31A0, // Control : 2bit, Control bit : [26], Value : 0, (FOUT_EPLL)
eLCD_DOUTMPLL = 0x31A1, // Control : 2bit, Control bit : [26], Value : 1, (DOUT_MPLL)
eLCD_FINEPLL = 0x31A2, // Control : 2bit, Control bit : [26], Value : 2, (FIN_EPLL)
eIRDA_MOUTEPLL = 0x3180, // Control : 2bit, Control bit : [24], Value : 0, (FOUT_EPLL)
eIRDA_DOUTMPLL = 0x3181, // Control : 2bit, Control bit : [24], Value : 1, (DOUT_MPLL)
eIRDA_FINEPLL = 0x3182, // Control : 2bit, Control bit : [24], Value : 2, (FIN_EPLL)
eIRDA_48M = 0x3183, // Control : 2bit, Control bit : [24], Value : 3, (48MHz)
eMMC2_MOUTEPLL = 0x3160, // Control : 2bit, Control bit : [22], Value : 0, (FOUT_EPLL)
eMMC2_DOUTMPLL = 0x3161, // Control : 2bit, Control bit : [22], Value : 1, (DOUT_MPLL)
eMMC2_FINEPLL = 0x3162, // Control : 2bit, Control bit : [22], Value : 2, (FIN_EPLL)
eMMC2_27M = 0x3163, // Control : 2bit, Control bit : [22], Value : 3, (27MHz)
eMMC1_MOUTEPLL = 0x3140, // Control : 2bit, Control bit : [20], Value : 0, (FOUT_EPLL)
eMMC1_DOUTMPLL = 0x3141, // Control : 2bit, Control bit : [20], Value : 1, (DOUT_MPLL)
eMMC1_FINEPLL = 0x3142, // Control : 2bit, Control bit : [20], Value : 2, (FIN_EPLL)
eMMC1_27M = 0x3143, // Control : 2bit, Control bit : [20], Value : 3, (27MHz)
eMMC0_MOUTEPLL = 0x3120, // Control : 2bit, Control bit : [18], Value : 0, (FOUT_EPLL)
eMMC0_DOUTMPLL = 0x3121, // Control : 2bit, Control bit : [18], Value : 1, (DOUT_MPLL)
eMMC0_FINEPLL = 0x3122, // Control : 2bit, Control bit : [18], Value : 2, (FIN_EPLL)
eMMC0_27M = 0x3123, // Control : 2bit, Control bit : [18], Value : 3, (27MHz)
eSPI1_MOUTEPLL = 0x3100, // Control : 2bit, Control bit : [16], Value : 0, (FOUT_EPLL)
eSPI1_DOUTMPLL = 0x3101, // Control : 2bit, Control bit : [16], Value : 1, (DOUT_MPLL)
eSPI1_FINEPLL = 0x3102, // Control : 2bit, Control bit : [16], Value : 2, (FIN_EPLL)
eSPI1_27M = 0x3103, // Control : 2bit, Control bit : [16], Value : 3, (27MHz)
eSPI0_MOUTEPLL = 0x30E0, // Control : 2bit, Control bit : [14], Value : 0, (FOUT_EPLL)
eSPI0_DOUTMPLL = 0x30E1, // Control : 2bit, Control bit : [14], Value : 1, (DOUT_MPLL)
eSPI0_FINEPLL = 0x30E2, // Control : 2bit, Control bit : [14], Value : 2, (FIN_EPLL)
eSPI0_27M = 0x30E3, // Control : 2bit, Control bit : [14], Value : 3, (27MHz)
eUART_MOUTEPLL = 0x10D0, // Control : 1bit, Control bit : [13], Value : 0, (FOUT_EPLL)
eUART_DOUTMPLL = 0x10D1, // Control : 1bit, Control bit : [13], Value : 1, (DOUT_MPLL)
eAUDIO1_MOUTEPLL = 0x70A0, // Control : 3bit, Control bit : [10], Value : 0, (FOUT_EPLL)
eAUDIO1_DOUTMPLL = 0x70A1, // Control : 3bit, Control bit : [10], Value : 1, (DOUT_MPLL)
eAUDIO1_FINEPLL = 0x70A2, // Control : 3bit, Control bit : [10], Value : 2, (FIN_EPLL)
eAUDIO1_I2SCDCLK = 0x70A3, // Control : 3bit, Control bit : [10], Value : 3, (IISCDCLK)
eAUDIO1_PCMCDCLK = 0x70A4, // Control : 3bit, Control bit : [10], Value : 4, (PCMCDCLK)
eAUDIO0_MOUTEPLL = 0x7070, // Control : 3bit, Control bit : [7], Value : 0, (FOUT_EPLL)
eAUDIO0_DOUTMPLL = 0x7071, // Control : 3bit, Control bit : [7], Value : 1, (DOUT_MPLL)
eAUDIO0_FINEPLL = 0x7072, // Control : 3bit, Control bit : [7], Value : 2, (FIN_EPLL)
eAUDIO0_I2SCDCLK = 0x7073, // Control : 3bit, Control bit : [7], Value : 3, (IISCDCLK)
eAUDIO0_PCMCDCLK = 0x7074, // Control : 3bit, Control bit : [7], Value : 4, (PCMCDCLK)
eUHOST_48M = 0x3050, // Control : 2bit, Control bit : [5], Value : 0, (48MHz)
eUHOST_MOUTEPLL = 0x3051, // Control : 2bit, Control bit : [5], Value : 1, (FOUT EPLL)
eUHOST_DOUTMPLL = 0x3052, // Control : 2bit, Control bit : [5], Value : 2, (DOUT MPLL)
eUHOST_FINEPLL = 0x3053, // Control : 2bit, Control bit : [5], Value : 3, (FIN EPLL)
eMFC_HCLKx2 = 0x1040, // Control : 1bit, Control bit : [4], Value : 0, (HCLKx2)
eMFC_MOUTEPLL = 0x1041, // Control : 1bit, Control bit : [4], Value : 1, (MOUT_EPLL)
eEPLL_FIN = 0x1020, // Control : 1bit, Control bit : [2], Value : 0, (FIN)
eEPLL_FOUT = 0x1021, // Control : 1bit, Control bit : [2], Value : 1, (FOUT)
eMPLL_FIN = 0x1010, // Control : 1bit, Control bit : [1], Value : 0, (FIN)
eMPLL_FOUT = 0x1011, // Control : 1bit, Control bit : [1], Value : 1, (FOUT)
eAPLL_FIN = 0x1000, // Control : 1bit, Control bit : [0], Value : 0, (FIN)
eAPLL_FOUT = 0x1001 // Control : 1bit, Control bit : [0], Value : 1, (FOUT)
}CLKSRC_eId;
typedef enum H_GATE
{
eHCLK_MFC = 0,
eHCLK_INTC = 1,
eHCLK_TZIC = 2,
eHCLK_LCD = 3,
eHCLK_ROT = 4,
eHCLK_POST = 5,
eHCLK_TV = 7,
eHCLK_2D = 8,
eHCLK_SCALER = 9,
eHCLK_CAM = 10,
eHCLK_JPEG = 11,
eHCLK_DMA0 = 12,
eHCLK_DMA1 = 13,
eHCLK_HOSTIF = 14,
eHCLK_Modem = 15,
eHCLK_MDP = 16,
eHCLK_MMC0 = 17,
eHCLK_MMC1 = 18,
eHCLK_MMC2 = 19,
eHCLK_OTG = 20,
eHCLK_DMC0 = 21,
eHCLK_DMC1 = 22,
eHCLK_DDR0 = 23,
eHCLK_DDR1 = 24,
eHCLK_IROM = 25,
eHCLK_UHOST = 26, //EVT0
eHCLK_SDMA0 = 26,
eHCLK_SDMA1 = 27,
eHCLK_SECUR = 28,
//eHCLK_UHOST = 29, //EVT1
eHCLK_BUS = 30
}H_eGATE;
typedef enum P_GATE
{
ePCLK_MFC = 0,
ePCLK_UART0 = 1,
ePCLK_UART1 = 2,
ePCLK_UART2 = 3,
ePCLK_UART3 = 4,
ePCLK_WDT = 5,
ePCLK_RTC = 6,
ePCLK_PWM = 7,
ePCLK_PCM0 = 8,
ePCLK_PCM1 = 9,
ePCLK_IRDA = 10,
ePCLK_KEYPAD = 11,
ePCLK_TSADC = 12,
ePCLK_TZPC = 13,
ePCLK_AC97 = 14,
ePCLK_I2S0 = 15,
ePCLK_I2S1 = 16,
ePCLK_I2C = 17,
ePCLK_GPIO = 18,
ePCLK_HSITX = 19,
ePCLK_HSIRX = 20,
ePCLK_SPI0 = 21,
ePCLK_SPI1 = 22,
ePCLK_CHIPID = 23,
ePCLK_SKEY = 24
}P_eGATE;
typedef enum S_GATE
{
eSCLK_JPEG = 1,
eSCLK_CAM = 2,
eSCLK_MFC = 3,
eSCLK_OND = 4,
eSCLK_UART = 5,
eSCLK_IRDA = 6,
eSCLK_SECUR = 7,
eSCLK_AUDIO0 = 8,
eSCLK_AUDIO1 = 9,
eSCLK_POST0 = 10,
eSCLK_POST1 = 11,
eSCLK_POST0_27= 12,
eSCLK_POST1_27= 13,
eSCLK_LCD = 14,
eSCLK_LCD_27 = 15,
eSCLK_SCALER = 16,
eSCLK_SCALER27 = 17,
eSCLK_TV27 = 18,
eSCLK_DAC27 = 19,
eSCLK_SPI0 = 20,
eSCLK_SPI1 = 21,
eSCLK_SPI0_48 = 22,
eSCLK_SPI1_48 = 23,
eSCLK_MMC0 = 24,
eSCLK_MMC1 = 25,
eSCLK_MMC2 = 26,
eSCLK_MMC0_48 = 27,
eSCLK_MMC1_48 = 28,
eSCLK_MMC2_48 = 29,
eSCLK_UHOST = 30
}S_eGATE;
//
typedef enum CLKOUT_TYPE
{
eCLKOUT_APLLOUT = 0x0, // FOUT_APLL/2
eCLKOUT_EPLLOUT = 0x1,
eCLKOUT_HCLK = 0x2,
eCLKOUT_48M = 0x3,
eCLKOUT_27M = 0x4,
eCLKOUT_RTC = 0x5,
eCLKOUT_TICK = 0x6,
eCLKOUT_DOUT = 0x7
}CLKOUT_eTYPE;
typedef enum BUSCTRL_Id
{
// Value & 0xF00 : The BUS Control Register ID, OffSet
// Value & 0x0F0 : The BUS Priority Type ID
// Value & 0x00F : The Fixed Priority Order
eAHBF_FIX0 = 0x000, // rAHB_CON0(0), Fixed Order, Fixed Order type 0
eAHBF_FIX1 = 0x001, // rAHB_CON0(0), Fixed Order, Fixed Order type 1
eAHBF_FIX2 = 0x002, // rAHB_CON0(0), Fixed Order, Fixed Order type 2
eAHBF_FIX3 = 0x003, // rAHB_CON0(0), Fixed Order, Fixed Order type 3
eAHBF_FIX4 = 0x004, // rAHB_CON0(0), Fixed Order, Fixed Order type 4
eAHBF_FIX5 = 0x005, // rAHB_CON0(0), Fixed Order, Fixed Order type 5
eAHBF_FIX6 = 0x006, // rAHB_CON0(0), Fixed Order, Fixed Order type 6
eAHBF_LGL = 0x010, // rAHB_CON0(0), Last grant order.
eAHBF_ROT = 0x020, // rAHB_CON0(0), Rotation
eAHBX_FIX0 = 0x100, // rAHB_CON0(1), Fixed Order, Fixed Order type 0
eAHBX_FIX1 = 0x101, // rAHB_CON0(1), Fixed Order, Fixed Order type 1
eAHBX_FIX2 = 0x102, // rAHB_CON0(1), Fixed Order, Fixed Order type 2
eAHBX_FIX3 = 0x103, // rAHB_CON0(1), Fixed Order, Fixed Order type 3
eAHBX_FIX4 = 0x104, // rAHB_CON0(1), Fixed Order, Fixed Order type 4
eAHBX_FIX5 = 0x105, // rAHB_CON0(1), Fixed Order, Fixed Order type 5
eAHBX_FIX6 = 0x106, // rAHB_CON0(1), Fixed Order, Fixed Order type 6
eAHBX_LGL = 0x110, // rAHB_CON0(1), Last grant order.
eAHBX_ROT = 0x120, // rAHB_CON0(1), Rotation
eAHBP_FIX0 = 0x200, // rAHB_CON0(2), Fixed Order, Fixed Order type 0
eAHBP_FIX1 = 0x201, // rAHB_CON0(2), Fixed Order, Fixed Order type 1
eAHBP_FIX2 = 0x202, // rAHB_CON0(2), Fixed Order, Fixed Order type 2
eAHBP_FIX3 = 0x203, // rAHB_CON0(2), Fixed Order, Fixed Order type 3
eAHBP_FIX4 = 0x204, // rAHB_CON0(2), Fixed Order, Fixed Order type 4
eAHBP_FIX5 = 0x205, // rAHB_CON0(2), Fixed Order, Fixed Order type 5
eAHBP_FIX6 = 0x206, // rAHB_CON0(2), Fixed Order, Fixed Order type 6
eAHBP_LGL = 0x210, // rAHB_CON0(2), Last grant order.
eAHBP_ROT = 0x220, // rAHB_CON0(2), Rotation
eAHBI_FIX0 = 0x300, // rAHB_CON0(3), Fixed Order, Fixed Order type 0
eAHBI_FIX1 = 0x301, // rAHB_CON0(3), Fixed Order, Fixed Order type 1
eAHBI_FIX2 = 0x302, // rAHB_CON0(3), Fixed Order, Fixed Order type 2
eAHBI_FIX3 = 0x303, // rAHB_CON0(3), Fixed Order, Fixed Order type 3
eAHBI_FIX4 = 0x304, // rAHB_CON0(3), Fixed Order, Fixed Order type 4
eAHBI_FIX5 = 0x305, // rAHB_CON0(3), Fixed Order, Fixed Order type 5
eAHBI_FIX6 = 0x306, // rAHB_CON0(3), Fixed Order, Fixed Order type 6
eAHBI_LGL = 0x310, // rAHB_CON0(3), Last grant order.
eAHBI_ROT = 0x320, // rAHB_CON0(3), Rotation
eAHBT0_FIX0 = 0x400, // rAHB_CON1(0), Fixed Order, Fixed Order type 0
eAHBT0_FIX1 = 0x401, // rAHB_CON1(0), Fixed Order, Fixed Order type 1
eAHBT0_FIX2 = 0x402, // rAHB_CON1(0), Fixed Order, Fixed Order type 2
eAHBT0_FIX3 = 0x403, // rAHB_CON1(0), Fixed Order, Fixed Order type 3
eAHBT0_FIX4 = 0x404, // rAHB_CON1(0), Fixed Order, Fixed Order type 4
eAHBT0_FIX5 = 0x405, // rAHB_CON1(0), Fixed Order, Fixed Order type 5
eAHBT0_FIX6 = 0x406, // rAHB_CON1(0), Fixed Order, Fixed Order type 6
eAHBT0_LGL = 0x410, // rAHB_CON1(0), Last grant order.
eAHBT0_ROT = 0x420, // rAHB_CON1(0), Rotation
eAHBT1_FIX0 = 0x500, // rAHB_CON1(1), Fixed Order, Fixed Order type 0
eAHBT1_FIX1 = 0x501, // rAHB_CON1(1), Fixed Order, Fixed Order type 1
eAHBT1_FIX2 = 0x502, // rAHB_CON1(1), Fixed Order, Fixed Order type 2
eAHBT1_FIX3 = 0x503, // rAHB_CON1(1), Fixed Order, Fixed Order type 3
eAHBT1_FIX4 = 0x504, // rAHB_CON1(1), Fixed Order, Fixed Order type 4
eAHBT1_FIX5 = 0x505, // rAHB_CON1(1), Fixed Order, Fixed Order type 5
eAHBT1_FIX6 = 0x506, // rAHB_CON1(1), Fixed Order, Fixed Order type 6
eAHBT1_LGL = 0x510, // rAHB_CON1(1), Last grant order.
eAHBT1_ROT = 0x520, // rAHB_CON1(1), Rotation
eAHBM0_FIX0 = 0x600, // rAHB_CON1(2), Fixed Order, Fixed Order type 0
eAHBM0_FIX1 = 0x601, // rAHB_CON1(2), Fixed Order, Fixed Order type 1
eAHBM0_FIX2 = 0x602, // rAHB_CON1(2), Fixed Order, Fixed Order type 2
eAHBM0_FIX3 = 0x603, // rAHB_CON1(2), Fixed Order, Fixed Order type 3
eAHBM0_FIX4 = 0x604, // rAHB_CON1(2), Fixed Order, Fixed Order type 4
eAHBM0_FIX5 = 0x605, // rAHB_CON1(2), Fixed Order, Fixed Order type 5
eAHBM0_FIX6 = 0x606, // rAHB_CON1(2), Fixed Order, Fixed Order type 6
eAHBM0_LGL = 0x610, // rAHB_CON1(2), Last grant order.
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