usblib.c

MBA2440(s3c2440)的 源代码文件 ARM920T内核。

void DbgPrintf(char *fmt,...)
{
}


void ConfigUsbd(void)
{
    ReconfigUsbd();
    rINTMSK&=~(BIT_USBD);  
}


void ReconfigUsbd(void)
{
// *** End point information ***
//   EP0: control
//   EP1: bulk in end point
//   EP2: not used
//   EP3: bulk out end point
//   EP4: not used
    
    rPWR_REG=PWR_REG_DEFAULT_VALUE;	//disable suspend mode

    rINDEX_REG=0;	
    rMAXP_REG=FIFO_SIZE_8;   	//EP0 max packit size = 8 
    rEP0_CSR=EP0_SERVICED_OUT_PKT_RDY|EP0_SERVICED_SETUP_END;	
 				//EP0:clear OUT_PKT_RDY & SETUP_END
    rINDEX_REG=1;
#if (EP1_PKT_SIZE==32)
	rMAXP_REG=FIFO_SIZE_32;	//EP1:max packit size = 32
#else
	rMAXP_REG=FIFO_SIZE_64;	//EP1:max packit size = 64
#endif	
    rIN_CSR1_REG=EPI_FIFO_FLUSH|EPI_CDT;	
    rIN_CSR2_REG=EPI_MODE_IN|EPI_IN_DMA_INT_MASK|EPI_BULK; //IN mode, IN_DMA_INT=masked    
    rOUT_CSR1_REG=EPO_CDT;   	
    rOUT_CSR2_REG=EPO_BULK|EPO_OUT_DMA_INT_MASK;   	

    rINDEX_REG=2;
    rMAXP_REG=FIFO_SIZE_64;	//EP2:max packit size = 64
    rIN_CSR1_REG=EPI_FIFO_FLUSH|EPI_CDT|EPI_BULK;
    rIN_CSR2_REG=EPI_MODE_IN|EPI_IN_DMA_INT_MASK; //IN mode, IN_DMA_INT=masked    
    rOUT_CSR1_REG=EPO_CDT;   	
    rOUT_CSR2_REG=EPO_BULK|EPO_OUT_DMA_INT_MASK;   	

    rINDEX_REG=3;
#if (EP3_PKT_SIZE==32)
	rMAXP_REG=FIFO_SIZE_32;	//EP3:max packit size = 32
#else
	rMAXP_REG=FIFO_SIZE_64;	//EP3:max packit size = 64
#endif	
    rIN_CSR1_REG=EPI_FIFO_FLUSH|EPI_CDT|EPI_BULK;
    rIN_CSR2_REG=EPI_MODE_OUT|EPI_IN_DMA_INT_MASK; //OUT mode, IN_DMA_INT=masked    
    rOUT_CSR1_REG=EPO_CDT;   	
    //clear OUT_PKT_RDY, data_toggle_bit.
	//The data toggle bit should be cleared when initialization.
    rOUT_CSR2_REG=EPO_BULK|EPO_OUT_DMA_INT_MASK;   	

    rINDEX_REG=4;
    rMAXP_REG=FIFO_SIZE_64;	//EP4:max packit size = 64
    rIN_CSR1_REG=EPI_FIFO_FLUSH|EPI_CDT|EPI_BULK;
    rIN_CSR2_REG=EPI_MODE_OUT|EPI_IN_DMA_INT_MASK; //OUT mode, IN_DMA_INT=masked    
    rOUT_CSR1_REG=EPO_CDT;   	
    	//clear OUT_PKT_RDY, data_toggle_bit.
	//The data toggle bit should be cleared when initialization.
    rOUT_CSR2_REG=EPO_BULK|EPO_OUT_DMA_INT_MASK;   	
    
    rEP_INT_REG=EP0_INT|EP1_INT|EP2_INT|EP3_INT|EP4_INT;
    rUSB_INT_REG=RESET_INT|SUSPEND_INT|RESUME_INT; 
    	//Clear all usbd pending bits
    	
    //EP0,1,3 & reset interrupt are enabled
    rEP_INT_EN_REG=EP0_INT|EP1_INT|EP3_INT;
    rUSB_INT_EN_REG=RESET_INT;
    ep0State=EP0_STATE_INIT;
    
}


void RdPktEp0(U8 *buf,int num)
{
    int i;
    	
    for(i=0;i<num;i++)
    {
        buf[i]=(U8)rEP0_FIFO;	
    }
}
    

void WrPktEp0(U8 *buf,int num)
{
    int i;
    	
    for(i=0;i<num;i++)
    {
        rEP0_FIFO=buf[i];	
    }
}


void WrPktEp1(U8 *buf,int num)
{
    int i;
    	
    for(i=0;i<num;i++)
    {
        rEP1_FIFO=buf[i];	
    }
}


void WrPktEp2(U8 *buf,int num)
{
    int i;
    	
    for(i=0;i<num;i++)
    {
        rEP2_FIFO=buf[i];	
    }
}


void RdPktEp3(U8 *buf,int num)
{
    int i;
    	
    for(i=0;i<num;i++)
    {
        buf[i]=(U8)rEP3_FIFO;	
    }
}


void RdPktEp4(U8 *buf,int num)
{
    int i;
    	
    for(i=0;i<num;i++)
    {
        buf[i]=(U8)rEP4_FIFO;	
    }
}


void ConfigEp3DmaMode(U32 bufAddr,U32 count)
{
    int i;

    rINDEX_REG=3;
    count=count&0xfffff; //transfer size should be <1MB
    
    rDISRCC2=(1<<1)|(1<<0);
    rDISRC2=ADDR_EP3_FIFO; //src=APB,fixed,src=EP3_FIFO 
    rDIDSTC2=(0<<1)|(0<<0);
    rDIDST2=bufAddr;       //dst=AHB,increase,dst=bufAddr
#if USBDMA_DEMAND
    rDCON2=(count)|(0<<31)|(0<<30)|(1<<29)|(0<<28)|(0<<27)|(4<<24)|(1<<23)|(0<<22)|(0<<20); 
        //demand,requestor=APB,CURR_TC int enable,unit transfer,
        //single service,src=USBD,H/W request,autoreload,byte,CURR_TC
#else
    rDCON2=(count)|(1<<31)|(0<<30)|(1<<29)|(0<<28)|(0<<27)|(4<<24)|(1<<23)|(0<<22)|(0<<20); 
        //handshake,requestor=APB,CURR_TC int enable,unit transfer,
        //single service,src=USBD,H/W request,autoreload,byte,CURR_TC
#endif        
    rDMASKTRIG2= (1<<1); 
        //DMA 2 on

    //rEP3_DMA_FIFO=0x40; //not needed for OUT operation. 	

    rEP3_DMA_TTC_L=0xff;
    rEP3_DMA_TTC_M=0xff;
    rEP3_DMA_TTC_H=0x0f;

    rOUT_CSR2_REG=rOUT_CSR2_REG|EPO_AUTO_CLR|EPO_OUT_DMA_INT_MASK; 
    	//AUTO_CLR(OUT_PKT_READY is cleared automatically), interrupt_masking.
#if USBDMA_DEMAND
    rEP3_DMA_UNIT=EP3_PKT_SIZE; //DMA transfer unit=64 bytes
    rEP3_DMA_CON=UDMA_DEMAND_MODE|UDMA_OUT_DMA_RUN|UDMA_DMA_MODE_EN; 
        // deamnd enable,out_dma_run=run,in_dma_run=stop,DMA mode enable
#else        
    rEP3_DMA_UNIT=0x01; //DMA transfer unit=1byte
    rEP3_DMA_CON=UDMA_OUT_DMA_RUN|UDMA_DMA_MODE_EN;
        // deamnd disable,out_dma_run=run,in_dma_run=stop,DMA mode enable
#endif  
    //wait until DMA_CON is effective.
    rEP3_DMA_CON;
    for(i=0;i<10;i++);    	
}


void ConfigEp3IntMode(void)
{
    rINDEX_REG=3;
    
    rDMASKTRIG2= (0<<1);  // EP3=DMA ch 2
        //DMA channel off
    rOUT_CSR2_REG=rOUT_CSR2_REG&~(EPO_AUTO_CLR/*|EPO_OUT_DMA_INT_MASK*/); 
    	//AUTOCLEAR off,interrupt_enabled (???)
    rEP3_DMA_UNIT=1;	
    rEP3_DMA_CON=0; 
    	// deamnd disable,out_dma_run=stop,in_dma_run=stop,DMA mode disable
    //wait until DMA_CON is effective.
    rEP3_DMA_CON;
    
}


static void PrintEpiPkt(unsigned char *pt,int cnt);


// ===================================================================
// All following commands will operate in case 
// - in_csr1 is valid.
// ===================================================================

#define SET_EP1_IN_PKT_READY()  rIN_CSR1_REG= ( in_csr1 &(~ EPI_WR_BITS)\
					| EPI_IN_PKT_READY )	 
#define SET_EP1_SEND_STALL()	rIN_CSR1_REG= ( in_csr1 & (~EPI_WR_BITS)\
					| EPI_SEND_STALL) )
#define CLR_EP1_SENT_STALL()	rIN_CSR1_REG= ( in_csr1 & (~EPI_WR_BITS)\
					&(~EPI_SENT_STALL) )
#define FLUSH_EP1_FIFO() 	rIN_CSR1_REG= ( in_csr1 & (~EPI_WR_BITS)\
					| EPI_FIFO_FLUSH) )


// ***************************
// *** VERY IMPORTANT NOTE ***
// ***************************
// Prepare the code for the packit size constraint!!!

// EP1 = IN end point. 

unsigned char ep1Buf[EP1_PKT_SIZE];
int transferIndex=0;



void PrepareEp1Fifo(void) 
{
    int i;
    unsigned char in_csr1;
    rINDEX_REG=1;
    in_csr1=rIN_CSR1_REG;
    
    for(i=0;i<EP1_PKT_SIZE;i++)ep1Buf[i]=(unsigned char)(transferIndex+i);
    WrPktEp1(ep1Buf,EP1_PKT_SIZE);
    SET_EP1_IN_PKT_READY(); 
}


void Ep1Handler(void)
{
    unsigned char in_csr1;
    int i;
    rINDEX_REG=1;
    in_csr1=rIN_CSR1_REG;
    
    DbgPrintf("<1:%x]",in_csr1);

    //I think that EPI_SENT_STALL will not be set to 1.
    if(in_csr1 & EPI_SENT_STALL)
    {   
   	DbgPrintf("[STALL]");
   	CLR_EP1_SENT_STALL();
   	return;
    }	

    //IN_PKT_READY is cleared
    
    //The data transfered was ep1Buf[] which was already configured 

    PrintEpiPkt(ep1Buf,EP1_PKT_SIZE); 
    
    transferIndex++;

    PrepareEp1Fifo(); 
    	//IN_PKT_READY is set   
    	//This packit will be used for next IN packit.	

    return;
}


    
void PrintEpiPkt(unsigned char *pt,int cnt)
{
    int i;
    DbgPrintf("[B_IN:%d:",cnt);
    for(i=0;i<cnt;i++)
    	DbgPrintf("%x,",pt[i]);
    DbgPrintf("]");
}




// ***************************
// *** VERY IMPORTANT NOTE ***
// ***************************
// Prepare for the packit size constraint!!!

// EP3 = OUT end point. 

U8 ep3Buf[EP3_PKT_SIZE];
static U8 tempBuf[64+1];

void Ep3Handler(void)
{
    U8 out_csr3;
    int fifoCnt;
    rINDEX_REG=3;

    out_csr3=rOUT_CSR1_REG;
    
    DbgPrintf("<3:%x]",out_csr3);

    if(out_csr3 & EPO_OUT_PKT_READY)
    {   
	fifoCnt=rOUT_FIFO_CNT1_REG; 
#if 0
	RdPktEp3(ep3Buf,fifoCnt);
	PrintEpoPkt(ep3Buf,fifoCnt);
#else

	if(downloadFileSize==0)
	{
   	    RdPktEp3((U8 *)downPt,8); 	
   	    USBdownloadAddress=
    	*((U8 *)(downPt+0))+
		(*((U8 *)(downPt+1))<<8)+
		(*((U8 *)(downPt+2))<<16)+
		(*((U8 *)(downPt+3))<<24);

	    downloadFileSize=
	    *((U8 *)(downPt+4))+
		(*((U8 *)(downPt+5))<<8)+
		(*((U8 *)(downPt+6))<<16)+
		(*((U8 *)(downPt+7))<<24);

	    checkSum=0;
	    downPt=(U8 *)USBdownloadAddress;
  	    RdPktEp3_CheckSum((U8 *)downPt,fifoCnt-8); //The first 8-bytes are deleted.
  	    downPt+=fifoCnt-8;
  	    
  	#if USBDMA
     	    //CLR_EP3_OUT_PKT_READY() is not executed. 
     	    //So, USBD may generate NAK until DMA2 is configured for USB_EP3;
     	    rINTMSK|=BIT_USBD; //for debug
      	    return;	
  	#endif	
	}
	else
	{
	#if USBDMA    	
	    Uart_Printf("<ERROR>");
	#endif    
	    RdPktEp3_CheckSum((U8 *)downPt,fifoCnt); 	    
	    downPt+=fifoCnt;  //fifoCnt=64
	}
#endif
   	CLR_EP3_OUT_PKT_READY();
	return;
    }

    
    //I think that EPO_SENT_STALL will not be set to 1.
    if(out_csr3 & EPO_SENT_STALL)
    {   
   	DbgPrintf("[STALL]");
   	CLR_EP3_SENT_STALL();
   	return;
    }	
}



void PrintEpoPkt(U8 *pt,int cnt)
{
    int i;
    DbgPrintf("[BOUT:%d:",cnt);
    for(i=0;i<cnt;i++)
    	DbgPrintf("%x,",pt[i]);
    DbgPrintf("]");
}


void RdPktEp3_CheckSum(U8 *buf,int num)
{
    int i;
    	
    for(i=0;i<num;i++)
    {
        buf[i]=(U8)rEP3_FIFO;
        checkSum+=buf[i];
    }
}



void __irq IsrDma2(void)
{
    U8 out_csr3;
    U32 nextTotalDmaCount;
    U8 saveIndexReg=rINDEX_REG;

    rINDEX_REG=3;
    out_csr3=rOUT_CSR1_REG;
    
    ClearPending(BIT_DMA2);	    
    
    totalDmaCount+=0x80000;

    if(totalDmaCount>=downloadFileSize)// is last?
    {
    	totalDmaCount=downloadFileSize;
	
    	ConfigEp3IntMode();	

    	if(out_csr3& EPO_OUT_PKT_READY)
    	{
   	    CLR_EP3_OUT_PKT_READY();
	}
        rINTMSK|=BIT_DMA2;  
        rINTMSK&=~(BIT_USBD);  
    }
    else
    {
    	if((totalDmaCount+0x80000)<downloadFileSize)	
    	{
	    nextTotalDmaCount=totalDmaCount+0x80000;
    
    	    if((nextTotalDmaCount+0x80000)<downloadFileSize)
    	    {
        	//for (2~n)th autoreload.	 
		while((rDSTAT2&0xfffff)==0); //wait until autoreload occurs.
		rDIDST2=((U32)USBdownloadAddress+nextTotalDmaCount-8);  
		rDIDSTC2=(0<<1)|(0<<0);  
    	    	rDCON2=rDCON2&~(0xfffff)|(0x80000); 
    	    	
    	    	while(rEP3_DMA_TTC<0xfffff)
    	    	{
    	    	    rEP3_DMA_TTC_L=0xff;
    	    	    rEP3_DMA_TTC_M=0xff;
    	    	    rEP3_DMA_TTC_H=0xf;
    	    	    //0xfffff;
    	    	}
    	    }
 	    else
 	    {
		while((rDSTAT2&0xfffff)==0); //wait until autoreload occurs.
   	        rDIDST2=((U32)USBdownloadAddress+nextTotalDmaCount-8);  
      	        rDIDSTC2=(0<<1)|(0<<0);  
      	        rDCON2=rDCON2&~(0xfffff)|(downloadFileSize-nextTotalDmaCount); 		
    	    	while(rEP3_DMA_TTC<0xfffff)
    	    	{
    	    	    rEP3_DMA_TTC_L=0xff;
    	    	    rEP3_DMA_TTC_M=0xff;
    	    	    rEP3_DMA_TTC_H=0xf;
    	    	    //0xfffff;
    	    	}
	    }
	}
	else
	{
	    while((rDSTAT2&0xfffff)==0); //wait until autoreload occurs.
  	    rDIDST2=((U32)USBdownloadAddress+downloadFileSize-8);  //for next autoreload.	    		
  	    rDIDSTC2=(0<<1)|(0<<0);
  	    rDCON2=rDCON2&~(0xfffff)|(0); 		
		//There is no 2nd autoreload. This will not be used.  	    
	    //rDMA_TX+=0x0; //USBD register		
	}
    }
    rINDEX_REG=saveIndexReg;
}


void ClearEp3OutPktReady(void)
{
    U8 out_csr3;
    rINDEX_REG=3;
    out_csr3=rOUT_CSR1_REG;
    CLR_EP3_OUT_PKT_READY();
}