📄 ia443x_rf.lst
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440 2 SpiRfWriteAddressData((REG_WRITE | ClockRecoveryOversamplingRatio), OOKRfSettings[data_rate][1]);
441 2 SpiRfWriteAddressData((REG_WRITE | ClockRecoveryOffset2), OOKRfSettings[data_rate][2]);
442 2 SpiRfWriteAddressData((REG_WRITE | ClockRecoveryOffset1), OOKRfSettings[data_rate][3]);
443 2 SpiRfWriteAddressData((REG_WRITE | ClockRecoveryOffset0), OOKRfSettings[data_rate][4]);
444 2 SpiRfWriteAddressData((REG_WRITE | ClockRecoveryTimingLoopGain1), OOKRfSettings[data_rate][5]);
445 2 SpiRfWriteAddressData((REG_WRITE | ClockRecoveryTimingLoopGain0), OOKRfSettings[data_rate][6]);
446 2 SpiRfWriteAddressData((REG_WRITE | TXDataRate1), OOKRfSettings[data_rate][7]);
447 2 SpiRfWriteAddressData((REG_WRITE | TXDataRate0), OOKRfSettings[data_rate][8]);
448 2 ModulationModeCtrl1_reg = OOKRfSettings[data_rate][9];
449 2 SpiRfWriteAddressData((REG_WRITE | FrequencyDeviation), OOKRfSettings[data_rate][10]);
450 2 //store how long does it take to send/receive 1 byte on the given data rate
451 2 //the value represent the Timer setting, assuming, that the clock freq is 8MHz, and the timer prescaler
-is 32
452 2 ByteTime = OOKRfSettings[data_rate][11];
453 2 }
454 1 else
455 1 {//FSK or GFSK modulation
456 2 if( arib_mode == TRUE )
457 2 {//ARIB mode is selected
458 3 //check whether the input parameter valid or not
459 3 if( data_rate > (NMBR_OF_ARIB_SAMPLE_SETTING - 1))
460 3 {
461 4 return RF_ERROR_PARAMETER;
462 4 }
463 3 //set the registers according the selected RF settings
464 3 SpiRfWriteAddressData((REG_WRITE | IFFilterBandwidth), AribRfSettings[data_rate][0] );
465 3 SpiRfWriteAddressData((REG_WRITE | ClockRecoveryOversamplingRatio), AribRfSettings[data_rate][1]);
466 3 SpiRfWriteAddressData((REG_WRITE | ClockRecoveryOffset2), AribRfSettings[data_rate][2]);
467 3 SpiRfWriteAddressData((REG_WRITE | ClockRecoveryOffset1), AribRfSettings[data_rate][3]);
468 3 SpiRfWriteAddressData((REG_WRITE | ClockRecoveryOffset0), AribRfSettings[data_rate][4]);
469 3 SpiRfWriteAddressData((REG_WRITE | ClockRecoveryTimingLoopGain1), AribRfSettings[data_rate][5]);
470 3 SpiRfWriteAddressData((REG_WRITE | ClockRecoveryTimingLoopGain0), AribRfSettings[data_rate][6]);
471 3 SpiRfWriteAddressData((REG_WRITE | TXDataRate1), AribRfSettings[data_rate][7]);
472 3 SpiRfWriteAddressData((REG_WRITE | TXDataRate0), AribRfSettings[data_rate][8]);
473 3 ModulationModeCtrl1_reg = AribRfSettings[data_rate][9];
474 3 SpiRfWriteAddressData((REG_WRITE | FrequencyDeviation), AribRfSettings[data_rate][10]);
475 3 //store how long does it take to send/receive 1 byte on the given data rate
476 3 //the value represent the Timer setting, assuming, that the clock freq is 8MHz, and the timer prescaler
- is 32
477 3 ByteTime = GFSKRfSettings[data_rate][11];
478 3 }
479 2 else
480 2 {
481 3 //check whether the input parameter valid or not
482 3 if( data_rate > (NMBR_OF_GFSK_SAMPLE_SETTING - 1))
483 3 {
484 4 return RF_ERROR_PARAMETER;
485 4 }
486 3 //set the registers according the selected RF settings
487 3 SpiRfWriteAddressData((REG_WRITE | IFFilterBandwidth), GFSKRfSettings[data_rate][0] );
C51 COMPILER V8.00 IA443X_RF 11/17/2008 10:50:33 PAGE 9
488 3 SpiRfWriteAddressData((REG_WRITE | ClockRecoveryOversamplingRatio), GFSKRfSettings[data_rate][1]);
489 3 SpiRfWriteAddressData((REG_WRITE | ClockRecoveryOffset2), GFSKRfSettings[data_rate][2]);
490 3 SpiRfWriteAddressData((REG_WRITE | ClockRecoveryOffset1), GFSKRfSettings[data_rate][3]);
491 3 SpiRfWriteAddressData((REG_WRITE | ClockRecoveryOffset0), GFSKRfSettings[data_rate][4]);
492 3 SpiRfWriteAddressData((REG_WRITE | ClockRecoveryTimingLoopGain1), GFSKRfSettings[data_rate][5]);
493 3 SpiRfWriteAddressData((REG_WRITE | ClockRecoveryTimingLoopGain0), GFSKRfSettings[data_rate][6]);
494 3 SpiRfWriteAddressData((REG_WRITE | TXDataRate1), GFSKRfSettings[data_rate][7]);
495 3 SpiRfWriteAddressData((REG_WRITE | TXDataRate0), GFSKRfSettings[data_rate][8]);
496 3 ModulationModeCtrl1_reg = GFSKRfSettings[data_rate][9];
497 3 SpiRfWriteAddressData((REG_WRITE | FrequencyDeviation), GFSKRfSettings[data_rate][10]);
498 3 //store how long does it take to send/receive 1 byte on the given data rate
499 3 //the value represent the Timer setting, assuming, that the clock freq is 8MHz, and the timer prescaler
- is 32
500 3 ByteTime = GFSKRfSettings[data_rate][11];
501 3 }
502 2 }
503 1 //enable packet handler & CRC16
504 1 SpiRfWriteAddressData((REG_WRITE | ModulationModeControl1), ModulationModeCtrl1_reg);
505 1 SpiRfWriteAddressData((REG_WRITE | DataAccessControl), (RX_PACKET_HANDLER_EN | TX_PACKET_HANDLER_EN | CRC
-_16));
506 1 //set modulation mode
507 1 switch( modulation_mode )
508 1 {
509 2 case 0: temp8 = (TX_CLK_ON_GPIO | MOD_FIFO | MOD_TYPE_GFSK); break;
510 2 case 1: temp8 = (TX_CLK_ON_GPIO | MOD_FIFO | MOD_TYPE_FSK); break;
511 2 case 2: temp8 = (TX_CLK_ON_GPIO | MOD_FIFO | MOD_TYPE_OOK); break;
512 2 default: temp8 = (TX_CLK_ON_GPIO | MOD_FIFO | MOD_TYPE_GFSK); break;
513 2 }
514 1 SpiRfWriteAddressData((REG_WRITE | ModulationModeControl2), temp8);
515 1 //set preamble length & detection threshold
516 1 SpiRfWriteAddressData((REG_WRITE | PreambleLength), (PREAMBLE_LENGTH << 1));
517 1 SpiRfWriteAddressData((REG_WRITE | PreambleDetectionControl), ( PD_LENGTH << 4) );
518 1
519 1 //to get 0% PER
520 1 SpiRfWriteAddressData((REG_WRITE | ClockRecoveryGearshiftOverride), 0x03);
521 1 SpiRfWriteAddressData((REG_WRITE | AFCLoopGearshiftOverride), 0x40);
522 1 //SpiWriteAddressData((REG_WRITE | ModemTest), 0xc0);
523 1
524 1 return RF_OK;
525 1 }
526
527 /*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
528 +
529 + FUNCTION NAME: RF_ENUM RFIdle(void)
530 +
531 + DESCRIPTION: sets the transceiver and the RF stack into IDLE state,
532 + independently of the actual state of the RF stack.
533 +
534 + RETURN: RF_OK: the operation was succesfull
535 + RF_ERROR_STATE: the actualy state of the stack is aborted.
536 +
537 + NOTES:
538 +
539 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
540 RF_ENUM RFIdle(void)
541 {
542 1 uint8 temp8;
543 1
544 1 if(RfState != sRFIdle)
545 1 { //switch off everything except XTAL
546 2 temp8 = SpiRfReadRegister( OperatingFunctionControl1 );
547 2 temp8 &= 0xF1;
C51 COMPILER V8.00 IA443X_RF 11/17/2008 10:50:33 PAGE 10
548 2 SpiRfWriteAddressData((REG_WRITE | OperatingFunctionControl1), temp8);
549 2
550 2 //diasble all ITs
551 2 SpiRfWriteAddressData((REG_WRITE | InterruptEnable1), 0x00);
552 2 SpiRfWriteAddressData((REG_WRITE | InterruptEnable2), 0x00);
553 2 //release all IT flag
554 2 ItStatus1 = SpiRfReadRegister( InterruptStatus1 );
555 2 ItStatus2 = SpiRfReadRegister( InterruptStatus2 );
556 2
557 2 //disable ITs
558 2 DisableExt0It();
559 2 StopTmr2();
560 2
561 2 //set next state
562 2 RfState = sRFIdle;
563 2 }
564 1 return RF_OK;
565 1 }
566
567 /*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
568 +
569 + FUNCTION NAME: RF_ENUM RfDirectTransmit(direct_transmit_command_t * Struct)
570 +
571 + DESCRIPTION: Direct transmit
572 +
573 + RETURN: RF_OK: the operation was succesfull
574 + RF_ERROR_STATE: the actualy state of the stack is aborted.
575 +
576 + NOTES:
577 +
578 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
579 RF_ENUM RFDirectTransmit(void)
580 { //enable transmitter
581 1 uint8 temp8;
582 1
583 1 if(RfState != sRFIdle)
584 1 return RF_ERROR_STATE;
585 1
586 1 temp8 = SpiRfReadRegister( OperatingFunctionControl1 );
587 1 temp8 |= 0x09;
588 1 SpiRfWriteAddressData((REG_WRITE | OperatingFunctionControl1), temp8);
589 1
590 1 //disable all the ITs
591 1 SpiRfWriteAddressData((REG_WRITE | InterruptEnable1), 0x00);
592 1 SpiRfWriteAddressData((REG_WRITE | InterruptEnable2), 0x00);
593 1 //release all IT flag
594 1 ItStatus1 = SpiRfReadRegister( InterruptStatus1 );
595 1 ItStatus2 = SpiRfReadRegister( InterruptStatus2 );
596 1
597 1 //disable EXT IT
598 1 DisableExt0It();
599 1 //disable PHY timer
600 1 StopTmr2();
601 1
602 1 //set next state
603 1 RfState = sRFPacketSent;
604 1
605 1 return RF_OK;
606 1 }
607
608 /*+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
609 +
C51 COMPILER V8.00 IA443X_RF 11/17/2008 10:50:33 PAGE 11
610 + FUNCTION NAME: RF_ENUM RfTransmit(MESSAGE * Struct)
611 +
612 + DESCRIPTION: starts packet transmission
613 +
614 + INPUT: MESSAGE structure
615 +
616 + RETURN: RF_OK: the operation was succesfull
617 + RF_ERROR_STATE: the command is ignored, because the MAC
618 + was not in STANDBY or IDLE state.
619 + RF_ERROR_TIMING: the command is ignored, there is
620 + not enough time to wake up
621 + RF_ERROR_PARAMETER: the command is ignored, some of the
622 + input parameter(s) are
623 + out of the valid range
624 +
625 + NOTES:
626 +
627 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++*/
628 RF_ENUM RFTransmit(MESSAGE * Struct)
629 {
630 1 uint8 temp8;
631 1
632 1 if(RfState != sRFIdle)
633 1 return RF_ERROR_STATE;
634 1
635 1 //clear FIFO
636 1 temp8 = SpiRfReadRegister( OperatingFunctionControl2 );
637 1 temp8 |= 0x01;
638 1 SpiRfWriteAddressData((REG_WRITE | OperatingFunctionControl2), temp8);
639 1 temp8 &= 0xFE;
640 1 SpiRfWriteAddressData((REG_WRITE | OperatingFunctionControl2), temp8);
641 1
642 1 //set headers and filters
643 1 //bug in revX: if txhdlen[2:0] is not 0, the length handled wrong way during RX!
644 1 if( Struct -> header.enabled_headers == 0 )
645 1 {//no TX header is enabled
646 2 temp8 = SpiRfReadRegister( HeaderControl2 );
647 2 temp8 &= 0x07;
648 2 SpiRfWriteAddressData((REG_WRITE | HeaderControl2 ), temp8);
649 2 }
650 1 else
651 1 {//TODO: header and header filter are enabled - NOT YET IMPLEMENTED
652 2 }
653 1
654 1 //set packet content
655 1 SpiRfWriteAddressData((REG_WRITE | TransmitPacketLength), Struct -> length);
656 1 for(temp8=0;temp8<Struct -> length;temp8++)
657 1 {
658 2 SpiRfWriteAddressData((REG_WRITE | FIFOAccess),Struct -> payload[temp8]);
659 2 }
660 1
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