sdram_tb.map.eqn

SDRAM IPCore控制程序源代码。 请问有无usb原码

C1L54 = C1_timer_r[8] $ (C1L54_carry_eqn);

--C1L64 is sdramCntl:sdram1|add~2399
--operation mode is arithmetic

C1L64 = CARRY(C1_timer_r[8] # !C1L84);


--C1L74 is sdramCntl:sdram1|add~2402
--operation mode is arithmetic

C1L74_carry_eqn = C1L05;
C1L74 = C1_timer_r[7] $ (!C1L74_carry_eqn);

--C1L84 is sdramCntl:sdram1|add~2404
--operation mode is arithmetic

C1L84 = CARRY(!C1_timer_r[7] & (!C1L05));


--C1L94 is sdramCntl:sdram1|add~2407
--operation mode is arithmetic

C1L94_carry_eqn = C1L25;
C1L94 = C1_timer_r[6] $ (C1L94_carry_eqn);

--C1L05 is sdramCntl:sdram1|add~2409
--operation mode is arithmetic

C1L05 = CARRY(C1_timer_r[6] # !C1L25);


--C1L15 is sdramCntl:sdram1|add~2412
--operation mode is arithmetic

C1L15_carry_eqn = C1L45;
C1L15 = C1_timer_r[5] $ (!C1L15_carry_eqn);

--C1L25 is sdramCntl:sdram1|add~2414
--operation mode is arithmetic

C1L25 = CARRY(!C1_timer_r[5] & (!C1L45));


--C1L35 is sdramCntl:sdram1|add~2417
--operation mode is arithmetic

C1L35_carry_eqn = C1L65;
C1L35 = C1_timer_r[4] $ (C1L35_carry_eqn);

--C1L45 is sdramCntl:sdram1|add~2419
--operation mode is arithmetic

C1L45 = CARRY(C1_timer_r[4] # !C1L65);


--C1L55 is sdramCntl:sdram1|add~2422
--operation mode is arithmetic

C1L55_carry_eqn = C1L85;
C1L55 = C1_timer_r[3] $ (!C1L55_carry_eqn);

--C1L65 is sdramCntl:sdram1|add~2424
--operation mode is arithmetic

C1L65 = CARRY(!C1_timer_r[3] & (!C1L85));


--C1L75 is sdramCntl:sdram1|add~2427
--operation mode is arithmetic

C1L75_carry_eqn = C1L06;
C1L75 = C1_timer_r[2] $ (C1L75_carry_eqn);

--C1L85 is sdramCntl:sdram1|add~2429
--operation mode is arithmetic

C1L85 = CARRY(C1_timer_r[2] # !C1L06);


--C1L843 is sdramCntl:sdram1|timer_r[2]~2002
--operation mode is normal

C1L843 = C1_state_r.initrfsh # C1_state_r.refreshrow # C1_state_r.selfrefresh;


--C1L95 is sdramCntl:sdram1|add~2432
--operation mode is arithmetic

C1L95_carry_eqn = C1L26;
C1L95 = C1_timer_r[1] $ (!C1L95_carry_eqn);

--C1L06 is sdramCntl:sdram1|add~2434
--operation mode is arithmetic

C1L06 = CARRY(!C1_timer_r[1] & (!C1L26));


--C1L643 is sdramCntl:sdram1|timer_r[1]~2004
--operation mode is normal

C1L643 = C1_state_r.rw # C1L02 & (C1_state_r.initpchg # !C1L023);


--C1L16 is sdramCntl:sdram1|add~2437
--operation mode is arithmetic

C1L16 = !C1_timer_r[0];

--C1L26 is sdramCntl:sdram1|add~2439
--operation mode is arithmetic

C1L26 = CARRY(C1_timer_r[0]);


--C1L623 is sdramCntl:sdram1|state_x.initsetmode~204
--operation mode is normal

C1L623 = !C1L002 & !C1L243;


--C1L401 is sdramCntl:sdram1|cmd_x[5]~960
--operation mode is normal

C1L401 = C1_state_r.initwait & C1L103 & !C1L602 & !C1L702;


--C1L033 is sdramCntl:sdram1|state_x.rw~300
--operation mode is normal

C1L033 = C1L243 & C1L601;


--C1L501 is sdramCntl:sdram1|cmd_x[5]~962
--operation mode is normal

C1L501 = C1_state_r.rw & (C1L591 # !C1L381 # !C1L033);


--C1L79 is sdramCntl:sdram1|cmd_x[4]~964
--operation mode is normal

C1L79 = C1L233 & (!C1L381) # !C1L233 & (C1L002 # C1L243);


--C1L89 is sdramCntl:sdram1|cmd_x[4]~965
--operation mode is normal

C1L89 = C1L233 & (!C1L601 & !C1L611);


--C1L99 is sdramCntl:sdram1|cmd_x[4]~966
--operation mode is normal

C1L99 = B1L45 & C1L091 & (C1L79 # C1L89);


--C1L001 is sdramCntl:sdram1|cmd_x[4]~967
--operation mode is normal

C1L001 = C1L423 & (C1L591 # !C1L233 # !B1L45);


--C1L101 is sdramCntl:sdram1|cmd_x[4]~968
--operation mode is normal

C1L101 = !C1_state_r.rw & !C1_state_r.initpchg & !C1_state_r.initsetmode;


--C1L201 is sdramCntl:sdram1|cmd_x[4]~969
--operation mode is normal

C1L201 = C1L101 # C1L091 & C1L601 & !B1L45;


--C1L303 is sdramCntl:sdram1|Select~917
--operation mode is normal

C1L303 = B1_addr_r[0] & (!C1_state_r.initsetmode);


--C1L403 is sdramCntl:sdram1|Select~918
--operation mode is normal

C1L403 = B1_addr_r[1] & (!C1_state_r.initsetmode);


--C1L503 is sdramCntl:sdram1|Select~919
--operation mode is normal

C1L503 = B1_addr_r[2] & (!C1_state_r.initsetmode);


--C1L603 is sdramCntl:sdram1|Select~920
--operation mode is normal

C1L603 = B1_addr_r[3] & (!C1_state_r.initsetmode);


--C1L752 is sdramCntl:sdram1|sAddr_r[5]~44
--operation mode is normal

C1L752 = C1L602 # C1L702 # !C1_state_r.activate & !C1_state_r.initsetmode;


--C1L703 is sdramCntl:sdram1|Select~921
--operation mode is normal

C1L703 = B1_addr_r[6] & (!C1_state_r.initsetmode);


--C1L803 is sdramCntl:sdram1|Select~922
--operation mode is normal

C1L803 = B1_addr_r[7] & (!C1_state_r.initsetmode);


--C1L462 is sdramCntl:sdram1|sAddr_x[10]~670
--operation mode is normal

C1L462 = C1_state_r.initpchg # B1_addr_r[18] & C1_state_r.activate;


--C1L562 is sdramCntl:sdram1|sAddr_x[10]~671
--operation mode is normal

C1L562 = C1_rfshCntr_r[0] # !C1L002 & !C1L243 # !C1L491;


--C1L39 is sdramCntl:sdram1|cmd_x[3]~971
--operation mode is normal

C1L39 = C1_state_r.rw & C1L511 & !C1L602 & !C1L702;


--C1L133 is sdramCntl:sdram1|state_x.rw~301
--operation mode is normal

C1L133 = C1L243 & C1L601 # !C1L243 & (C1L002);


--C1L49 is sdramCntl:sdram1|cmd_x[3]~972
--operation mode is normal

C1L49 = C1L39 & (C1L591 # !C1L133) # !C1L78;


--C1L59 is sdramCntl:sdram1|cmd_x[3]~973
--operation mode is normal

C1L59 = !C1L502 & (C1_state_r.refreshrow # C1_state_r.initpchg # C1_state_r.initsetmode);


--B1L15 is memTest:memt|err_x~51
--operation mode is normal

B1L15 = B1_err & (B1_state_r.stop & bt_doAgain_n # !C1L143);


--C1_hDOut_r[17] is sdramCntl:sdram1|hDOut_r[17]
--operation mode is normal

C1_hDOut_r[17]_lut_out = C1_sData_r[17];
C1_hDOut_r[17] = DFFEAS(C1_hDOut_r[17]_lut_out, clk, rst_n, , C1_rdPipeline_r[1], , , , );


--D1_r_r[17] is memTest:memt|randGen:u0|r_r[17]
--operation mode is normal

D1_r_r[17]_lut_out = D1_r_r[16] # !bt_doAgain_n & B1_state_r.stop # !B1L35;
D1_r_r[17] = DFFEAS(D1_r_r[17]_lut_out, clk, VCC, , B1L94, , , , );


--C1_hDOut_r[16] is sdramCntl:sdram1|hDOut_r[16]
--operation mode is normal

C1_hDOut_r[16]_lut_out = C1_sData_r[16];
C1_hDOut_r[16] = DFFEAS(C1_hDOut_r[16]_lut_out, clk, rst_n, , C1_rdPipeline_r[1], , , , );


--D1_r_r[16] is memTest:memt|randGen:u0|r_r[16]
--operation mode is normal

D1_r_r[16]_lut_out = D1_r_r[15] # !bt_doAgain_n & B1_state_r.stop # !B1L35;
D1_r_r[16] = DFFEAS(D1_r_r[16]_lut_out, clk, VCC, , B1L94, , , , );


--B1L36 is memTest:memt|reduce_or~569
--operation mode is normal

B1L36 = C1_hDOut_r[17] & (C1_hDOut_r[16] $ D1_r_r[16] # !D1_r_r[17]) # !C1_hDOut_r[17] & (D1_r_r[17] # C1_hDOut_r[16] $ D1_r_r[16]);


--C1_hDOut_r[1] is sdramCntl:sdram1|hDOut_r[1]
--operation mode is normal

C1_hDOut_r[1]_lut_out = C1_sData_r[1];
C1_hDOut_r[1] = DFFEAS(C1_hDOut_r[1]_lut_out, clk, rst_n, , C1_rdPipeline_r[1], , , , );


--D1_r_r[1] is memTest:memt|randGen:u0|r_r[1]
--operation mode is normal

D1_r_r[1]_lut_out = D1_r_r[0] # !bt_doAgain_n & B1_state_r.stop # !B1L35;
D1_r_r[1] = DFFEAS(D1_r_r[1]_lut_out, clk, VCC, , B1L94, , , , );


--C1_hDOut_r[21] is sdramCntl:sdram1|hDOut_r[21]
--operation mode is normal

C1_hDOut_r[21]_lut_out = C1_sData_r[21];
C1_hDOut_r[21] = DFFEAS(C1_hDOut_r[21]_lut_out, clk, rst_n, , C1_rdPipeline_r[1], , , , );


--D1_r_r[21] is memTest:memt|randGen:u0|r_r[21]
--operation mode is normal

D1_r_r[21]_lut_out = D1_r_r[20] # !bt_doAgain_n & B1_state_r.stop # !B1L35;
D1_r_r[21] = DFFEAS(D1_r_r[21]_lut_out, clk, VCC, , B1L94, , , , );


--B1L46 is memTest:memt|reduce_or~570
--operation mode is normal

B1L46 = C1_hDOut_r[1] & (C1_hDOut_r[21] $ D1_r_r[21] # !D1_r_r[1]) # !C1_hDOut_r[1] & (D1_r_r[1] # C1_hDOut_r[21] $ D1_r_r[21]);


--C1_hDOut_r[20] is sdramCntl:sdram1|hDOut_r[20]
--operation mode is normal

C1_hDOut_r[20]_lut_out = C1_sData_r[20];
C1_hDOut_r[20] = DFFEAS(C1_hDOut_r[20]_lut_out, clk, rst_n, , C1_rdPipeline_r[1], , , , );


--D1_r_r[20] is memTest:memt|randGen:u0|r_r[20]
--operation mode is normal

D1_r_r[20]_lut_out = D1_r_r[19] # !bt_doAgain_n & B1_state_r.stop # !B1L35;
D1_r_r[20] = DFFEAS(D1_r_r[20]_lut_out, clk, VCC, , B1L94, , , , );


--C1_hDOut_r[9] is sdramCntl:sdram1|hDOut_r[9]
--operation mode is normal

C1_hDOut_r[9]_lut_out = C1_sData_r[9];
C1_hDOut_r[9] = DFFEAS(C1_hDOut_r[9]_lut_out, clk, rst_n, , C1_rdPipeline_r[1], , , , );


--D1_r_r[9] is memTest:memt|randGen:u0|r_r[9]
--operation mode is normal

D1_r_r[9]_lut_out = D1_r_r[8] # !bt_doAgain_n & B1_state_r.stop # !B1L35;
D1_r_r[9] = DFFEAS(D1_r_r[9]_lut_out, clk, VCC, , B1L94, , , , );


--B1L56 is memTest:memt|reduce_or~571
--operation mode is normal

B1L56 = C1_hDOut_r[20] & (C1_hDOut_r[9] $ D1_r_r[9] # !D1_r_r[20]) # !C1_hDOut_r[20] & (D1_r_r[20] # C1_hDOut_r[9] $ D1_r_r[9]);


--C1_hDOut_r[10] is sdramCntl:sdram1|hDOut_r[10]
--operation mode is normal

C1_hDOut_r[10]_lut_out = C1_sData_r[10];
C1_hDOut_r[10] = DFFEAS(C1_hDOut_r[10]_lut_out, clk, rst_n, , C1_rdPipeline_r[1], , , , );


--D1_r_r[10] is memTest:memt|randGen:u0|r_r[10]
--operation mode is normal

D1_r_r[10]_lut_out = D1_r_r[9] # !bt_doAgain_n & B1_state_r.stop # !B1L35;
D1_r_r[10] = DFFEAS(D1_r_r[10]_lut_out, clk, VCC, , B1L94, , , , );


--C1_hDOut_r[4] is sdramCntl:sdram1|hDOut_r[4]
--operation mode is normal

C1_hDOut_r[4]_lut_out = C1_sData_r[4];
C1_hDOut_r[4] = DFFEAS(C1_hDOut_r[4]_lut_out, clk, rst_n, , C1_rdPipeline_r[1], , , , );


--D1_r_r[4] is memTest:memt|randGen:u0|r_r[4]
--operation mode is normal

D1_r_r[4]_lut_out = D1_r_r[3] # !bt_doAgain_n & B1_state_r.stop # !B1L35;
D1_r_r[4] = DFFEAS(D1_r_r[4]_lut_out, clk, VCC, , B1L94, , , , );


--B1L66 is memTest:memt|reduce_or~572
--operation mode is normal

B1L66 = C1_hDOut_r[10] & (C1_hDOut_r[4] $ D1_r_r[4] # !D1_r_r[10]) # !C1_hDOut_r[10] & (D1_r_r[10] # C1_hDOut_r[4] $ D1_r_r[4]);


--B1L76 is memTest:memt|reduce_or~573
--operation mode is normal

B1L76 = B1L36 # B1L46 # B1L56 # B1L66;


--C1_hDOut_r[23] is sdramCntl:sdram1|hDOut_r[23]
--operation mode is normal

C1_hDOut_r[23]_lut_out = C1_sData_r[23];
C1_hDOut_r[23] = DFFEAS(C1_hDOut_r[23]_lut_out, clk, rst_n, , C1_rdPipeline_r[1], , , , );


--D1_r_r[23] is memTest:memt|randGen:u0|r_r[23]
--operation mode is normal

D1_r_r[23]_lut_out = D1_r_r[22] # !bt_doAgain_n & B1_state_r.stop # !B1L35;
D1_r_r[23] = DFFEAS(D1_r_r[23]_lut_out, clk, VCC, , B1L94, , , , );


--C1_hDOut_r[22] is sdramCntl:sdram1|hDOut_r[22]
--operation mode is normal

C1_hDOut_r[22]_lut_out = C1_sData_r[22];
C1_hDOut_r[22] = DFFEAS(C1_hDOut_r[22]_lut_out, clk, rst_n, , C1_rdPipeline_r[1], , , , );


--D1_r_r[22] is memTest:memt|randGen:u0|r_r[22]
--operation mode is normal

D1_r_r[22]_lut_out = D1_r_r[21] # !bt_doAgain_n & B1_state_r.stop # !B1L35;
D1_r_r[22] = DFFEAS(D1_r_r[22]_lut_out, clk, VCC, , B1L94, , , , );


--B1L86 is memTest:memt|reduce_or~574
--operation mode is normal

B1L86 = C1_hDOut_r[23] & (C1_hDOut_r[22] $ D1_r_r[22] # !D1_r_r[23]) # !C1_hDOut_r[23] & (D1_r_r[23] # C1_hDOut_r[22] $ D1_r_r[22]);


--C1_hDOut_r[13] is sdramCntl:sdram1|hDOut_r[13]
--operation mode is normal

C1_hDOut_r[13]_lut_out = C1_sData_r[13];
C1_hDOut_r[13] = DFFEAS(C1_hDOut_r[13]_lut_out, clk, rst_n, , C1_rdPipeline_r[1], , , , );


--D1_r_r[13] is memTest:memt|randGen:u0|r_r[13]
--operation mode is normal

D1_r_r[13]_lut_out = D1_r_r[12] # !bt_doAgain_n & B1_state_r.stop # !B1L35;
D1_r_r[13] = DFFEAS(D1_r_r[13]_lut_out, clk, VCC, , B1L94, , , , );


--C1_hDOut_r[2