sd_state.fit

sdram的控制程序

-- MAX+plus II Compiler Fit File      
-- Version 10.0 9/14/2000             
-- Compiled: 04/19/2009 21:59:40      

-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "sd_state"
BEGIN

    DEVICE = "EPM9320LC84-15";

    "clk"                          : INPUT_PIN  = 1      ;
    "cmnd_cycle_req"               : INPUT_PIN  = 13     ;
    "rfrsh_req"                    : INPUT_PIN  = 84     ;
    "rst_l"                        : INPUT_PIN  = 72     ;
    "sdram_cs_l"                   : INPUT_PIN  = 23     ;
    "sdram_cycle0"                 : OUTPUT_PIN = 22     ;
    "sdram_cycle1"                 : OUTPUT_PIN = 63     ;
    "sdram_cycle2"                 : OUTPUT_PIN = 62     ;
    "sdram_cycle3"                 : OUTPUT_PIN = 34     ;
    "state_cntr0"                  : OUTPUT_PIN = 11     ;
    "state_cntr1"                  : OUTPUT_PIN = 33     ;
    "state_cntr2"                  : OUTPUT_PIN = 12     ;
    "state_cntr3"                  : OUTPUT_PIN = 31     ;
    ":14"                          : LOCATION   = LC4_B1 ;  -- sdram_cycle_sig3
    ":15"                          : LOCATION   = LC9_B1 ;  -- sdram_cycle_sig2
    ":16"                          : LOCATION   = LC11_B1;  -- sdram_cycle_sig1
    ":17"                          : LOCATION   = LC15_B1;  -- sdram_cycle_sig0
    ":18"                          : LOCATION   = LC1_B1 ;  -- state_cntr_sig3
    ":19"                          : LOCATION   = LC2_B1 ;  -- state_cntr_sig2
    ":20"                          : LOCATION   = LC3_B1 ;  -- state_cntr_sig1
    ":21"                          : LOCATION   = LC5_B1 ;  -- state_cntr_sig0

END;

INTERNAL_INFO "sd_state"
BEGIN
	DEVICE = EPM9320LC84-15;
    OD1P1   : LORAX = "1:->LC5_B1,->LC3_B1,->LC2_B1,->LC1_B1,->LC15_B1,->LC11_B1,->LC9_B1,->LC4_B1|";
    OD0P13  : LORAX = "1:G58R1,PA31R1C0->LC4_B1,->LC9_B1,->LC11_B1,->LC15_B1|";
    OD2P84  : LORAX = "1:G70R1,PA21R1C0->LC4_B1,->LC15_B1|";
    OD3P72  : LORAX = "1:G71R1,PA24R1C0->LC4_B1,->LC9_B1,->LC11_B1,->LC15_B1,->LC1_B1,->LC2_B1,->LC3_B1,->LC5_B1|";
    OH8R1P23 : LORAX = "1:G89R1,PA17R1C0->LC4_B1,->LC9_B1,->LC15_B1|";
    LC4_B1  : LORAX = "1:V11C0->OV18C0P34|";
    LC9_B1  : LORAX = "1:G49R1->OH9R1P62|";
    LC11_B1 : LORAX = "1:G61R1->OH13R1P63|";
    LC15_B1 : LORAX = "1:G86R1->OH12R1P22|";
    LC1_B1  : LORAX = "1:V0C0->OV2C0P31|";
    LC2_B1  : LORAX = "1:V3C0->OV3C0P12|";
    LC3_B1  : LORAX = "1:V7C0->OV14C0P33|";
    LC5_B1  : LORAX = "1:V12C0->OV7C0P11|";
END;