📄 q15tofl.asm
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;***********************************************************
; Version 2.20.01
;***********************************************************
;****************************************************************
; Function: q15tofl
; Description: converts Q15 to IEEE floating point
;
; Copyright Texas instruments Inc, 1998
;----------------------------------------------------------------
; Revision History:
; 1.00 - K. Baldwin. Original Beta Release 8/31/98
;****************************************************************
.mmregs
;----------------------------------------------------------------
; Set stack save size for return address depending on FAR_MODE
; usage
;----------------------------------------------------------------
.if __far_mode
.asg 2, offset
.else
.asg 1, offset
.endif
;----------------------------------------------------------------
; Set frame size for local variable space on stack
;----------------------------------------------------------------
.if __far_mode
.asg 8, frame_sz
.else
.asg 7, frame_sz
.endif
reg_save_sz .set 2
;----------------------------------------------------------------
; Set stack offsets to function arguments
;----------------------------------------------------------------
.asg offset + frame_sz + reg_save_sz, arg_offset
.asg arg_offset + 0, arg_r
.asg arg_offset + 1, arg_na
;----------------------------------------------------------------
; Set stack offsets to local variables
;----------------------------------------------------------------
.asg 0, mask_significant_bit
.asg 2, sign_bit
.asg 3, exponent
.asg 4, exp_bias
.asg 5, minus_one
.asg 6, one
;----------------------------------------------------------------
; Assign auxiliary registers for temporaries and address
; calculations.
;----------------------------------------------------------------
.asg AR2, reg_aptr
.asg AR3, reg_rptr
;----------------------------------------------------------------
; Function definition:
;----------------------------------------------------------------
.global _q15tofl
_q15tofl
PSHM ST0 ; 1 cycle
PSHM ST1 ; 1 cycle
RSBX OVA ; 1 cycle
RSBX OVB ; 1 cycle
;----------------------------------------------------------------
; Prologue: establish local frame, reset sign extension mode
;----------------------------------------------------------------
frame #-frame_sz ; 1 cycle
rsbx ovm ; 1 cycle
rsbx sxm ; 1 cycle
;----------------------------------------------------------------
; Process function arguments
;----------------------------------------------------------------
stlm a, reg_aptr ; 1 cycle
mvdk *sp(arg_r), reg_rptr ; 1 cycle
ld *sp(arg_na), b ; 1 cycle
sub #1, b ; 2 cycles
stlm b, BRC ; 1 cycle
;----------------------------------------------------------------
; Store function constants
;----------------------------------------------------------------
st #127, *sp(exp_bias) ; 2 cycles
st #08000h, *sp(minus_one) ; 2 cycles
st #1, *sp(one) ; 2 cycles
st #03fffh, *sp(mask_significant_bit) ; 2 cycles
st #0ffffh, *sp(mask_significant_bit+1) ; 2 cycles
ssbx sxm ; 1 cycle
;----------------------------------------------------------------
; Convert each element of vector A, to Q15 format
; Pre-Load first vector element
;----------------------------------------------------------------
rptbd end_loop-1 ; 2 cycles
ld *reg_aptr+, 16, a ; 1 cycle - delay slot
nop ; 1 cycle - delay slot
loop_start:
bc zero, AEQ ; 5 cycles
cmpm *(AH), #07fffh ; 2 cycles
bcd not_q_one, NTC ; 3 cycles
and #08000h, 16, a, b ; 2 cycles
ld #0000h,16,a ; 2 cycles
not_q_one:
abs a ; 1 cycle
;----------------------------------------------------------------
; Shift right by one, since exp and norm never count shift into
; upper most bit (bit 31)
;----------------------------------------------------------------
sfta a,#-1,a ; 1 cycle
exp a ; 1 cycle
sth b,*sp(sign_bit) ; 1 cycle
nop ; 1 cycle , necessary do not remove
norm a ; 1 cycle
ldm T, b ; 1 cycle
neg b ; 1 cycle
add *sp(exp_bias), b ; 1 cycle
stl b, *sp(exponent) ; 1 cycle
;----------------------------------------------------------------
; Remove upper most bit as this becomes an implicit 1
; 2^exp * (1.f) where f is mantissa
;----------------------------------------------------------------
dld *sp(mask_significant_bit), b ; 1 cycle
and b,a ; 2 cycles
sfta a, #-7,a ; 1 cycle
ld *sp(exponent),#7,b ; 2 cycles
or *sp(sign_bit),b ; 1 cycle
ld *(BL),16,b ; 2 cycles - delay slot
or b,a ; 1 cycle - delay slot
zero:
store_result:
dst a, *reg_rptr+ ; 1 cycle
ld *reg_aptr+, 16, a ; 1 cycle
end_loop:
;----------------------------------------------------------------
; Return to calling program.
;----------------------------------------------------------------
Epilogue:
frame #frame_sz ; 1 cycle
POPM ST1
POPM ST0
.if __far_mode
fret ; 6 cycles
.else
ret ; 5 cycles
.endif
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