📄 rdio.lst
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A51 MACRO ASSEMBLER RDIO 03/21/2008 00:23:12 PAGE 1
MACRO ASSEMBLER A51 V7.10
OBJECT MODULE PLACED IN RDIO.OBJ
ASSEMBLER INVOKED BY: C:\Keil\C51\BIN\A51.EXE RDIO.SRC SET(LARGE) DEBUG XREF EP
LOC OBJ LINE SOURCE
1 ; .\RDIO.SRC generated from: RDIO.C
2 ; COMPILER INVOKED BY:
3 ; C:\Keil\C51\BIN\C51.EXE RDIO.C LARGE WARNINGLEVEL(0) BROWSE INCDIR(D:\UsefulDocume
nt\Mifare\MF RC500\MFRC500 Demo Reader\RC500\For Test) DEBUG OBJECTEXTEND CODE LISTINCLUDE SYMBOLS SRC(.\RDIO.SRC)
4
5 $nomod51
6
7 NAME RDIO
8
0080 9 P0 DATA 080H
0090 10 P1 DATA 090H
00A0 11 P2 DATA 0A0H
00B0 12 P3 DATA 0B0H
00D6 13 AC BIT 0D0H.6
00B4 14 T0 BIT 0B0H.4
00B5 15 T1 BIT 0B0H.5
00AF 16 EA BIT 0A8H.7
00AE 17 EC BIT 0A8H.6
00F9 18 CH DATA 0F9H
00A8 19 IE DATA 0A8H
00E9 20 CL DATA 0E9H
0080 21 P0_0 BIT 080H.0
0090 22 P1_0 BIT 090H.0
0081 23 P0_1 BIT 080H.1
00FA 24 CCAP0H DATA 0FAH
00D1 25 FL BIT 0D0H.1
00A0 26 P2_0 BIT 0A0H.0
0091 27 P1_1 BIT 090H.1
0082 28 P0_2 BIT 080H.2
00FB 29 CCAP1H DATA 0FBH
00B0 30 P3_0 BIT 0B0H.0
00A1 31 P2_1 BIT 0A0H.1
0092 32 P1_2 BIT 090H.2
0083 33 P0_3 BIT 080H.3
00FC 34 CCAP2H DATA 0FCH
00B1 35 P3_1 BIT 0B0H.1
00A2 36 P2_2 BIT 0A0H.2
0093 37 P1_3 BIT 090H.3
0084 38 P0_4 BIT 080H.4
00FD 39 CCAP3H DATA 0FDH
00B2 40 P3_2 BIT 0B0H.2
00A3 41 P2_3 BIT 0A0H.3
0094 42 P1_4 BIT 090H.4
0085 43 P0_5 BIT 080H.5
00FE 44 CCAP4H DATA 0FEH
00EA 45 CCAP0L DATA 0EAH
00B7 46 RD BIT 0B0H.7
00B3 47 P3_3 BIT 0B0H.3
00A4 48 P2_4 BIT 0A0H.4
0095 49 P1_5 BIT 090H.5
00CE 50 EXF2 BIT 0C8H.6
0086 51 P0_6 BIT 080H.6
00EB 52 CCAP1L DATA 0EBH
00DA 53 CCAPM0 DATA 0DAH
00B4 54 P3_4 BIT 0B0H.4
00A5 55 P2_5 BIT 0A0H.5
0096 56 P1_6 BIT 090H.6
0087 57 P0_7 BIT 080H.7
A51 MACRO ASSEMBLER RDIO 03/21/2008 00:23:12 PAGE 2
00EC 58 CCAP2L DATA 0ECH
00DB 59 CCAPM1 DATA 0DBH
00B5 60 P3_5 BIT 0B0H.5
00AC 61 ES BIT 0A8H.4
00A6 62 P2_6 BIT 0A0H.6
0097 63 P1_7 BIT 090H.7
00ED 64 CCAP3L DATA 0EDH
00DC 65 CCAPM2 DATA 0DCH
00B6 66 P3_6 BIT 0B0H.6
00A7 67 P2_7 BIT 0A0H.7
00EE 68 CCAP4L DATA 0EEH
00DD 69 CCAPM3 DATA 0DDH
00B8 70 IP DATA 0B8H
00B7 71 P3_7 BIT 0B0H.7
00DE 72 CCAPM4 DATA 0DEH
0098 73 RI BIT 098H.0
00D7 74 CY BIT 0D0H.7
00B2 75 INT0 BIT 0B0H.2
00B3 76 INT1 BIT 0B0H.3
0099 77 TI BIT 098H.1
00CB 78 RCAP2H DATA 0CBH
00BC 79 PS BIT 0B8H.4
0081 80 SP DATA 081H
00D9 81 CMOD DATA 0D9H
00D8 82 CCON DATA 0D8H
00D2 83 OV BIT 0D0H.2
00CA 84 RCAP2L DATA 0CAH
00B6 85 WR BIT 0B0H.6
00C9 86 C_T2 BIT 0C8H.1
00CD 87 RCLK BIT 0C8H.5
00CC 88 TCLK BIT 0C8H.4
0099 89 SBUF DATA 099H
0087 90 PCON DATA 087H
0098 91 SCON DATA 098H
0089 92 TMOD DATA 089H
0088 93 TCON DATA 088H
0089 94 IE0 BIT 088H.1
008B 95 IE1 BIT 088H.3
00F0 96 B DATA 0F0H
008E 97 AUXR DATA 08EH
00C8 98 CP_RL2 BIT 0C8H.0
00E0 99 ACC DATA 0E0H
00A9 100 ET0 BIT 0A8H.1
00AB 101 ET1 BIT 0A8H.3
008D 102 TF0 BIT 088H.5
00AD 103 ET2 BIT 0A8H.5
008F 104 TF1 BIT 088H.7
009A 105 RB8 BIT 098H.2
00CF 106 TF2 BIT 0C8H.7
008C 107 TH0 DATA 08CH
00A8 108 EX0 BIT 0A8H.0
0088 109 IT0 BIT 088H.0
008D 110 TH1 DATA 08DH
00AA 111 EX1 BIT 0A8H.2
009B 112 TB8 BIT 098H.3
008A 113 IT1 BIT 088H.2
00CD 114 TH2 DATA 0CDH
00D0 115 P BIT 0D0H.0
009F 116 SM0 BIT 098H.7
008A 117 TL0 DATA 08AH
009E 118 SM1 BIT 098H.6
008B 119 TL1 DATA 08BH
009D 120 SM2 BIT 098H.5
00CC 121 TL2 DATA 0CCH
00B9 122 PT0 BIT 0B8H.1
00D3 123 RS0 BIT 0D0H.3
A51 MACRO ASSEMBLER RDIO 03/21/2008 00:23:12 PAGE 3
00BB 124 PT1 BIT 0B8H.3
00D4 125 RS1 BIT 0D0H.4
00BD 126 PT2 BIT 0B8H.5
008C 127 TR0 BIT 088H.4
008E 128 TR1 BIT 088H.6
00B8 129 PX0 BIT 0B8H.0
00CA 130 TR2 BIT 0C8H.2
00BA 131 PX1 BIT 0B8H.2
0083 132 DPH DATA 083H
0082 133 DPL DATA 082H
00B7 134 IPH DATA 0B7H
00CB 135 EXEN2 BIT 0C8H.3
009C 136 REN BIT 098H.4
00C9 137 T2MOD DATA 0C9H
00C8 138 T2CON DATA 0C8H
00B9 139 SADEN DATA 0B9H
00B0 140 RXD BIT 0B0H.0
00C4 141 PMR DATA 0C4H
00A9 142 SADDR DATA 0A9H
00B1 143 TXD BIT 0B0H.1
00A2 144 AUXR1 DATA 0A2H
00D5 145 F0 BIT 0D0H.5
00D0 146 PSW DATA 0D0H
147 ?PR?OpenIO?RDIO SEGMENT CODE
148 ?PR?CloseIO?RDIO SEGMENT CODE
149 ?PR?_WriteIO?RDIO SEGMENT CODE
150 ?PR?_ReadIO?RDIO SEGMENT CODE
151 ?XD?RDIO SEGMENT XDATA
152 ?PR?_WriteIOBlock?RDIO SEGMENT CODE
153 ?XD?_WriteIOBlock?RDIO SEGMENT XDATA OVERLAYABLE
154 ?PR?_ReadIOBlock?RDIO SEGMENT CODE
155 ?XD?_ReadIOBlock?RDIO SEGMENT XDATA OVERLAYABLE
156 ?C_INITSEG SEGMENT CODE
157 EXTRN CODE (?C?CLDOPTR)
158 EXTRN CODE (?C?CSTOPTR)
159 PUBLIC ini
160 PUBLIC GpBase
161 PUBLIC _ReadIOBlock
162 PUBLIC _WriteIOBlock
163 PUBLIC _ReadIO
164 PUBLIC _WriteIO
165 PUBLIC CloseIO
166 PUBLIC OpenIO
167
---- 168 XSEG AT 07F00H
7F00 169 ini: DS 1
170
---- 171 RSEG ?XD?_ReadIOBlock?RDIO
0000 172 ?_ReadIOBlock?BYTE:
0000 173 len?548: DS 2
174
---- 175 RSEG ?XD?RDIO
0000 176 cnt?549: DS 2
177
---- 178 RSEG ?XD?_WriteIOBlock?RDIO
0000 179 ?_WriteIOBlock?BYTE:
0000 180 Addr_Data?444: DS 3
0003 181 len?445: DS 2
182
---- 183 RSEG ?XD?RDIO
0002 184 cnt?446: DS 2
185
---- 186 RSEG ?XD?RDIO
0004 187 c?343: DS 1
0005 188 GpBase: DS 2
189
A51 MACRO ASSEMBLER RDIO 03/21/2008 00:23:12 PAGE 4
---- 190 RSEG ?C_INITSEG
0000 42 191 DB 042H
0001 0000 F 192 DW GpBase
0003 7F00 193 DW ini + 0
194
195 ; ///////////////////////////////////////////////////////////////////////////////
196 ; // Copyright (c), Philips Semiconductors Gratkorn
197 ; //
198 ; // (C)PHILIPS Electronics N.V.2000
199 ; // All rights are reserved. Reproduction in whole or in part is
200 ; // prohibited without the written consent of the copyright owner.
201 ; // Philips reserves the right to make changes without notice at any time.
202 ; // Philips makes no warranty, expressed, implied or statutory, including but
203 ; // not limited to any implied warranty of merchantibility or fitness for any
204 ; //particular purpose, or that the use will not infringe any third party patent,
205 ; // copyright or trademark. Philips must not be liable for any loss or damage
206 ; // arising from its use.
207 ; ///////////////////////////////////////////////////////////////////////////////
208 ; #include <rdio.h>
209 ; //#include <main.h>
210 ; #include <p89c51rx.h>
211 ;
212 ; ///////////////////////////////////////////////////////////////////////////////
213 ; // Module Definitions
214 ; ///////////////////////////////////////////////////////////////////////////////
215 ; #define GetRegPage(adr) (0x80 | (adr>>3))
216 ;
217 ; unsigned char xdata ini _at_ 0x7f00; // move base address to 0x7f00
218 ; unsigned char xdata *GpBase = &ini ; // redirect pointer to base address
219 ;
220 ; ///////////////////////////////////////////////////////////////////////////////
221 ; // Open Reader Communication
222 ; ///////////////////////////////////////////////////////////////////////////////
223 ; char OpenIO(void)
224
---- 225 RSEG ?PR?OpenIO?RDIO
0000 226 OpenIO:
227 USING 0
228 ; SOURCE LINE # 29
229 ; {
230 ; SOURCE LINE # 30
231 ; GpBase = &ini;
232 ; SOURCE LINE # 31
0000 900000 F 233 MOV DPTR,#GpBase
0003 747F 234 MOV A,#HIGH (ini)
0005 F0 235 MOVX @DPTR,A
0006 A3 236 INC DPTR
0007 7400 237 MOV A,#LOW (ini)
0009 F0 238 MOVX @DPTR,A
239 ; P2_7 = 0; // Enable the CS for RC500
240 ; SOURCE LINE # 32
000A D2A7 241 SETB P2_7
242 ; return 0x00;
243 ; SOURCE LINE # 33
000C 7F00 244 MOV R7,#00H
245 ; }
246 ; SOURCE LINE # 34
000E 247 ?C0001:
000E 22 248 RET
249 ; END OF OpenIO
250
251 ;
252 ; ///////////////////////////////////////////////////////////////////////////////
253 ; // Close Reader Communication
254 ; ///////////////////////////////////////////////////////////////////////////////
255 ; void CloseIO(void)
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