cnt3.vhd

微波炉控制器的设计

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY CNT3 IS
PORT(
	CLK:IN STD_LOGIC; 
   	CQ:OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
	CARRY_OUT:OUT STD_LOGIC );
END CNT3;
ARCHITECTURE ART OF CNT3 IS
SIGNAL CQI:STD_LOGIC_VECTOR(3 DOWNTO 0);
BEGIN
PROCESS(CLK)
BEGIN
    
    IF CLK'EVENT AND CLK='1' THEN         
			IF CQI="0011" THEN CQI<="0000";
			ELSE CQI<=CQI+'1';
			END IF;
           END IF;      
    END PROCESS;
   PROCESS(CQI)IS
        BEGIN
       
           IF CQI="0011"THEN CARRY_OUT<='0';
           ELSE CARRY_OUT<='1';END IF;
        
       END PROCESS;
CQ<=CQI;
END ART;