cnt10.vhd

微波炉控制器的设计

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY CNT10 IS
PORT(
	CLK:IN STD_LOGIC;
    CLR:IN STD_LOGIC;
	ENA: IN STD_LOGIC;
   	CQ:OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
	CARRY_OUT:OUT STD_LOGIC );
END CNT10;
ARCHITECTURE ART OF CNT10 IS
SIGNAL CQI:STD_LOGIC_VECTOR(3 DOWNTO 0);
BEGIN
PROCESS(CLK,CLR,ENA)
BEGIN
    IF CLR='1' THEN CQI<="0000";--异步清零
    ELSIF CLK'EVENT AND CLK='1' THEN
         IF ENA='1' THEN --同步使能
			IF CQI="1001" THEN CQI<="0000";
			ELSE CQI<=CQI+'1';
			END IF;
           END IF;
        END IF;
    END PROCESS;
    PROCESS(CQI)
    BEGIN 
        IF CQI="0000"THEN CARRY_OUT<='1';
             ELSE CARRY_OUT<='0';
			END IF;
    END PROCESS;
    CQ<=CQI;
END ART;