93c46.lst

93c46读写程序

 838   5                                break;
 839   5                                case 8:
 840   5                                P0=disp_code[eeprom_data[7]];
 841   5                                        disp_bit7=0;
 842   5                                        disp_bit=0x00;
 843   5                                break;
 844   5                                default:break;
 845   5                             }
 846   4                               break;
 847   4                         case 4:
 848   4                                 switch(disp_bit)
 849   4                             {
 850   5                                case 1:
 851   5                            P0=disp_code[eeprom_data[0]];
 852   5                                        disp_bit0=0;
 853   5                                break;
 854   5                                case 2:
 855   5                                P0=disp_code[eeprom_data[1]];
 856   5                                        disp_bit1=0;
 857   5                                break;
 858   5                                case 3:
 859   5                                P0=disp_code[eeprom_data[2]];
 860   5                                        disp_bit2=0;
 861   5                                break;
C51 COMPILER V7.07   93C46                                                                 05/15/2008 11:31:32 PAGE 15  

 862   5                                case 4:
 863   5                                P0=0xff;
 864   5                                        disp_bit3=0;
 865   5                                break;
 866   5                                case 5:
 867   5                                P0=disp_code[eeprom_data[4]];
 868   5                                        disp_bit4=0;
 869   5                                break;
 870   5                                case 6:
 871   5                                P0=disp_code[eeprom_data[5]];
 872   5                                        disp_bit5=0;
 873   5                                break;
 874   5                                case 7:
 875   5                                P0=disp_code[eeprom_data[6]];
 876   5                                        disp_bit6=0;
 877   5                                break;
 878   5                                case 8:
 879   5                                P0=disp_code[eeprom_data[7]];
 880   5                                        disp_bit7=0;
 881   5                                        disp_bit=0x00;
 882   5                                break;
 883   5                                default:break;
 884   5                             }
 885   4                               break;
 886   4                         case 5:
 887   4                                switch(disp_bit)
 888   4                             {
 889   5                                case 1:
 890   5                            P0=disp_code[eeprom_data[0]];
 891   5                                        disp_bit0=0;
 892   5                                break;
 893   5                                case 2:
 894   5                                P0=disp_code[eeprom_data[1]];
 895   5                                        disp_bit1=0;
 896   5                                break;
 897   5                                case 3:
 898   5                                P0=disp_code[eeprom_data[2]];
 899   5                                        disp_bit2=0;
 900   5                                break;
 901   5                                case 4:
 902   5                                P0=disp_code[eeprom_data[3]];
 903   5                                        disp_bit3=0;
 904   5                                break;
 905   5                                case 5:
 906   5                                P0=0xff;
 907   5                                        disp_bit4=0;
 908   5                                break;
 909   5                                case 6:
 910   5                                P0=disp_code[eeprom_data[5]];
 911   5                                        disp_bit5=0;
 912   5                                break;
 913   5                                case 7:
 914   5                                P0=disp_code[eeprom_data[6]];
 915   5                                        disp_bit6=0;
 916   5                                break;
 917   5                                case 8:
 918   5                                P0=disp_code[eeprom_data[7]];
 919   5                                        disp_bit7=0;
 920   5                                        disp_bit=0x00;
 921   5                                break;
 922   5                                default:break;
 923   5                             }
C51 COMPILER V7.07   93C46                                                                 05/15/2008 11:31:32 PAGE 16  

 924   4                               break;
 925   4                         case 6:
 926   4                                switch(disp_bit)
 927   4                             {
 928   5                                case 1:
 929   5                            P0=disp_code[eeprom_data[0]];
 930   5                                        disp_bit0=0;
 931   5                                break;
 932   5                                case 2:
 933   5                                P0=disp_code[eeprom_data[1]];
 934   5                                        disp_bit1=0;
 935   5                                break;
 936   5                                case 3:
 937   5                                P0=disp_code[eeprom_data[2]];
 938   5                                        disp_bit2=0;
 939   5                                break;
 940   5                                case 4:
 941   5                                P0=disp_code[eeprom_data[3]];
 942   5                                        disp_bit3=0;
 943   5                                break;
 944   5                                case 5:
 945   5                                P0=disp_code[eeprom_data[4]];
 946   5                                        disp_bit4=0;
 947   5                                break;
 948   5                                case 6:
 949   5                                P0=0xff;
 950   5                                        disp_bit5=0;
 951   5                                break;
 952   5                                case 7:
 953   5                                P0=disp_code[eeprom_data[6]];
 954   5                                        disp_bit6=0;
 955   5                                break;
 956   5                                case 8:
 957   5                                P0=disp_code[eeprom_data[7]];
 958   5                                        disp_bit7=0;
 959   5                                        disp_bit=0x00;
 960   5                                break;
 961   5                                default:break;
 962   5                             }
 963   4                               break;
 964   4                         case 7:
 965   4                                switch(disp_bit)
 966   4                             {
 967   5                                case 1:
 968   5                            P0=disp_code[eeprom_data[0]];
 969   5                                        disp_bit0=0;
 970   5                                break;
 971   5                                case 2:
 972   5                                P0=disp_code[eeprom_data[1]];
 973   5                                        disp_bit1=0;
 974   5                                break;
 975   5                                case 3:
 976   5                                P0=disp_code[eeprom_data[2]];
 977   5                                        disp_bit2=0;
 978   5                                break;
 979   5                                case 4:
 980   5                                P0=disp_code[eeprom_data[3]];
 981   5                                        disp_bit3=0;
 982   5                                break;
 983   5                                case 5:
 984   5                                P0=disp_code[eeprom_data[4]];
 985   5                                        disp_bit4=0;
C51 COMPILER V7.07   93C46                                                                 05/15/2008 11:31:32 PAGE 17  

 986   5                                break;
 987   5                                case 6:
 988   5                                P0=disp_code[eeprom_data[5]];
 989   5                                        disp_bit5=0;
 990   5                                break;
 991   5                                case 7:
 992   5                                P0=0xff;
 993   5                                        disp_bit6=0;
 994   5                                break;
 995   5                                case 8:
 996   5                                P0=disp_code[eeprom_data[7]];
 997   5                                        disp_bit7=0;
 998   5                                        disp_bit=0x00;
 999   5                                break;
1000   5                                default:break;
1001   5                             }
1002   4                               break;
1003   4                         case 8:
1004   4                                 switch(disp_bit)
1005   4                             {
1006   5                                case 1:
1007   5                            P0=disp_code[eeprom_data[0]];
1008   5                                        disp_bit0=0;
1009   5                                break;
1010   5                                case 2:
1011   5                                P0=disp_code[eeprom_data[1]];
1012   5                                        disp_bit1=0;
1013   5                                break;
1014   5                                case 3:
1015   5                                P0=disp_code[eeprom_data[2]];
1016   5                                        disp_bit2=0;
1017   5                                break;
1018   5                                case 4:
1019   5                                P0=disp_code[eeprom_data[3]];
1020   5                                        disp_bit3=0;
1021   5                                break;
1022   5                                case 5:
1023   5                                P0=disp_code[eeprom_data[4]];
1024   5                                        disp_bit4=0;
1025   5                                break;
1026   5                                case 6:
1027   5                                P0=disp_code[eeprom_data[5]];
1028   5                                        disp_bit5=0;
1029   5                                break;
1030   5                                case 7:
1031   5                                P0=disp_code[eeprom_data[6]];
1032   5                                        disp_bit6=0;
1033   5                                break;
1034   5                                case 8:
1035   5                                P0=0xff;
1036   5                                        disp_bit7=0;
1037   5                                        disp_bit=0x00;
1038   5                                break;
1039   5                                default:break;
1040   5                             }
1041   4                               break;
1042   4                         default:break;
1043   4                        }
1044   3                 }
1045   2         }
1046   1         TR0=1;
1047   1       }
C51 C