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📄 hardware.lst

📁 单片机开发的数字电压表,带保护提示功能,精确度比较高
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                            	//			or F_SACM_A2000_Initial:
                            	// Note: The following functions are the partial code of original
                            	//			initial subroutine. (H/W setting part) 
                            	//
                            	//	Ex: F_SACM_A2000_Initial:
                            	//			...
                            	//			call F_SP_SACM_A2000_Init_	: S480/S240/MS01 is same
                            	//			...
                            	//			retf
                            	////////////////////////////////////////////////////////////////////////////////
                            	F_SP_SACM_A2000_Init_:	
0000A656 40 92              			r1=0x0000;                      // 24MHz, Fcpu=Fosc
0000A657 19 D3 13 70        	        [P_SystemClock]=r1           	//  Frequency 20MHz
0000A659 70 92              	        r1 = 0x0030                     // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000A65A 19 D3 0B 70        	        [P_TimerA_Ctrl] = r1			// Initial Timer A
0000A65C 09 93 00 FD        	        r1 = 0xfd00                  	// 16K
0000A65E 19 D3 0A 70        	        [P_TimerA_Data] = r1 
0000A660 09 93 A8 00        	        r1 = 0x00A8                     // Set the DAC Ctrl
0000A662 19 D3 2A 70        	        [P_DAC_Ctrl] = r1
0000A664 09 93 FF FF        	        r1 = 0xffff
                            	        
0000A666 19 D3 11 70        	        [P_INT_Clear] = r1          	// Clear interrupt occuiped events
0000A668 40 92              	        r1 =0x0000						// 
                            	        
                            	        
0000A669 11 93 A8 01        	        r1 = [R_InterruptStatus]		//
0000A66B 09 A3 00 20        	        r1 |= C_FIQ_TMA					// Enable Timer A FIQ
                            	        //R1 |= C_IRQ4_1KHz
0000A66D 19 D3 A8 01        	        [R_InterruptStatus] = r1		//
0000A66F 19 D3 10 70        	        [P_INT_Ctrl] = r1				//
                            	
0000A671 90 9A              			RETF
                            	
                            	
                            	//////////////////////////////////////////////////////////////////
                            	// Function: The partial code of hardware setting of SACM_S480_Initial() 
                            	//			or F_SACM_S480_Initial:
                            	//////////////////////////////////////////////////////////////////
                            	F_SP_SACM_S480_Init_:
0000A672 40 92              	        r1 = 0x0000						// 24MHz Fosc
0000A673 19 D3 13 70        	        [P_SystemClock]=r1          	// Initial System Clock
0000A675 70 92              	        r1=0x0030                       // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000A676 19 D3 0B 70        	        [P_TimerA_Ctrl]=r1				// Initial Timer A
                            	        //R1 = 0xfd00                  	// 16K
0000A678 09 93 ED FC        	        r1 = 0xfced						// 15.625K
0000A67A 19 D3 0A 70        	        [P_TimerA_Data]=r1
0000A67C 09 93 A8 00        	        r1 = 0x00A8						// 
0000A67E 19 D3 2A 70        	        [P_DAC_Ctrl] = r1				//
                            	        
0000A680 09 93 FF FF        	        r1 = 0xffff
0000A682 19 D3 11 70        	        [P_INT_Clear] = r1          	// Clear interrupt occuiped events
0000A684 11 93 A8 01        	        R1 = [R_InterruptStatus]		//
0000A686 09 A3 00 20        	        r1 |= C_FIQ_TMA					// Enable Timer A FIQ
                            	        //R1 |= C_IRQ4_1KHz				// Enable 1KHz IRQ4 for S480 decoder
0000A688 19 D3 A8 01        	        [R_InterruptStatus] = r1		//
0000A68A 19 D3 10 70        	        [P_INT_Ctrl] = r1				//
                            	        
0000A68C 90 9A              	        RETF
                            	
                            	//////////////////////////////////////////////////////////////////
                            	// Function: The partial code of hardware setting of SACM_S240_Initial() 
                            	//			or F_SACM_S240_Initial:
                            	//////////////////////////////////////////////////////////////////
                            	F_SP_SACM_S240_Init_:	
0000A68D 60 92              			r1=0x0020;	
0000A68E 19 D3 13 70        			[P_SystemClock]=r1
0000A690 09 93 A8 00        			r1 = 0x00A8;					// 
0000A692 19 D3 2A 70        			[P_DAC_Ctrl]= r1
0000A694 70 92              			r1 = 0x0030;               	// TimerA CKA=Fosc/2 CKB=1 Tout:off
0000A695 19 D3 0B 70        	        [P_TimerA_Ctrl] = r1;
0000A697 09 93 00 FE        			r1 = 0xfe00;                    // 24K
0000A699 19 D3 0A 70        	    	[P_TimerA_Data] = r1;		
0000A69B 09 93 FF FF        	        r1 = 0xffff
0000A69D 19 D3 11 70        	        [P_INT_Clear] = r1          	// Clear interrupt occuiped events
0000A69F 11 93 A8 01        	        r1 = [R_InterruptStatus]		//
0000A6A1 09 A3 00 20        	        r1 |= C_FIQ_TMA					// Enable Timer A FIQ
0000A6A3 19 D3 A8 01        	        [R_InterruptStatus] = r1		//
0000A6A5 19 D3 10 70        	        [P_INT_Ctrl] = r1				//
0000A6A7 90 9A              	        RETF
                            	
                            	//////////////////////////////////////////////////////////////////
                            	// Function: The partial code of hardware setting of SACM_MS01_Initial() 
                            	//			or F_SACM_MS01_Initial:
                            	//
                            	//	Ex: F_SACM_MS01_Initial:
                            	//			...
                            	//			call F_SP_SACM_MS01_Init_
                            	//			call F_SP_Play_Mode0/1/2/3	->0,1,2,3 depending on the para1
                            	//			...
                            	//			retf
                            	//////////////////////////////////////////////////////////////////
                            	F_SP_SACM_MS01_Init_:	
0000A6A8 40 92              			r1 = 0x0000;                    // 24MHz, Fcpu=Fosc
0000A6A9 19 D3 13 70        	        [P_SystemClock] = r1;        	// Initial System Clock
0000A6AB 70 92              	        r1 = 0x0030;                    // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000A6AC 19 D3 0B 70        	        [P_TimerA_Ctrl] = r1			// Initial Timer A
                            	        
                            	        //R1 = 0x0003						// 8K
0000A6AE 40 92              	        r1 = 0x0000						// Fosc/2
0000A6AF 19 D3 0D 70        	        [P_TimerB_Ctrl] = r1;			// Initial Timer B -> 8192	
                            	        
                            	        //R1 = 0xFFFF        
0000A6B1 09 93 00 FA        	        r1 = 0xFA00					// Any time for ADPCM channel 0,1
0000A6B3 19 D3 0C 70        	        [P_TimerB_Data] = r1			// 8K sample rate
                            	        
0000A6B5 09 93 FF FF        			r1 = 0xffff
0000A6B7 19 D3 11 70        	        [P_INT_Clear] = r1          	// Clear interrupt occuiped events
0000A6B9 90 9A              	        RETF
                            	
                            	//........................................
                            	F_SP_PlayMode0_:						// with F_SP_SACM_MS01_Initial
0000A6BA 46 92              			r1 = 0x0006
0000A6BB 19 D3 2A 70        	        [P_DAC_Ctrl] = r1
0000A6BD 09 93 00 FE        	        r1 = 0xFE00
0000A6BF 19 D3 0A 70        	        [P_TimerA_Data] = r1 			//
0000A6C1 11 93 A8 01        	        r1 = [R_InterruptStatus] 		//
0000A6C3 09 A3 10 84        	        r1 |= C_FIQ_PWM+C_IRQ2_TMB+C_IRQ4_1KHz
0000A6C5 19 D3 A8 01        	        [R_InterruptStatus] = r1 		//
0000A6C7 19 D3 10 70        	        [P_INT_Ctrl] = r1				//
0000A6C9 90 9A              	        RETF
                            	
                            	F_SP_PlayMode1_:						// with F_SP_SACM_MS01_Initial
0000A6CA 09 93 A8 00        			r1 = 0x00A8
0000A6CC 19 D3 2A 70        	        [P_DAC_Ctrl] = r1
0000A6CE 09 93 00 FE        	        r1 = 0xFE00
0000A6D0 19 D3 0A 70        	        [P_TimerA_Data] = r1 			//
0000A6D2 11 93 A8 01        	        r1 = [R_InterruptStatus] 		//
0000A6D4 09 A3 10 24        	        r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
0000A6D6 19 D3 A8 01        	        [R_InterruptStatus] = r1 		//
0000A6D8 19 D3 10 70        	        [P_INT_Ctrl] = r1				//
0000A6DA 90 9A              	        RETF
                            	
                            	
                            	F_SP_PlayMode2_:	 						// with F_SP_SACM_MS01_Initial
0000A6DB 09 93 A8 00        			r1 = 0x00A8
0000A6DD 19 D3 2A 70        	        [P_DAC_Ctrl] = r1
0000A6DF 09 93 9A FD        	        r1 = 0xFD9A
0000A6E1 19 D3 0A 70        	        [P_TimerA_Data] = r1 				//
0000A6E3 11 93 A8 01        	        r1 = [R_InterruptStatus] 			//
0000A6E5 09 A3 10 24        	        r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
0000A6E7 19 D3 A8 01        	        [R_InterruptStatus] = r1 			//
0000A6E9 19 D3 10 70        	        [P_INT_Ctrl] = r1					//
0000A6EB 90 9A              	        RETF
                            	
                            	      
                            	F_SP_PlayMode3_:								// with F_SP_SACM_MS01_Initial
0000A6EC 09 93 A8 00        			r1 = 0x00A8
0000A6EE 19 D3 2A 70        	        [P_DAC_Ctrl] = r1
0000A6F0 09 93 00 FD        	        r1 = 0xFD00
0000A6F2 19 D3 0A 70        	        [P_TimerA_Data] = r1 					//
0000A6F4 11 93 A8 01        	        r1 = [R_InterruptStatus] 				//
0000A6F6 09 A3 10 24        	        r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
0000A6F8 19 D3 A8 01        		    [R_InterruptStatus] = r1 				//
0000A6FA 19 D3 10 70        	        [P_INT_Ctrl] = r1						//
0000A6FC 90 9A              	        RETF
                            	        
                            	///////////////////////////////////////////////////////////////////////////////
                            	// Function: The partial code of hardware setting of SACM_MS01_Initial() 
                            	//			or F_SACM_MS01_Initial:
                            	//
                            	//	Ex: F_SACM_DVR_Initial:
                            	//			...
                            	//			call F_SP_SACM_DVR_Init_
                            	//			call F_SP_Play_Mode0/1/2/3	->0,1,2,3 depending on the para1
                            	//			...
                            	//			retf
                            	//	Ex1:
                            	//		F_SACM_DVR_Record: (or F_SACM_DVR_InitEncoder)
                            	//			...
                            	//			call F_SP_SACM_DVR_Rec_Init
                            	//			...
                            	//			retf
                            	//	Ex2:
                            	//		F_SACM_DVR_Play: (or F_SACM_DVR_InitDecoder)
                            	//			...
                            	//			call F_SP_SACM_DVR_Play_Init_
                            	//			...
                            	//			retf
                            	///////////////////////////////////////////////////////////////////////////////
                            	F_SP_SACM_DVR_Init_:
0000A6FD 40 92              	        r1 = 0x0000;                    // 24MHz, Fcpu=Fosc
0000A6FE 19 D3 13 70        	        [P_SystemClock] = r1;           //  Frequency 20MHz
0000A700 70 92              	        r1 = 0x0030;                    // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000A701 19 D3 0B 70        	        [P_TimerA_Ctrl] = r1;
0000A703 09 93 00 FA        	        r1 = 0xfa00;                    // 8K @ 24.576MHz
                            	        //r1 = 0xfb1d;                  // 8K @ 20MHz
0000A705 19 D3 0A 70        	        [P_TimerA_Data] = r1;
0000A707 75 92              	        r1 = 0x0035;                    // ADINI should be open (107)
0000A708 19 D3 15 70        	        [P_ADC_Ctrl] = r1;
0000A70A 09 93 A8 00        	        r1 = 0x00A8;                    // Set the DA Ctrl
0000A70C 19 D3 2A 70        	        [P_DAC_Ctrl] = r1;
                            	        
0000A70E 09 93 FF FF        	        r1 = 0xffff;
0000A710 19 D3 11 70        	        [P_INT_Clear] = r1;          	// Clear interrupt occuiped events
                            	        
0000A712 11 93 A8 01        	        r1 = [R_InterruptStatus]		//
0000A714 09 A3 00 20        	        r1 |= C_FIQ_TMA					// Enable Timer A FIQ
0000A716 19 D3 A8 01        	        [R_InterruptStatus] = r1		//
0000A718 19 D3 10 70        	        [P_INT_Ctrl] = r1				//
                            	        
0000A71A 90 9A              	        RETF
                            	
                            	
                            	
                            	F_SP_SACM_DVR_Rec_Init_:					// call by SACM_DVR_Record / SACM_DVR_InitEncoder
0000A71B 75 92              			r1 = 0x0035;  					//mic input
                            	        //r1 = 0x0037					//line_in input
0000A71C 19 D3 15 70        	        [P_ADC_Ctrl] = r1;       		//enable ADC
                            	        
0000A71E 09 93 00 FE        	        r1=0xfe00;                     	//24K @ 24.576MHz
0000A720 19 D3 0A 70        	        [P_TimerA_Data] = r1 
0000A722 90 9A              			RETF
                            	
                            	F_SP_SACM_DVR_Play_Init_:
0000A723 40 92              		    r1 = 0x0000						// call by SACM_DVR_Stop / SACM_DVR_Play
0000A724 19 D3 15 70        	        [P_ADC_Ctrl] = r1;       		// Disable ADC
                            	        
0000A726 09 93 00 FD        	        r1 = 0xfd00;                	// 16K @ 24.576MHz
0000A728 19 D3 0A 70        	        [P_TimerA_Data] = r1;
0000A72A 90 9A              	        RETF
                            	
                            	
                            	
                            	
                            	/////////////////////////////////////////////////////////////////////////////// 
                            	// Function: Extra Functions provided by Sunplus
                            	//	Type:	
                            	//		1. DAC Ramp up/down
                            	//		2. IO config/import/export
                            	//		3. Get resource data
                            	//
                            	//
                            	///////////////////////////////////////////////////////////////////////////////
                            	
                            	////////////////////////////////////////////////////////
                            	// Function: Ramp Up/Down to avoid speaker "pow" noise
                            	// Destory: R1,R2
                            	////////////////////////////////////////////////////////
                            	_SP_RampUpDAC1:	.PROC
                            	F_SP_RampUpDAC1:
0000A72B 90 D4              			push r1,r2 to [sp] 
0000A72C 11 93 17 70        	        r1=[P_DAC1] 
0000A72E 09 B3 C0 FF        	        r1 &= ~0x003f 
0000A730 09 43 00 80        	        cmp     r1,0x8000
0000A732 0E 0E              	        jb     	L_RU_NormalUp
0000A733 19 5E              	        je      L_RU_End
                            	                
                            	L_RU_DownLoop:
0000A734 40 F0 97 A7        	        call    F_Delay         
0000A736 41 94              	        r2 = 0x0001 
0000A737 1A D5 12 70        	        [P_Watchdog_Clear] = r2 
0000A739 09 23 40 00        	        r1 -= 0x40 
0000A73B 19 D3 17 70        	        [P_DAC1] = r1 

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