iir_filter_move_dc.vhd

用IIR滤波器实现去除信号中的直流分量.用很少的资源实现去除直流分量的功能。

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.NUMERIC_STD.ALL;

LIBRARY UNISIM;
USE UNISIM.VComponents.ALL;


ENTITY dc_remove IS
  PORT (
    ----------------------------------------------------------------------------
    -- Reset and Clock
    ----------------------------------------------------------------------------
    clk_i          : IN  STD_LOGIC; -- Clock
    rst_n_i        : IN  STD_LOGIC; -- Reset, active low.
    ----------------------------------------------------------------------------
    -- Data Interface
    ----------------------------------------------------------------------------
    data_i         : IN  STD_LOGIC_VECTOR(15 DOWNTO 0); -- Data Input
    data_o         : OUT STD_LOGIC_VECTOR(15 DOWNTO 0)  -- Data output
  );
END dc_remove;

--****************************************************************************--
--********************** Architecture of ENTITY dc_remove ********************--
--****************************************************************************--

ARCHITECTURE rtl OF dc_remove IS

  ------------------------------------------------------------------------------
  -- Signal Declaration
  ------------------------------------------------------------------------------

  SIGNAL data_x           : STD_LOGIC_VECTOR(21 DOWNTO 0); -- Delayed data
  SIGNAL data_x_r6        : STD_LOGIC_VECTOR(21 DOWNTO 0); -- Delayed data
  SIGNAL data_y           : STD_LOGIC_VECTOR(21 DOWNTO 0); -- Minus data
  SIGNAL data_z           : STD_LOGIC_VECTOR(21 DOWNTO 0); -- Minus data
  SIGNAL data_y_r6        : STD_LOGIC_VECTOR(21 DOWNTO 0); -- Minus data
  SIGNAL data_y_r6_s        : STD_LOGIC_VECTOR(21 DOWNTO 0); -- Minus data
  SIGNAL data_y_b5_s        : STD_LOGIC_VECTOR(21 DOWNTO 0); -- Minus data
  

BEGIN

--****************************************************************************--
--***************************** DC Removal Module ****************************--
--****************************************************************************--
--*****************************IIR filter***********************************************--
  -- y(n) = (1-a)*y(n-1)+a*x(n-1)     0<a<1;   a = 2^-6      
  -- z(n) = x(n-1) - y(n-1) 
  -- purpose: remove dc part of data, y(n) = x(n) - x(n)*2^-6 -y(n) + y(n)*2^-6
  -- type   : sequential
  -- inputs : clk_i, rst_n_i, data_i
  -- outputs: data_o
  data_x_r6 <= data_x(21)&data_x(21)&data_x(21)&data_x(21)&data_x(21)&data_x(21)& data_x(21 downto 6);
  data_y_r6_s <= data_y(21)&data_y(21)&data_y(21)&data_y(21)&data_y(21)&data_y(21)& data_y(21 downto 6);
  data_y_b5_s <= X"00000"&'0'&data_y(5);
  data_y_r6 <= STD_LOGIC_VECTOR(SIGNED(data_y_r6_s) + SIGNED(data_y_b5_s));
  dc_rem_gen : PROCESS(rst_n_i, clk_i)
  BEGIN
    IF rst_n_i = '0' THEN
      data_x <= (OTHERS => '0');
      data_y <= (OTHERS => '0');
      data_z <= (OTHERS => '0');
    ELSIF clk_i'EVENT AND clk_i = '1' THEN
      data_x <= data_i & "000000";
      data_y <= STD_LOGIC_VECTOR( SIGNED(data_x_r6) + SIGNED(data_y) - SIGNED(data_y_r6));
      data_z <= STD_LOGIC_VECTOR( SIGNED(data_x)  - SIGNED(data_y) );
    END IF;
  END PROCESS dc_rem_gen;

  -- Hookup output data
  data_o <= data_z(21 downto 6);

END ARCHITECTURE rtl;