📄 mpc821.h
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typedef struct centronics_pram {
unsigned short tbase; /* Tx BD Base Address */
unsigned short rbase; /* Rx BD Base Address */
unsigned short mrblr; /* Rx buffer length */
unsigned char smask; /* Status Mask */
unsigned char fcr; /* function code */
unsigned long rstate; /* Rx internal state */
unsigned long rptr; /* Rx internal data pointer */
unsigned short rcount; /* Rx internal byte count */
unsigned short rbptr; /* rb BD Pointer */
unsigned long rtemp; /* Rx temp */
unsigned long tstate; /* Tx internal state */
unsigned long tptr; /* Tx internal data pointer */
unsigned short tcount; /* Tx byte count */
unsigned short tbptr; /* Tx BD pointer */
unsigned long ttemp; /* Tx temp */
unsigned short sl_cnt; /* Silence Counter */
unsigned short max_sl; /* Maximum Silence period */
unsigned short char2; /* CONTROL char 2 */
unsigned short char1; /* CONTROL char 1 */
unsigned short char4; /* CONTROL char 4 */
unsigned short char3; /* CONTROL char 3 */
unsigned short char6; /* CONTROL char 6 */
unsigned short char5; /* CONTROL char 5 */
unsigned short char8; /* CONTROL char 8 */
unsigned short char7; /* CONTROL char 7 */
unsigned short rccr; /* Rx Char Control Register */
unsigned short rccm; /* Rx Control Char Mask */
} centronics_pram;
struct idma_pram {
unsigned short ibptr; /* IDMA buffer descriptor pointer */
unsigned short ibase; /* IDMA BD Base Address */
unsigned long istate; /* IDMA internal state */
unsigned long itemp; /* IDMA temp */
};
struct ethernet_pram {
/*
* SCC parameter RAM
*/
unsigned short tbase; /* TX BD base address */
unsigned short rbase; /* RX BD base address */
unsigned short mrblr; /* Rx buffer length */
unsigned char tfcr; /* Tx function code */
unsigned char rfcr; /* Rx function code */
unsigned long rstate; /* Rx internal state */
unsigned long rptr; /* Rx internal data pointer */
unsigned short rcount; /* Rx internal byte count */
unsigned short rbptr; /* rb BD Pointer */
unsigned long rtemp; /* Rx temp */
unsigned long tstate; /* Tx internal state */
unsigned long tptr; /* Tx internal data pointer */
unsigned short tcount; /* Tx byte count */
unsigned short tbptr; /* Tx BD pointer */
unsigned long ttemp; /* Tx temp */
unsigned long rcrc; /* temp receive CRC */
unsigned long tcrc; /* temp transmit CRC */
/*
* ETHERNET specific parameter RAM
*/
unsigned long c_pres; /* preset CRC */
unsigned long c_mask; /* constant mask for CRC */
unsigned long crcec; /* CRC error counter */
unsigned long alec; /* alighnment error counter */
unsigned long disfc; /* discard frame counter */
unsigned short ret_lim; /* retry limit threshold */
unsigned short pads; /* short frame PAD characters */
unsigned short mflr; /* maximum frame length reg */
unsigned short ret_cnt; /* retry limit counter */
unsigned short maxd1; /* maximum DMA1 length reg */
unsigned short minflr; /* minimum frame length reg */
unsigned short maxd; /* rx max DMA */
unsigned short maxd2; /* maximum DMA2 length reg */
unsigned short max_b; /* max bd byte count */
unsigned short dma_cnt; /* rx dma counter */
unsigned short gaddr2; /* group address filter 2 */
unsigned short gaddr1; /* group address filter 1 */
unsigned short gaddr4; /* group address filter 4 */
unsigned short gaddr3; /* group address filter 3 */
unsigned long tbuf0_data0; /* save area 0 - current frm */
unsigned long tbuf0_data1; /* save area 1 - current frm */
unsigned long tbuf0_rba0;
unsigned long tbuf0_crc;
unsigned short paddr_h; /* physical address (MSB) */
unsigned short tbuf0_bcnt;
unsigned short paddr_l; /* physical address (LSB) */
unsigned short paddr_m; /* physical address */
unsigned short rfbd_ptr; /* rx first bd pointer */
unsigned short p_per; /* persistence */
unsigned short tlbd_ptr; /* tx last bd pointer */
unsigned short tfbd_ptr; /* tx first bd pointer */
unsigned long tbuf1_data0; /* save area 0 - next frame */
unsigned long tbuf1_data1; /* save area 1 - next frame */
unsigned long tbuf1_rba0;
unsigned long tbuf1_crc;
unsigned short tx_len; /* tx frame length counter */
unsigned short tbuf1_bcnt;
unsigned short iaddr2; /* individual address filter 2*/
unsigned short iaddr1; /* individual address filter 1*/
unsigned short iaddr4; /* individual address filter 4*/
unsigned short iaddr3; /* individual address filter 3*/
unsigned short taddr_h; /* temp address (MSB) */
unsigned short boff_cnt; /* back-off counter */
unsigned short taddr_l; /* temp address (LSB) */
unsigned short taddr_m; /* temp address */
};
struct transparent_pram {
/*
* SCC parameter RAM
*/
unsigned short tbase; /* TX BD base address */
unsigned short rbase; /* RX BD base address */
unsigned short mrblr; /* Rx buffer length */
unsigned char tfcr; /* Tx function code */
unsigned char rfcr; /* Rx function code */
unsigned long rstate; /* Rx internal state */
unsigned long rptr; /* Rx internal data pointer */
unsigned short rcount; /* Rx internal byte count */
unsigned short rbptr; /* rb BD Pointer */
unsigned long rtemp; /* Rx temp */
unsigned long tstate; /* Tx internal state */
unsigned long tptr; /* Tx internal data pointer */
unsigned short tcount; /* Tx byte count */
unsigned short tbptr; /* Tx BD pointer */
unsigned long ttemp; /* Tx temp */
unsigned long rcrc; /* temp receive CRC */
unsigned long tcrc; /* temp transmit CRC */
/*
* TRANSPARENT specific parameter RAM
*/
unsigned long crc_p; /* CRC Preset */
unsigned long crc_c; /* CRC constant */
};
struct timer_pram {
/*
* RISC timers parameter RAM
*/
unsigned short tm_ptr; /* RISC timer table pointer */
unsigned short tm_base; /* RISC timer table base adr */
unsigned short r_tmv; /* RISC timer valid register */
unsigned short r_tmr; /* RISC timer mode register */
unsigned long tm_cmd; /* RISC timer cmd register */
unsigned long tm_cnt; /* RISC timer internal cnt */
};
struct ucode_pram {
/*
* RISC ucode parameter RAM
*/
unsigned short d_ptr; /* MISC Dump area pointer */
unsigned short rev_num; /* Ucode Revision Number */
unsigned long temp1; /* MISC Temp1 */
unsigned long temp2; /* MISC Temp2 */
};
struct i2c_pram {
/*
* I2C parameter RAM
*/
unsigned short tbase; /* TX BD base address */
unsigned short rbase; /* RX BD base address */
unsigned short mrblr; /* Rx buffer length */
unsigned char tfcr; /* Tx function code */
unsigned char rfcr; /* Rx function code */
unsigned long rstate; /* Rx internal state */
unsigned long rptr; /* Rx internal data pointer */
unsigned short rcount; /* Rx internal byte count */
unsigned short rbptr; /* rb BD Pointer */
unsigned long rtemp; /* Rx temp */
unsigned long tstate; /* Tx internal state */
unsigned long tptr; /* Tx internal data pointer */
unsigned short tcount; /* Tx byte count */
unsigned short tbptr; /* Tx BD pointer */
unsigned long ttemp; /* Tx temp */
};
/*
* definitions of PDA memory structures
*/
typedef struct pda {
/* BASE + 0x0000: INTERNAL REGISTERS */
/* SIU */
volatile unsigned long siu_mcr; /* module configuration reg */
volatile unsigned long siu_sypcr; /* System protection cnt */
unsigned char RESERVED58a[0x4];
volatile unsigned short siu_swsr; /* sw service */
unsigned char RESERVED58b[0x2];
volatile unsigned long siu_sipend; /* Interrupt pend reg */
volatile unsigned long siu_simask; /* Interrupt mask reg */
volatile unsigned long siu_siel; /* Interrupt edge level mask reg */
unsigned char RESERVED58c[0x3];
volatile unsigned char siu_sivec; /* Interrupt vector */
volatile unsigned long siu_tesr; /* Transfer error status */
volatile unsigned char RESERVED1[0xc];/* Reserved area */
volatile unsigned long dma_sdcr; /* SDMA configuration reg */
unsigned char RESERVED55[0x4c];
/* PCMCIA */
volatile unsigned long pcmcia_pbr0; /* PCCard Base Register 0 */
volatile unsigned long pcmcia_por0; /* PCCard Option Register 0 */
volatile unsigned long pcmcia_pbr1; /* PCCard Base Register 1 */
volatile unsigned long pcmcia_por1; /* PCCard Option Register 1 */
volatile unsigned long pcmcia_pbr2; /* PCCard Base Register 2 */
volatile unsigned long pcmcia_por2; /* PCCard Option Register 2 */
volatile unsigned long pcmcia_pbr3; /* PCCard Base Register 3 */
volatile unsigned long pcmcia_por3; /* PCCard Option Register 3 */
volatile unsigned long pcmcia_pbr4; /* PCCard Base Register 4 */
volatile unsigned long pcmcia_por4; /* PCCard Option Register 4 */
volatile unsigned long pcmcia_pbr5; /* PCCard Base Register 5 */
volatile unsigned long pcmcia_por5; /* PCCard Option Register 5 */
volatile unsigned long pcmcia_pbr6; /* PCCard Base Register 6 */
volatile unsigned long pcmcia_por6; /* PCCard Option Register 6 */
volatile unsigned long pcmcia_pbr7; /* PCCard Base Register 7 */
volatile unsigned long pcmcia_por7; /* PCCard Option Register 7 */
unsigned char RESERVED7Ca[0x20];
volatile unsigned long pcmcia_pgcra; /* General Control Register A */
volatile unsigned long pcmcia_pgcrb; /* General Control Register B */
volatile unsigned long pcmcia_pscr; /* Status Changed Register */
unsigned char RESERVED7Cb[0x4];
volatile unsigned long pcmcia_pipr; /* Input Pins Register */
unsigned char RESERVED7Cc[0x4];
volatile unsigned long pcmcia_per; /* Interrupt Enable Register */
volatile unsigned char RESERVED2[0x4];/* Reserved area */
/* MEMC */
volatile unsigned long memc_br0; /* base register 0 */
volatile unsigned long memc_or0; /* option register 0 */
volatile unsigned long memc_br1; /* base register 1 */
volatile unsigned long memc_or1; /* option register 1 */
volatile unsigned long memc_br2; /* base register 2 */
volatile unsigned long memc_or2; /* option register 2 */
volatile unsigned long memc_br3; /* base register 3 */
volatile unsigned long memc_or3; /* option register 3 */
volatile unsigned long memc_br4; /* base register 3 */
volatile unsigned long memc_or4; /* option register 3 */
volatile unsigned long memc_br5; /* base register 3 */
volatile unsigned long memc_or5; /* option register 3 */
volatile unsigned long memc_br6; /* base register 3 */
volatile unsigned long memc_or6; /* option register 3 */
volatile unsigned long memc_br7; /* base register 3 */
volatile unsigned long memc_or7; /* option register 3 */
unsigned char RESERVED3[0x24]; /* Reserved area */
volatile unsigned long memc_mar; /* Memory address */
volatile unsigned long memc_mcr; /* Memory command */
volatile unsigned char RESERVED4[0x4]; /* Reserved area */
volatile unsigned long memc_mamr; /* Machine A mode */
volatile unsigned long memc_mbmr; /* Machine B mode */
volatile unsigned short memc_mptpr; /* Memory preidic timer prescalar */
volatile unsigned short memc_mstat; /* Memory status */
volatile unsigned long memc_mdr; /* Memory data */
volatile unsigned char RESERVED5[0x80];/* Reserved area */
/* SYSTEM INTEGRATION TIMERS */
volatile unsigned short RESERVED5A[1]; /* Reserved area */
volatile unsigned short simt_tbscr; /* Time base stat&ctr */
volatile unsigned long simt_tbreff0; /* Time base reference 0 */
volatile unsigned long simt_tbreff1; /* Time base reference 1 */
volatile unsigned char RESERVED6[0x14];/* Reserved area */
volatile unsigned char RESERVED6A[0x2];/* Reserved area */
volatile unsigned short simt_rtcsc; /* Realtime clk stat&cntr 1 */
volatile unsigned long simt_rtc; /* Realtime clock */
volatile unsigned long simt_rtsec; /* Realtime alarm seconds */
volatile unsigned long simt_rtcal; /* Realtime alarm */
volatile unsigned char RESERVED56[0x10];/* Reserved area */
volatile unsigned char RESERVED56A[0x2];/* Reserved area */
volatile unsigned short simt_piscr; /* PIT stat&ctrl */
volatile unsigned long simt_pitc; /* PIT counter */
volatile unsigned long simt_pitr; /* PIT */
volatile unsigned char RESERVED7[0x34];/* Reserved area */
/* CLOCKS, RESET */
volatile unsigned long clkr_sccr; /* System clk cntrl */
volatile unsigned long clkr_plprcr; /* PLL reset&ctrl */
volatile unsigned long clkr_rsr; /* reset status */
volatile unsigned long clkr_RESERVED1[29];/* Reserved area */
/* SYSTEM INTEGRATION TIMERS AND KEYS */
volatile unsigned long simtk_tbscrk;
volatile unsigned long simtk_tbreff0k;
volatile unsigned long simtk_tbreff1k;
volatile unsigned long simtk_tbk;
volatile unsigned long simtk_RESERVED1[4];
volatile unsigned long simtk_rtcsck;
volatile unsigned long simtk_rtck;
volatile unsigned long simtk_rtseck;
volatile unsigned long simtk_rtcalk;
volatile unsigned long simtk_RESERVED2[4];
volatile unsigned long simtk_piscrk;
volatile unsigned long simtk_pitck;
volatile unsigned long simtk_RESERVED3[14];
/* CLOCKS, RESET KEYS */
volatile unsigned long clkrk_sccrk;
volatile unsigned long clkrk_plprcrk;
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