📄 idct_sse2_xvid.c
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/* * XVID MPEG-4 VIDEO CODEC * - SSE2 inverse discrete cosine transform - * * Copyright(C) 2003 Pascal Massimino <skal@planet-d.net> * * Conversion to gcc syntax with modifications * by Alexander Strange <astrange@ithinksw.com> * * Originally from dct/x86_asm/fdct_sse2_skal.asm in Xvid. * * This file is part of FFmpeg. * * Vertical pass is an implementation of the scheme: * Loeffler C., Ligtenberg A., and Moschytz C.S.: * Practical Fast 1D DCT Algorithm with Eleven Multiplications, * Proc. ICASSP 1989, 988-991. * * Horizontal pass is a double 4x4 vector/matrix multiplication, * (see also Intel's Application Note 922: * http://developer.intel.com/vtune/cbts/strmsimd/922down.htm * Copyright (C) 1999 Intel Corporation) * * More details at http://skal.planet-d.net/coding/dct.html * * FFmpeg is free software; you can redistribute it and/or * modify it under the terms of the GNU Lesser General Public * License as published by the Free Software Foundation; either * version 2.1 of the License, or (at your option) any later version. * * FFmpeg is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * Lesser General Public License for more details. * * You should have received a copy of the GNU Lesser General Public License * along with FFmpeg; if not, write to the Free Software Foundation, * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */#include "libavcodec/dsputil.h"#include "libavcodec/i386/idct_xvid.h"/*! * @file idct_sse2_xvid.c * @brief SSE2 idct compatible with xvidmmx */#define X8(x) x,x,x,x,x,x,x,x#define ROW_SHIFT 11#define COL_SHIFT 6DECLARE_ASM_CONST(16, int16_t, tan1[]) = {X8(13036)}; // tan( pi/16)DECLARE_ASM_CONST(16, int16_t, tan2[]) = {X8(27146)}; // tan(2pi/16) = sqrt(2)-1DECLARE_ASM_CONST(16, int16_t, tan3[]) = {X8(43790)}; // tan(3pi/16)-1DECLARE_ASM_CONST(16, int16_t, sqrt2[])= {X8(23170)}; // 0.5/sqrt(2)DECLARE_ASM_CONST(8, uint8_t, m127[]) = {X8(127)};DECLARE_ASM_CONST(16, int16_t, iTab1[]) = { 0x4000, 0x539f, 0xc000, 0xac61, 0x4000, 0xdd5d, 0x4000, 0xdd5d, 0x4000, 0x22a3, 0x4000, 0x22a3, 0xc000, 0x539f, 0x4000, 0xac61, 0x3249, 0x11a8, 0x4b42, 0xee58, 0x11a8, 0x4b42, 0x11a8, 0xcdb7, 0x58c5, 0x4b42, 0xa73b, 0xcdb7, 0x3249, 0xa73b, 0x4b42, 0xa73b};DECLARE_ASM_CONST(16, int16_t, iTab2[]) = { 0x58c5, 0x73fc, 0xa73b, 0x8c04, 0x58c5, 0xcff5, 0x58c5, 0xcff5, 0x58c5, 0x300b, 0x58c5, 0x300b, 0xa73b, 0x73fc, 0x58c5, 0x8c04, 0x45bf, 0x187e, 0x6862, 0xe782, 0x187e, 0x6862, 0x187e, 0xba41, 0x7b21, 0x6862, 0x84df, 0xba41, 0x45bf, 0x84df, 0x6862, 0x84df};DECLARE_ASM_CONST(16, int16_t, iTab3[]) = { 0x539f, 0x6d41, 0xac61, 0x92bf, 0x539f, 0xd2bf, 0x539f, 0xd2bf, 0x539f, 0x2d41, 0x539f, 0x2d41, 0xac61, 0x6d41, 0x539f, 0x92bf, 0x41b3, 0x1712, 0x6254, 0xe8ee, 0x1712, 0x6254, 0x1712, 0xbe4d, 0x73fc, 0x6254, 0x8c04, 0xbe4d, 0x41b3, 0x8c04, 0x6254, 0x8c04};DECLARE_ASM_CONST(16, int16_t, iTab4[]) = { 0x4b42, 0x6254, 0xb4be, 0x9dac, 0x4b42, 0xd746, 0x4b42, 0xd746, 0x4b42, 0x28ba, 0x4b42, 0x28ba, 0xb4be, 0x6254, 0x4b42, 0x9dac, 0x3b21, 0x14c3, 0x587e, 0xeb3d, 0x14c3, 0x587e, 0x14c3, 0xc4df, 0x6862, 0x587e, 0x979e, 0xc4df, 0x3b21, 0x979e, 0x587e, 0x979e};DECLARE_ASM_CONST(16, int32_t, walkenIdctRounders[]) = { 65536, 65536, 65536, 65536, 3597, 3597, 3597, 3597, 2260, 2260, 2260, 2260, 1203, 1203, 1203, 1203, 120, 120, 120, 120, 512, 512, 512, 512};// Temporary storage before the column pass#define ROW1 "%%xmm6"#define ROW3 "%%xmm4"#define ROW5 "%%xmm5"#define ROW7 "%%xmm7"#define CLEAR_ODD(r) "pxor "r","r" \n\t"#define PUT_ODD(dst) "pshufhw $0x1B, %%xmm2, "dst" \n\t"#ifdef ARCH_X86_64# define ROW0 "%%xmm8"# define REG0 ROW0# define ROW2 "%%xmm9"# define REG2 ROW2# define ROW4 "%%xmm10"# define REG4 ROW4# define ROW6 "%%xmm11"# define REG6 ROW6# define CLEAR_EVEN(r) CLEAR_ODD(r)# define PUT_EVEN(dst) PUT_ODD(dst)# define XMMS "%%xmm12"# define MOV_32_ONLY "#"# define SREG2 REG2# define TAN3 "%%xmm13"# define TAN1 "%%xmm14"#else# define ROW0 "(%0)"# define REG0 "%%xmm4"# define ROW2 "2*16(%0)"# define REG2 "%%xmm4"# define ROW4 "4*16(%0)"# define REG4 "%%xmm6"# define ROW6 "6*16(%0)"# define REG6 "%%xmm6"# define CLEAR_EVEN(r)# define PUT_EVEN(dst) \ "pshufhw $0x1B, %%xmm2, %%xmm2 \n\t" \ "movdqa %%xmm2, "dst" \n\t"# define XMMS "%%xmm2"# define MOV_32_ONLY "movdqa "# define SREG2 "%%xmm7"# define TAN3 "%%xmm0"# define TAN1 "%%xmm2"#endif#define ROUND(x) "paddd "MANGLE(x)#define JZ(reg, to) \ "testl "reg","reg" \n\t" \ "jz "to" \n\t"#define JNZ(reg, to) \ "testl "reg","reg" \n\t" \ "jnz "to" \n\t"#define TEST_ONE_ROW(src, reg, clear) \ clear \ "movq "src", %%mm1 \n\t" \ "por 8+"src", %%mm1 \n\t" \ "paddusb %%mm0, %%mm1 \n\t" \ "pmovmskb %%mm1, "reg" \n\t"#define TEST_TWO_ROWS(row1, row2, reg1, reg2, clear1, clear2) \ clear1 \ clear2 \ "movq "row1", %%mm1 \n\t" \ "por 8+"row1", %%mm1 \n\t" \ "movq "row2", %%mm2 \n\t" \ "por 8+"row2", %%mm2 \n\t" \ "paddusb %%mm0, %%mm1 \n\t" \ "paddusb %%mm0, %%mm2 \n\t" \ "pmovmskb %%mm1, "reg1" \n\t" \ "pmovmskb %%mm2, "reg2" \n\t"///IDCT pass on rows.#define iMTX_MULT(src, table, rounder, put) \ "movdqa "src", %%xmm3 \n\t" \ "movdqa %%xmm3, %%xmm0 \n\t" \ "pshufd $0x11, %%xmm3, %%xmm1 \n\t" /* 4602 */ \ "punpcklqdq %%xmm0, %%xmm0 \n\t" /* 0246 */ \ "pmaddwd "table", %%xmm0 \n\t" \ "pmaddwd 16+"table", %%xmm1 \n\t" \ "pshufd $0xBB, %%xmm3, %%xmm2 \n\t" /* 5713 */ \ "punpckhqdq %%xmm3, %%xmm3 \n\t" /* 1357 */ \ "pmaddwd 32+"table", %%xmm2 \n\t" \ "pmaddwd 48+"table", %%xmm3 \n\t" \ "paddd %%xmm1, %%xmm0 \n\t" \ "paddd %%xmm3, %%xmm2 \n\t" \ rounder", %%xmm0 \n\t" \ "movdqa %%xmm2, %%xmm3 \n\t" \ "paddd %%xmm0, %%xmm2 \n\t" \ "psubd %%xmm3, %%xmm0 \n\t" \ "psrad $11, %%xmm2 \n\t" \ "psrad $11, %%xmm0 \n\t" \ "packssdw %%xmm0, %%xmm2 \n\t" \ put \ "1: \n\t"
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