drv_usb.h

基于omap5912平台的usb设备驱动源程序

/* DEVSTAT */

#define CSL_USBF_DEVSTAT_B_HNP_ENABLE_MASK (0x00000200u)
#define CSL_USBF_DEVSTAT_B_HNP_ENABLE_SHIFT (0x00000009u)
#define CSL_USBF_DEVSTAT_B_HNP_ENABLE_RESETVAL (0x00000000u)
#define CSL_USBF_DEVSTAT_B_HNP_ENABLE_ENABLE (0x00000001u)

#define CSL_USBF_DEVSTAT_A_HNP_SUPPORT_MASK (0x00000100u)
#define CSL_USBF_DEVSTAT_A_HNP_SUPPORT_SHIFT (0x00000008u)
#define CSL_USBF_DEVSTAT_A_HNP_SUPPORT_RESETVAL (0x00000000u)
#define CSL_USBF_DEVSTAT_A_HNP_SUPPORT_B2HNPA (0x00000001u)

#define CSL_USBF_DEVSTAT_A_ALT_HNP_SUPPORT_MASK (0x00000080u)
#define CSL_USBF_DEVSTAT_A_ALT_HNP_SUPPORT_SHIFT (0x00000007u)
#define CSL_USBF_DEVSTAT_A_ALT_HNP_SUPPORT_RESETVAL (0x00000000u)
#define CSL_USBF_DEVSTAT_A_ALT_HNP_SUPPORT_B2NONHNPA (0x00000001u)

#define CSL_USBF_DEVSTAT_R_WK_OK_MASK    (0x00000040u)
#define CSL_USBF_DEVSTAT_R_WK_OK_SHIFT   (0x00000006u)
#define CSL_USBF_DEVSTAT_R_WK_OK_RESETVAL (0x00000000u)
#define CSL_USBF_DEVSTAT_R_WK_OK_RWKPGRANTED (0x00000001u)

#define CSL_USBF_DEVSTAT_USB_RESET_MASK  (0x00000020u)
#define CSL_USBF_DEVSTAT_USB_RESET_SHIFT (0x00000005u)
#define CSL_USBF_DEVSTAT_USB_RESET_RESETVAL (0x00000000u)
#define CSL_USBF_DEVSTAT_USB_RESET_NORESET (0x00000000u)
#define CSL_USBF_DEVSTAT_USB_RESET_RESET (0x00000001u)

#define CSL_USBF_DEVSTAT_SUS_MASK        (0x00000010u)
#define CSL_USBF_DEVSTAT_SUS_SHIFT       (0x00000004u)
#define CSL_USBF_DEVSTAT_SUS_RESETVAL    (0x00000000u)
#define CSL_USBF_DEVSTAT_SUS_NOSUSPEND   (0x00000000u)
#define CSL_USBF_DEVSTAT_SUS_SUSPENDED   (0x00000001u)

#define CSL_USBF_DEVSTAT_CFG_MASK        (0x00000008u)
#define CSL_USBF_DEVSTAT_CFG_SHIFT       (0x00000003u)
#define CSL_USBF_DEVSTAT_CFG_RESETVAL    (0x00000000u)
#define CSL_USBF_DEVSTAT_CFG_NOCFG       (0x00000000u)
#define CSL_USBF_DEVSTAT_CFG_CONFIGURED  (0x00000001u)

#define CSL_USBF_DEVSTAT_ADD_MASK        (0x00000004u)
#define CSL_USBF_DEVSTAT_ADD_SHIFT       (0x00000002u)
#define CSL_USBF_DEVSTAT_ADD_RESETVAL    (0x00000000u)
#define CSL_USBF_DEVSTAT_ADD_NOADDR      (0x00000000u)
#define CSL_USBF_DEVSTAT_ADD_ADDRESSED   (0x00000001u)

#define CSL_USBF_DEVSTAT_DEF_MASK        (0x00000002u)
#define CSL_USBF_DEVSTAT_DEF_SHIFT       (0x00000001u)
#define CSL_USBF_DEVSTAT_DEF_RESETVAL    (0x00000000u)
#define CSL_USBF_DEVSTAT_DEF_NONDEFAULT  (0x00000000u)
#define CSL_USBF_DEVSTAT_DEF_DEFAULT     (0x00000001u)

#define CSL_USBF_DEVSTAT_ATT_MASK        (0x00000001u)
#define CSL_USBF_DEVSTAT_ATT_SHIFT       (0x00000000u)
#define CSL_USBF_DEVSTAT_ATT_RESETVAL    (0x00000000u)
#define CSL_USBF_DEVSTAT_ATT_NOTATTACHED (0x00000000u)
#define CSL_USBF_DEVSTAT_ATT_ATTACHED    (0x00000001u)

#define CSL_USBF_DEVSTAT_RESETVAL        (0x00000000u)

/* SOF */

#define CSL_USBF_SOF_FT_LOCK_MASK        (0x00001000u)
#define CSL_USBF_SOF_FT_LOCK_SHIFT       (0x0000000Cu)
#define CSL_USBF_SOF_FT_LOCK_RESETVAL    (0x00000000u)
#define CSL_USBF_SOF_FT_LOCK_NOTLOCKED   (0x00000000u)
#define CSL_USBF_SOF_FT_LOCK_LOCKED      (0x00000001u)

#define CSL_USBF_SOF_TS_OK_MASK          (0x00000800u)
#define CSL_USBF_SOF_TS_OK_SHIFT         (0x0000000Bu)
#define CSL_USBF_SOF_TS_OK_RESETVAL      (0x00000000u)
#define CSL_USBF_SOF_TS_OK_INVALID       (0x00000000u)
#define CSL_USBF_SOF_TS_OK_VALID         (0x00000001u)

#define CSL_USBF_SOF_TS_MASK             (0x000007FFu)
#define CSL_USBF_SOF_TS_SHIFT            (0x00000000u)
#define CSL_USBF_SOF_TS_RESETVAL         (0x00000000u)

#define CSL_USBF_SOF_RESETVAL            (0x00000000u)

/* IRQ_EN */

#define CSL_USBF_IRQ_EN_SOF_IE_MASK      (0x00000080u)
#define CSL_USBF_IRQ_EN_SOF_IE_SHIFT     (0x00000007u)
#define CSL_USBF_IRQ_EN_SOF_IE_RESETVAL  (0x00000000u)
#define CSL_USBF_IRQ_EN_SOF_IE_DISBALED  (0x00000000u)
#define CSL_USBF_IRQ_EN_SOF_IE_ENABLED   (0x00000001u)

#define CSL_USBF_IRQ_EN_EPN_RX_IE_MASK   (0x00000020u)
#define CSL_USBF_IRQ_EN_EPN_RX_IE_SHIFT  (0x00000005u)
#define CSL_USBF_IRQ_EN_EPN_RX_IE_RESETVAL (0x00000000u)
#define CSL_USBF_IRQ_EN_EPN_RX_IE_DISBALED (0x00000000u)
#define CSL_USBF_IRQ_EN_EPN_RX_IE_ENABLED (0x00000001u)

#define CSL_USBF_IRQ_EN_EPN_TX_IE_MASK   (0x00000010u)
#define CSL_USBF_IRQ_EN_EPN_TX_IE_SHIFT  (0x00000004u)
#define CSL_USBF_IRQ_EN_EPN_TX_IE_RESETVAL (0x00000000u)
#define CSL_USBF_IRQ_EN_EPN_TX_IE_DISBALED (0x00000000u)
#define CSL_USBF_IRQ_EN_EPN_TX_IE_ENABLED (0x00000001u)

#define CSL_USBF_IRQ_EN_DS_CHG_IE_MASK   (0x00000008u)
#define CSL_USBF_IRQ_EN_DS_CHG_IE_SHIFT  (0x00000003u)
#define CSL_USBF_IRQ_EN_DS_CHG_IE_RESETVAL (0x00000000u)
#define CSL_USBF_IRQ_EN_DS_CHG_IE_DISBALED (0x00000000u)
#define CSL_USBF_IRQ_EN_DS_CHG_IE_ENABLED (0x00000001u)

#define CSL_USBF_IRQ_EN_EP0_IE_MASK      (0x00000001u)
#define CSL_USBF_IRQ_EN_EP0_IE_SHIFT     (0x00000000u)
#define CSL_USBF_IRQ_EN_EP0_IE_RESETVAL  (0x00000000u)
#define CSL_USBF_IRQ_EN_EP0_IE_DISBALED  (0x00000000u)
#define CSL_USBF_IRQ_EN_EP0_IE_ENABLED   (0x00000001u)

#define CSL_USBF_IRQ_EN_RESETVAL         (0x00000000u)

/* DMA_IRQ_EN */

#define CSL_USBF_DMA_IRQ_EN_TX2_DONE_IE_MASK (0x00000400u)
#define CSL_USBF_DMA_IRQ_EN_TX2_DONE_IE_SHIFT (0x0000000Au)
#define CSL_USBF_DMA_IRQ_EN_TX2_DONE_IE_RESETVAL (0x00000000u)
#define CSL_USBF_DMA_IRQ_EN_TX2_DONE_IE_DISBALED (0x00000000u)
#define CSL_USBF_DMA_IRQ_EN_TX2_DONE_IE_ENABLED (0x00000001u)

#define CSL_USBF_DMA_IRQ_EN_RX2_CNT_IE_MASK (0x00000200u)
#define CSL_USBF_DMA_IRQ_EN_RX2_CNT_IE_SHIFT (0x00000009u)
#define CSL_USBF_DMA_IRQ_EN_RX2_CNT_IE_RESETVAL (0x00000000u)
#define CSL_USBF_DMA_IRQ_EN_RX2_CNT_IE_DISBALED (0x00000000u)
#define CSL_USBF_DMA_IRQ_EN_RX2_CNT_IE_ENABLED (0x00000001u)

#define CSL_USBF_DMA_IRQ_EN_RX2_EOT_IE_MASK (0x00000100u)
#define CSL_USBF_DMA_IRQ_EN_RX2_EOT_IE_SHIFT (0x00000008u)
#define CSL_USBF_DMA_IRQ_EN_RX2_EOT_IE_RESETVAL (0x00000000u)
#define CSL_USBF_DMA_IRQ_EN_RX2_EOT_IE_DISBALED (0x00000000u)
#define CSL_USBF_DMA_IRQ_EN_RX2_EOT_IE_ENABLED (0x00000001u)

#define CSL_USBF_DMA_IRQ_EN_TX1_DONE_IE_MASK (0x00000040u)
#define CSL_USBF_DMA_IRQ_EN_TX1_DONE_IE_SHIFT (0x00000006u)
#define CSL_USBF_DMA_IRQ_EN_TX1_DONE_IE_RESETVAL (0x00000000u)
#define CSL_USBF_DMA_IRQ_EN_TX1_DONE_IE_DISBALED (0x00000000u)
#define CSL_USBF_DMA_IRQ_EN_TX1_DONE_IE_ENABLED (0x00000001u)

#define CSL_USBF_DMA_IRQ_EN_RX1_CNT_IE_MASK (0x00000020u)
#define CSL_USBF_DMA_IRQ_EN_RX1_CNT_IE_SHIFT (0x00000005u)
#define CSL_USBF_DMA_IRQ_EN_RX1_CNT_IE_RESETVAL (0x00000000u)
#define CSL_USBF_DMA_IRQ_EN_RX1_CNT_IE_DISBALED (0x00000000u)
#define CSL_USBF_DMA_IRQ_EN_RX1_CNT_IE_ENABLED (0x00000001u)

#define CSL_USBF_DMA_IRQ_EN_RX1_EOT_IE_MASK (0x00000010u)
#define CSL_USBF_DMA_IRQ_EN_RX1_EOT_IE_SHIFT (0x00000004u)
#define CSL_USBF_DMA_IRQ_EN_RX1_EOT_IE_RESETVAL (0x00000000u)
#define CSL_USBF_DMA_IRQ_EN_RX1_EOT_IE_DISBALED (0x00000000u)
#define CSL_USBF_DMA_IRQ_EN_RX1_EOT_IE_ENABLED (0x00000001u)

#define CSL_USBF_DMA_IRQ_EN_TX0_DONE_IE_MASK (0x00000004u)
#define CSL_USBF_DMA_IRQ_EN_TX0_DONE_IE_SHIFT (0x00000002u)
#define CSL_USBF_DMA_IRQ_EN_TX0_DONE_IE_RESETVAL (0x00000000u)
#define CSL_USBF_DMA_IRQ_EN_TX0_DONE_IE_DISBALED (0x00000000u)
#define CSL_USBF_DMA_IRQ_EN_TX0_DONE_IE_ENABLED (0x00000001u)

#define CSL_USBF_DMA_IRQ_EN_RX0_CNT_IE_MASK (0x00000002u)
#define CSL_USBF_DMA_IRQ_EN_RX0_CNT_IE_SHIFT (0x00000001u)
#define CSL_USBF_DMA_IRQ_EN_RX0_CNT_IE_RESETVAL (0x00000000u)
#define CSL_USBF_DMA_IRQ_EN_RX0_CNT_IE_DISBALED (0x00000000u)
#define CSL_USBF_DMA_IRQ_EN_RX0_CNT_IE_ENABLED (0x00000001u)

#define CSL_USBF_DMA_IRQ_EN_RX0_EOT_IE_MASK (0x00000001u)
#define CSL_USBF_DMA_IRQ_EN_RX0_EOT_IE_SHIFT (0x00000000u)
#define CSL_USBF_DMA_IRQ_EN_RX0_EOT_IE_RESETVAL (0x00000000u)
#define CSL_USBF_DMA_IRQ_EN_RX0_EOT_IE_DISBALED (0x00000000u)
#define CSL_USBF_DMA_IRQ_EN_RX0_EOT_IE_ENABLED (0x00000001u)

#define CSL_USBF_DMA_IRQ_EN_RESETVAL     (0x00000000u)

/* IRQ_SRC */

#define CSL_USBF_IRQ_SRC_TXN_DONE_MASK   (0x00000400u)
#define CSL_USBF_IRQ_SRC_TXN_DONE_SHIFT  (0x0000000Au)
#define CSL_USBF_IRQ_SRC_TXN_DONE_RESETVAL (0x00000000u)
#define CSL_USBF_IRQ_SRC_TXN_DONE_TXDONE (0x00000001u)

#define CSL_USBF_IRQ_SRC_RXN_CNT_MASK    (0x00000200u)
#define CSL_USBF_IRQ_SRC_RXN_CNT_SHIFT   (0x00000009u)
#define CSL_USBF_IRQ_SRC_RXN_CNT_RESETVAL (0x00000000u)
#define CSL_USBF_IRQ_SRC_RXN_CNT_REACHED (0x00000001u)

#define CSL_USBF_IRQ_SRC_RXN_EOT_MASK    (0x00000100u)
#define CSL_USBF_IRQ_SRC_RXN_EOT_SHIFT   (0x00000008u)
#define CSL_USBF_IRQ_SRC_RXN_EOT_RESETVAL (0x00000000u)
#define CSL_USBF_IRQ_SRC_RXN_EOT_TXENDED (0x00000001u)

#define CSL_USBF_IRQ_SRC_SOF_MASK        (0x00000080u)
#define CSL_USBF_IRQ_SRC_SOF_SHIFT       (0x00000007u)
#define CSL_USBF_IRQ_SRC_SOF_RESETVAL    (0x00000000u)
#define CSL_USBF_IRQ_SRC_SOF_RECEIVED    (0x00000001u)

#define CSL_USBF_IRQ_SRC_EPN_RX_MASK     (0x00000020u)
#define CSL_USBF_IRQ_SRC_EPN_RX_SHIFT    (0x00000005u)
#define CSL_USBF_IRQ_SRC_EPN_RX_RESETVAL (0x00000000u)
#define CSL_USBF_IRQ_SRC_EPN_RX_OUTDETECTED (0x00000001u)

#define CSL_USBF_IRQ_SRC_EPN_TX_MASK     (0x00000010u)
#define CSL_USBF_IRQ_SRC_EPN_TX_SHIFT    (0x00000004u)
#define CSL_USBF_IRQ_SRC_EPN_TX_RESETVAL (0x00000000u)
#define CSL_USBF_IRQ_SRC_EPN_TX_INDETECTED (0x00000001u)

#define CSL_USBF_IRQ_SRC_DS_CHG_MASK     (0x00000008u)
#define CSL_USBF_IRQ_SRC_DS_CHG_SHIFT    (0x00000003u)
#define CSL_USBF_IRQ_SRC_DS_CHG_RESETVAL (0x00000000u)
#define CSL_USBF_IRQ_SRC_DS_CHG_DSCHANGED (0x00000001u)

#define CSL_USBF_IRQ_SRC_SETUP_MASK      (0x00000004u)
#define CSL_USBF_IRQ_SRC_SETUP_SHIFT     (0x00000002u)
#define CSL_USBF_IRQ_SRC_SETUP_RESETVAL  (0x00000000u)
#define CSL_USBF_IRQ_SRC_SETUP_SETUPTRNOCCURED (0x00000001u)

#define CSL_USBF_IRQ_SRC_EP0_RX_MASK     (0x00000002u)
#define CSL_USBF_IRQ_SRC_EP0_RX_SHIFT    (0x00000001u)
#define CSL_USBF_IRQ_SRC_EP0_RX_RESETVAL (0x00000000u)
#define CSL_USBF_IRQ_SRC_EP0_RX_OUTDETECTED (0x00000001u)

#define CSL_USBF_IRQ_SRC_EP0_TX_MASK     (0x00000001u)
#define CSL_USBF_IRQ_SRC_EP0_TX_SHIFT    (0x00000000u)
#define CSL_USBF_IRQ_SRC_EP0_TX_RESETVAL (0x00000000u)
#define CSL_USBF_IRQ_SRC_EP0_TX_INDETECTED (0x00000001u)

#define CSL_USBF_IRQ_SRC_RESETVAL        (0x00000000u)

/* EPN_STAT */

#define CSL_USBF_EPN_STAT_RX_IT_SRC_MASK (0x00000F00u)
#define CSL_USBF_EPN_STAT_RX_IT_SRC_SHIFT (0x00000008u)
#define CSL_USBF_EPN_STAT_RX_IT_SRC_RESETVAL (0x00000000u)
#define CSL_USBF_EPN_STAT_RX_IT_SRC_NONE (0x00000000u)
#define CSL_USBF_EPN_STAT_RX_IT_SRC_EP1  (0x00000001u)
#define CSL_USBF_EPN_STAT_RX_IT_SRC_EP2  (0x00000002u)
#define CSL_USBF_EPN_STAT_RX_IT_SRC_EP3  (0x00000003u)
#define CSL_USBF_EPN_STAT_RX_IT_SRC_EP4  (0x00000004u)
#define CSL_USBF_EPN_STAT_RX_IT_SRC_EP5  (0x00000005u)
#define CSL_USBF_EPN_STAT_RX_IT_SRC_EP6  (0x00000006u)
#define CSL_USBF_EPN_STAT_RX_IT_SRC_EP7  (0x00000007u)
#define CSL_USBF_EPN_STAT_RX_IT_SRC_EP8  (0x00000008u)
#define CSL_USBF_EPN_STAT_RX_IT_SRC_EP9  (0x00000009u)
#define CSL_USBF_EPN_STAT_RX_IT_SRC_EP10 (0x0000000Au)
#define CSL_USBF_EPN_STAT_RX_IT_SRC_EP11 (0x0000000Bu)
#define CSL_USBF_EPN_STAT_RX_IT_SRC_EP12 (0x0000000Cu)
#define CSL_USBF_EPN_STAT_RX_IT_SRC_EP13 (0x0000000Du)
#define CSL_USBF_EPN_STAT_RX_IT_SRC_EP14 (0x0000000Eu)
#define CSL_USBF_EPN_STAT_RX_IT_SRC_EP15 (0x0000000Fu)

#define CSL_USBF_EPN_STAT_TX_IT_SRC_MASK (0x0000000Fu)
#define CSL_USBF_EPN_STAT_TX_IT_SRC_SHIFT (0x00000000u)
#define CSL_USBF_EPN_STAT_TX_IT_SRC_RESETVAL (0x00000000u)
#define CSL_USBF_EPN_STAT_TX_IT_SRC_NONE (0x00000000u)
#define CSL_USBF_EPN_STAT_TX_IT_SRC_EP1  (0x00000001u)
#define CSL_USBF_EPN_STAT_TX_IT_SRC_EP2  (0x00000002u)
#define CSL_USBF_EPN_STAT_TX_IT_SRC_EP3  (0x00000003u)
#define CSL_USBF_EPN_STAT_TX_IT_SRC_EP4  (0x00000004u)
#define CSL_USBF_EPN_STAT_TX_IT_SRC_EP5  (0x00000005u)
#define CSL_USBF_EPN_STAT_TX_IT_SRC_EP6  (0x00000006u)
#define CSL_USBF_EPN_STAT_TX_IT_SRC_EP7  (0x00000007u)
#define CSL_USBF_EPN_STAT_TX_IT_SRC_EP8  (0x00000008u)
#define CSL_USBF_EPN_STAT_TX_IT_SRC_EP9  (0x00000009u)
#define CSL_USBF_EPN_STAT_TX_IT_SRC_EP10 (0x0000000Au)
#define CSL_USBF_EPN_STAT_TX_IT_SRC_EP11 (0x0000000Bu)
#define CSL_USBF_EPN_STAT_TX_IT_SRC_EP12 (0x0000000Cu)
#define CSL_USBF_EPN_STAT_TX_IT_SRC_EP13 (0x0000000Du)
#define CSL_USBF_EPN_STAT_TX_IT_SRC_EP14 (0x0000000Eu)
#define CSL_USBF_EPN_STAT_TX_IT_SRC_EP15 (0x0000000Fu)

#define CSL_USBF_EPN_STAT_RESETVAL       (0x00000000u)

/* DMAN_STAT */

#define CSL_USBF_DMAN_STAT_RX_SB_MASK    (0x00001000u)
#define CSL_USBF_DMAN_STAT_RX_SB_SHIFT   (0x0000000Cu)
#define CSL_USBF_DMAN_STAT_RX_SB_RESETVAL (0x00000000u)
#define CSL_USBF_DMAN_STAT_RX_SB_EVEN    (0x00000000u)
#define CSL_USBF_DMAN_STAT_RX_SB_ODD     (0x00000001u)

#define CSL_USBF_DMAN_STAT_RX_IT_SRC_MASK (0x00000F00u)
#define CSL_USBF_DMAN_STAT_RX_IT_SRC_SHIFT (0x00000008u)
#define CSL_USBF_DMAN_STAT_RX_IT_SRC_RESETVAL (0x00000000u)
#define CSL_USBF_DMAN_STAT_RX_IT_SRC_NONE (0x00000000u)
#define CSL_USBF_DMAN_STAT_RX_IT_SRC_EP1 (0x00000001u)
#define CSL_USBF_DMAN_STAT_RX_IT_SRC_EP2 (0x00000002u)
#define CSL_USBF_DMAN_STAT_RX_IT_SRC_EP3 (0x00000003u)
#define CSL_USBF_DMAN_STAT_RX_IT_SRC_EP4 (0x00000004u)
#define CSL_USBF_DMAN_STAT_RX_IT_SRC_EP5 (0x00000005u)
#define CSL_USBF_DMAN_STAT_RX_IT_SRC_EP6 (0x00000006u)
#define CSL_USBF_DMAN_STAT_RX_IT_SRC_EP7 (0x00000007u)
#define CSL_USBF_DMAN_STAT_RX_IT_SRC_EP8 (0x00000008u)
#define CSL_USBF_DMAN_STAT_RX_IT_SRC_EP9 (0x00000009u)
#define CSL_USBF_DMAN_STAT_RX_IT_SRC_EP10 (0x0000000Au)
#define CSL_USBF_DMAN_STAT_RX_IT_SRC_EP11 (0x0000000Bu)
#define CSL_USBF_DMAN_STAT_RX_IT_SRC_EP12 (0x0000000Cu)
#define CSL_USBF_DMAN_STAT_RX_IT_SRC_EP13 (0x0000000Du)
#define CSL_USBF_DMAN_STAT_RX_IT_SRC_EP14 (0x0000000Eu)
#define CSL_USBF_DMAN_STAT_RX_IT_SRC_EP15 (0x0000000Fu)

#define CSL_USBF_DMAN_STAT_TX_IT_SRC_MASK (0x0000000Fu)
#define CSL_USBF_DMAN_STAT_TX_IT_SRC_SHIFT (0x00000000u)
#define CSL_USBF_DMAN_STAT_TX_IT_SRC_RESETVAL (0x00000000u)
#define CSL_USBF_DMAN_STAT_TX_IT_SRC_NONE (0x00000000u)
#define CSL_USBF_DMAN_STAT_TX_IT_SRC_EP1 (0x00000001u)
#define CSL_USBF_DMAN_STAT_TX_IT_SRC_EP2 (0x00000002u)
#define CSL_USBF_DMAN_STAT_TX_IT_SRC_EP3 (0x00000003u)
#define CSL_USBF_DMAN_STAT_TX_IT_SRC_EP4 (0x00000004u)
#define CSL_USBF_DMAN_STAT_TX_IT_SRC_EP5 (0x00000005u)
#define CSL_USBF_DMAN_STAT_TX_IT_SRC_EP6 (0x00000006u)
#define CSL_USBF_DMAN_STAT_TX_IT_SRC_EP7 (0x00000007u)
#define CSL_USBF_DMAN_STAT_TX_IT_SRC_EP8 (0x00000008u)
#define CSL_USBF_DMAN_STAT_TX_IT_SRC_EP9 (0x00000009u)
#define CSL_USBF_DMAN_STAT_TX_IT_SRC_EP10 (0x0000000Au)
#define CSL_USBF_DMAN_STAT_TX_IT_SRC_EP11 (0x0000000Bu)
#define CSL_USBF_DMAN_STAT_TX_IT_SRC_EP12 (0x0000000Cu)
#define CSL_USBF_DMAN_STAT_TX_IT_SRC_EP13 (0x0000000Du)
#define CSL_USBF_DMAN_STAT_TX_IT_SRC_EP14 (0x0000000Eu)
#define CSL_USBF_DMAN_STAT_TX_IT_SRC_EP15 (0x0000000Fu)

#define CSL_USBF_DMAN_STAT_RESETVAL      (0x00000000u)

/* RXDMA_CFG */

#define CSL_USBF_RXDMA_CFG_RX_REQ_MASK   (0x00001000u)
#define CSL_USBF_RXDMA_CFG_RX_REQ_SHIFT  (0x0000000Cu)
#define CSL_USBF_RXDMA_CFG_RX_REQ_RESETVAL (0x00000000u)
#define CSL_USBF_RXDMA_CFG_RX_REQ_LEVEL  (0x00000000u)
#define CSL_USBF_RXDMA_CFG_RX_REQ_PULSE  (0x00000001u)

#define CSL_USBF_RXDMA_CFG_RXDMA2_EP_MASK (0x00000F00u)
#define CSL_USBF_RXDMA_CFG_RXDMA2_EP_SHIFT (0x00000008u)
#define CSL_USBF_RXDMA_CFG_RXDMA2_EP_RESETVAL (0x00000000u)
#define CSL_USBF_RXDMA_CFG_RXDMA2_EP_NONE (0x00000000u)
#define CSL_USBF_RXDMA_CFG_RXDMA2_EP_EP1 (0x00000001u)