📄 ch6example9.mdl
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Block {
BlockType Saturate
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UpperLimit "1"
LowerLimit "-1"
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DstBlock "Gain"
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Line {
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DstBlock "Integer to Bit\nConverter"
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Annotation {
Name "0到127内整数\n7bit A/D"
Position [391, 151]
}
Annotation {
Name "[-1,1]限幅器"
Position [91, 124]
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Annotation {
Name "极性码"
Position [281, 34]
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Annotation {
Name "13折线压缩"
Position [199, 142]
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Annotation {
Name "量化间距为1"
Position [346, 132]
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Block {
BlockType SubSystem
Name "Subsystem\nPCM解码器"
Ports [1, 1]
Position [245, 15, 295, 75]
TreatAsAtomicUnit off
Port {
PortNumber 1
Name "解码输出"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
DataLogging off
DataLoggingNameMode "SignalName"
DataLoggingDecimateData off
DataLoggingDecimation "2"
DataLoggingLimitDataPoints off
DataLoggingMaxPoints "5000"
}
System {
Name "Subsystem\nPCM解码器"
Location [197, 300, 742, 494]
Open on
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
ZoomFactor "100"
Block {
BlockType Inport
Name "In1"
Position [25, 80, 55, 94]
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Block {
BlockType Reference
Name "Bit to Integer\nConverter"
Ports [1, 1]
Position [155, 93, 235, 137]
FontSize 10
SourceBlock "commutil2/Bit to Integer\nConverter"
SourceType "Bit to Integer Converter"
nbits "7"
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Block {
BlockType Demux
Name "Demux"
Ports [1, 8]
Position [80, 39, 85, 131]
BackgroundColor "black"
ShowName off
Outputs "8"
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Block {
BlockType Gain
Name "Gain1"
Position [255, 97, 310, 133]
Gain "1/127"
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Block {
BlockType Reference
Name "Mu-Law\nExpander"
Ports [1, 1]
Position [325, 93, 390, 137]
FontSize 10
SourceBlock "commsrccod2/Mu-Law\nExpander"
SourceType "Mu-Law Expander"
mu "mu"
V "1"
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Block {
BlockType Mux
Name "Mux"
Ports [7, 1]
Position [120, 50, 125, 130]
ShowName off
Inputs "7"
DisplayOption "bar"
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Block {
BlockType Product
Name "Product"
Ports [2, 1]
Position [420, 91, 465, 124]
InputSameDT off
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Block {
BlockType Relay
Name "Relay"
Position [195, 35, 225, 65]
OnSwitchValue "0.5"
OffSwitchValue "0.5"
OffOutputValue "-1"
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Block {
BlockType Outport
Name "Out1"
Position [490, 105, 520, 119]
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Line {
SrcBlock "Bit to Integer\nConverter"
SrcPort 1
DstBlock "Gain1"
DstPort 1
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Line {
SrcBlock "Mu-Law\nExpander"
SrcPort 1
DstBlock "Product"
DstPort 2
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Line {
SrcBlock "Relay"
SrcPort 1
Points [175, 0]
DstBlock "Product"
DstPort 1
}
Line {
SrcBlock "Mux"
SrcPort 1
Points [0, 25]
DstBlock "Bit to Integer\nConverter"
DstPort 1
}
Line {
SrcBlock "Demux"
SrcPort 1
DstBlock "Relay"
DstPort 1
}
Line {
SrcBlock "Demux"
SrcPort 2
DstBlock "Mux"
DstPort 1
}
Line {
SrcBlock "Demux"
SrcPort 3
DstBlock "Mux"
DstPort 2
}
Line {
SrcBlock "Demux"
SrcPort 8
DstBlock "Mux"
DstPort 7
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Line {
SrcBlock "Demux"
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DstBlock "Mux"
DstPort 6
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Line {
SrcBlock "Demux"
SrcPort 6
DstBlock "Mux"
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Line {
SrcBlock "Demux"
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DstBlock "Mux"
DstPort 4
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Line {
SrcBlock "Demux"
SrcPort 4
DstBlock "Mux"
DstPort 3
}
Line {
SrcBlock "Gain1"
SrcPort 1
DstBlock "Mu-Law\nExpander"
DstPort 1
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Line {
SrcBlock "In1"
SrcPort 1
DstBlock "Demux"
DstPort 1
}
Line {
SrcBlock "Product"
SrcPort 1
DstBlock "Out1"
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}
Annotation {
Name "极性解码"
Position [282, 38]
}
Annotation {
Name "7Bit D/A"
Position [195, 174]
}
Annotation {
Name "减小样值范围"
Position [280, 158]
}
}
}
Block {
BlockType Sum
Name "Sum"
Ports [2, 1]
Position [355, 35, 375, 55]
ShowName off
IconShape "round"
Inputs "|+-"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
Port {
PortNumber 1
Name "量化噪声"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
DataLogging off
DataLoggingNameMode "SignalName"
DataLoggingDecimateData off
DataLoggingDecimation "2"
DataLoggingLimitDataPoints off
DataLoggingMaxPoints "5000"
}
}
Block {
BlockType ToWorkspace
Name "To Workspace"
Position [615, 40, 675, 70]
VariableName "SandN"
MaxDataPoints "1"
SampleTime "-1"
SaveFormat "Array"
}
Block {
BlockType Reference
Name "Variance"
Ports [1, 1]
Position [535, 38, 595, 72]
FontSize 10
SourceBlock "dspstat3/Variance"
SourceType "Variance"
run off
reset_popup "None"
}
Block {
BlockType ZeroOrderHold
Name "Zero-Order\nHold"
Position [80, 26, 115, 64]
SampleTime "1/8000"
Port {
PortNumber 1
Name "原信号"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
DataLogging off
DataLoggingNameMode "SignalName"
DataLoggingDecimateData off
DataLoggingDecimation "2"
DataLoggingLimitDataPoints off
DataLoggingMaxPoints "5000"
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}
Line {
SrcBlock "Signal\nGenerator"
SrcPort 1
DstBlock "Zero-Order\nHold"
DstPort 1
}
Line {
SrcBlock "Subsystem\nPCM编码器"
SrcPort 1
DstBlock "Subsystem\nPCM解码器"
DstPort 1
}
Line {
Name "原信号"
Labels [0, 0]
SrcBlock "Zero-Order\nHold"
SrcPort 1
Points [40, 0]
Branch {
DstBlock "Subsystem\nPCM编码器"
DstPort 1
}
Branch {
Points [0, 70; 205, 0]
Branch {
Points [55, 0]
DstBlock "Mux"
DstPort 2
}
Branch {
DstBlock "Sum"
DstPort 2
}
}
}
Line {
Name "解码输出"
Labels [0, 0]
SrcBlock "Subsystem\nPCM解码器"
SrcPort 1
DstBlock "Sum"
DstPort 1
}
Line {
SrcBlock "Mux"
SrcPort 1
DstBlock "Buffer"
DstPort 1
}
Line {
SrcBlock "Buffer"
SrcPort 1
DstBlock "Variance"
DstPort 1
}
Line {
SrcBlock "Variance"
SrcPort 1
DstBlock "To Workspace"
DstPort 1
}
Line {
Name "量化噪声"
Labels [0, 0]
SrcBlock "Sum"
SrcPort 1
Points [40, 0]
DstBlock "Mux"
DstPort 1
}
Annotation {
Name "PCM量化信噪比测试模型\n文件名：ch6example9.mdl"
Position [599, 110]
DropShadow on
FontName "Arial"
FontSize 12
}
}
}
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