📄 ch7example27.mdl
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Position [620, 55, 650, 69]
}
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SrcBlock "Bernoulli Binary\nGenerator"
SrcPort 1
DstBlock "Rate Transition"
DstPort 1
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Line {
SrcBlock "PN Sequence\nGenerator"
SrcPort 1
DstBlock "Unipolar to\nBipolar\nConverter1"
DstPort 1
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Line {
SrcBlock "Product\n扩频"
SrcPort 1
DstBlock "Bipolar to\nUnipolar\nConverter"
DstPort 1
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Line {
SrcBlock "Unipolar to\nBipolar\nConverter"
SrcPort 1
DstBlock "Product\n扩频"
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Line {
SrcBlock "Bipolar to\nUnipolar\nConverter"
SrcPort 1
DstBlock "BPSK\nModulator\nBaseband"
DstPort 1
}
Line {
SrcBlock "Unipolar to\nBipolar\nConverter1"
SrcPort 1
Points [115, 0; 0, -60]
DstBlock "Product\n扩频"
DstPort 2
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Line {
SrcBlock "Rate Transition"
SrcPort 1
DstBlock "Unipolar to\nBipolar\nConverter"
DstPort 1
}
Line {
SrcBlock "BPSK\nModulator\nBaseband"
SrcPort 1
DstBlock "CDMA"
DstPort 1
}
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Block {
BlockType SubSystem
Name "CDMA Trans.1"
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Position [15, 105, 55, 165]
TreatAsAtomicUnit off
System {
Name "CDMA Trans.1"
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Open off
ModelBrowserVisibility off
ModelBrowserWidth 200
ScreenColor "white"
PaperOrientation "landscape"
PaperPositionMode "auto"
PaperType "A4"
PaperUnits "centimeters"
ZoomFactor "100"
Block {
BlockType Reference
Name "BPSK\nModulator\nBaseband"
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Position [520, 36, 595, 84]
FontSize 10
SourceBlock "commdigbbndpm2/BPSK\nModulator\nBaseband"
SourceType "BPSK Modulator Baseband"
Ph "0"
numSamp "1"
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Block {
BlockType Reference
Name "Bernoulli Binary\nGenerator"
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Position [25, 28, 105, 72]
FontName "Arial"
FontSize 10
SourceBlock "commrandsrc2/Bernoulli Binary\nGenerator"
SourceType "Bernoulli Binary Generator"
P "0.5"
seed "77"
Ts "1/100"
frameBased off
sampPerFrame "1"
orient off
}
Block {
BlockType Reference
Name "Bipolar to\nUnipolar\nConverter"
Ports [1, 1]
Position [430, 41, 495, 79]
FontSize 10
SourceBlock "commutil2/Bipolar to\nUnipolar\nConverter"
SourceType "Bipolar to Unipolar Converter"
M "2"
polarity "Positive"
}
Block {
BlockType Reference
Name "PN Sequence\nGenerator"
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Position [25, 103, 105, 147]
FontSize 10
SourceBlock "commseqgen2/PN Sequence\nGenerator"
SourceType "PN Sequence Generator"
poly "[1 0 0 0 0 1 1]"
ini_sta "[0 0 0 0 1 1]"
shift "0"
Ts "1/2000"
frameBased off
sampPerFrame "1"
reset off
}
Block {
BlockType Product
Name "Product\n扩频"
Ports [2, 1]
Position [345, 41, 390, 74]
InputSameDT off
}
Block {
BlockType Reference
Name "Rate Transition"
Ports [1, 1]
Position [130, 29, 185, 71]
FontSize 10
SourceBlock "simulink/Signal\nAttributes/Rate Transition"
SourceType "Rate_Transition"
DataIntegrity on
DeterministicTransfer on
TransitionType "Slow to fast"
InitCond "0"
}
Block {
BlockType Reference
Name "Unipolar to\nBipolar\nConverter"
Ports [1, 1]
Position [205, 32, 280, 68]
FontSize 10
SourceBlock "commutil2/Unipolar to\nBipolar\nConverter"
SourceType "Unipolar to Bipolar Converter"
M "2"
polarity "Positive"
}
Block {
BlockType Reference
Name "Unipolar to\nBipolar\nConverter1"
Ports [1, 1]
Position [130, 107, 190, 143]
FontSize 10
SourceBlock "commutil2/Unipolar to\nBipolar\nConverter"
SourceType "Unipolar to Bipolar Converter"
M "2"
polarity "Positive"
}
Block {
BlockType Outport
Name "CDMA"
Position [620, 53, 650, 67]
}
Line {
SrcBlock "BPSK\nModulator\nBaseband"
SrcPort 1
DstBlock "CDMA"
DstPort 1
}
Line {
SrcBlock "Rate Transition"
SrcPort 1
DstBlock "Unipolar to\nBipolar\nConverter"
DstPort 1
}
Line {
SrcBlock "Unipolar to\nBipolar\nConverter1"
SrcPort 1
Points [115, 0; 0, -60]
DstBlock "Product\n扩频"
DstPort 2
}
Line {
SrcBlock "Bipolar to\nUnipolar\nConverter"
SrcPort 1
DstBlock "BPSK\nModulator\nBaseband"
DstPort 1
}
Line {
SrcBlock "Unipolar to\nBipolar\nConverter"
SrcPort 1
DstBlock "Product\n扩频"
DstPort 1
}
Line {
SrcBlock "Product\n扩频"
SrcPort 1
DstBlock "Bipolar to\nUnipolar\nConverter"
DstPort 1
}
Line {
SrcBlock "PN Sequence\nGenerator"
SrcPort 1
DstBlock "Unipolar to\nBipolar\nConverter1"
DstPort 1
}
Line {
SrcBlock "Bernoulli Binary\nGenerator"
SrcPort 1
DstBlock "Rate Transition"
DstPort 1
}
}
}
Block {
BlockType Reference
Name "Integer Delay"
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Position [585, 100, 620, 140]
FontSize 10
SourceBlock "dspsigops/Integer Delay"
SourceType "Integer Delay"
delay "2"
ic "0"
reset_popup "None"
Port {
PortNumber 1
Name "发1"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
DataLogging off
DataLoggingNameMode "SignalName"
DataLoggingDecimateData off
DataLoggingDecimation "2"
DataLoggingLimitDataPoints off
DataLoggingMaxPoints "5000"
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BlockType Reference
Name "Integer Delay1"
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FontSize 10
SourceBlock "dspsigops/Integer Delay"
SourceType "Integer Delay"
delay "2"
ic "0"
reset_popup "None"
Port {
PortNumber 1
Name "发2"
TestPoint off
LinearAnalysisOutput off
LinearAnalysisInput off
RTWStorageClass "Auto"
DataLogging off
DataLoggingNameMode "SignalName"
DataLoggingDecimateData off
DataLoggingDecimation "2"
DataLoggingLimitDataPoints off
DataLoggingMaxPoints "5000"
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Block {
BlockType Product
Name "Product1\n解扩"
Ports [2, 1]
Position [320, 36, 365, 69]
InputSameDT off
}
Block {
BlockType Product
Name "Product1\n解扩1"
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Position [320, 166, 365, 199]
InputSameDT off
}
Block {
BlockType Scope
Name "Scope"
Ports [2]
Position [650, 46, 680, 79]
Location [261, 470, 585, 709]
Open on
NumInputPorts "2"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
axes2 "%<SignalLabel>"
}
List {
ListType SelectedSignals
axes1 ""
axes2 ""
}
TimeRange "0.4"
YMin "-2~-2"
YMax "2~2"
DataFormat "StructureWithTime"
}
Block {
BlockType Scope
Name "Scope1"
Ports [2]
Position [650, 176, 680, 209]
Location [601, 469, 925, 708]
Open on
NumInputPorts "2"
List {
ListType AxesTitles
axes1 "%<SignalLabel>"
axes2 "%<SignalLabel>"
}
List {
ListType SelectedSignals
axes1 ""
axes2 ""
}
TimeRange "0.4"
YMin "-2~-2"
YMax "2~2"
SaveName "ScopeData1"
DataFormat "StructureWithTime"
}
Block {
BlockType Sum
Name "Sum"
Ports [2, 1]
Position [85, 35, 105, 55]
ShowName off
IconShape "round"
Inputs "|++"
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
}
Block {
BlockType Reference
Name "Unipolar to\nBipolar\nConverter1"
Ports [1, 1]
Position [305, 102, 370, 138]
Orientation "left"
ShowName off
FontSize 10
SourceBlock "commutil2/Unipolar to\nBipolar\nConverter"
SourceType "Unipolar to Bipolar Converter"
M "2"
polarity "Positive"
}
Block {
BlockType Reference
Name "Unipolar to\nBipolar\nConverter2"
Ports [1, 1]
Position [305, 232, 370, 268]
Orientation "left"
ShowName off
FontSize 10
SourceBlock "commutil2/Unipolar to\nBipolar\nConverter"
SourceType "Unipolar to Bipolar Converter"
M "2"
polarity "Positive"
}
Block {
BlockType Reference
Name "本地PN序列"
Ports [0, 1]
Position [390, 98, 470, 142]
Orientation "left"
FontSize 10
SourceBlock "commseqgen2/PN Sequence\nGenerator"
SourceType "PN Sequence Generator"
poly "[1 0 0 0 0 1 1]"
ini_sta "[0 0 0 0 0 1]"
shift "0"
Ts "1/2000"
frameBased off
sampPerFrame "1"
reset off
}
Block {
BlockType Reference
Name "本地PN序列1"
Ports [0, 1]
Position [390, 228, 470, 272]
Orientation "left"
FontSize 10
SourceBlock "commseqgen2/PN Sequence\nGenerator"
SourceType "PN Sequence Generator"
poly "[1 0 0 0 0 1 1]"
ini_sta "[0 0 0 0 1 1]"
shift "0"
Ts "1/2000"
frameBased off
sampPerFrame "1"
reset off
}
Line {
SrcBlock "本地PN序列"
SrcPort 1
DstBlock "Unipolar to\nBipolar\nConverter1"
DstPort 1
}
Line {
SrcBlock "Product1\n解扩"
SrcPort 1
DstBlock "BPSK\nDemodulator\nBaseband1"
DstPort 1
}
Line {
SrcBlock "CDMA Trans."
SrcPort 1
DstBlock "Sum"
DstPort 1
}
Line {
SrcBlock "Sum"
SrcPort 1
DstBlock "AWGN\nChannel"
DstPort 1
}
Line {
SrcBlock "CDMA Trans.1"
SrcPort 1
Points [35, 0]
DstBlock "Sum"
DstPort 2
}
Line {
SrcBlock "Unipolar to\nBipolar\nConverter1"
SrcPort 1
Points [-10, 0; 0, -60]
DstBlock "Product1\n解扩"
DstPort 2
}
Line {
SrcBlock "AWGN\nChannel"
SrcPort 1
Points [0, 0; 25, 0]
Branch {
DstBlock "Product1\n解扩"
DstPort 1
}
Branch {
Points [0, 130]
DstBlock "Product1\n解扩1"
DstPort 1
}
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Line {
SrcBlock "Bernoulli Binary\nGenerator"
SrcPort 1
DstBlock "Integer Delay"
DstPort 1
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Line {
Name "收1"
Labels [0, 0]
SrcBlock "BPSK\nDemodulator\nBaseband1"
SrcPort 1
DstBlock "Scope"
DstPort 1
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Line {
Name "发1"
Labels [0, 0]
SrcBlock "Integer Delay"
SrcPort 1
Points [10, 0]
DstBlock "Scope"
DstPort 2
}
Line {
SrcBlock "本地PN序列1"
SrcPort 1
DstBlock "Unipolar to\nBipolar\nConverter2"
DstPort 1
}
Line {
SrcBlock "Product1\n解扩1"
SrcPort 1
DstBlock "BPSK\nDemodulator\nBaseband2"
DstPort 1
}
Line {
SrcBlock "Unipolar to\nBipolar\nConverter2"
SrcPort 1
Points [-10, 0; 0, -60]
DstBlock "Product1\n解扩1"
DstPort 2
}
Line {
SrcBlock "Bernoulli Binary\nGenerator1"
SrcPort 1
DstBlock "Integer Delay1"
DstPort 1
}
Line {
Name "收2"
Labels [0, 0]
SrcBlock "BPSK\nDemodulator\nBaseband2"
SrcPort 1
DstBlock "Scope1"
DstPort 1
}
Line {
Name "发2"
Labels [1, 0]
SrcBlock "Integer Delay1"
SrcPort 1
Points [15, 0]
DstBlock "Scope1"
DstPort 2
}
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Name "CDMA仿真模型\n文件名：ch7example27.mdl"
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FontName "Arial"
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