ch5example2.mdl

清华大学出版社 邵玉斌编写的《通信系统建模与仿真实例分析》一书的所有MATLAB和SIMULINK代码

	  Whi			  "2*pi*(1e3+100)"
	  Rp			  "2"
	  Rs			  "40"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Analog\nFilter Design2"
	  Ports			  [1, 1]
	  Position		  [120, 82, 170, 118]
	  FontSize		  10
	  SourceBlock		  "dsparch4/Analog\nFilter Design"
	  SourceType		  "Analog Filter Design"
	  method		  "Butterworth"
	  filttype		  "Bandpass"
	  N			  "2"
	  Wlo			  "2*pi*(1e3-100)"
	  Whi			  "2*pi*(1e3+100)"
	  Rp			  "2"
	  Rs			  "40"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Analog\nFilter Design3"
	  Ports			  [1, 1]
	  Position		  [120, 147, 170, 183]
	  FontSize		  10
	  SourceBlock		  "dsparch4/Analog\nFilter Design"
	  SourceType		  "Analog Filter Design"
	  method		  "Butterworth"
	  filttype		  "Bandpass"
	  N			  "2"
	  Wlo			  "2*pi*(1e3-100)"
	  Whi			  "2*pi*(1e3+100)"
	  Rp			  "2"
	  Rs			  "40"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Analog\nFilter Design4"
	  Ports			  [1, 1]
	  Position		  [135, 12, 185, 48]
	  FontSize		  10
	  SourceBlock		  "dsparch4/Analog\nFilter Design"
	  SourceType		  "Analog Filter Design"
	  method		  "Butterworth"
	  filttype		  "Bandstop"
	  N			  "2"
	  Wlo			  "2*pi*(1e3-100)"
	  Whi			  "2*pi*(1e3+100)"
	  Rp			  "2"
	  Rs			  "40"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Buffer"
	  Ports			  [1, 1]
	  Position		  [380, 66, 405, 104]
	  FontSize		  10
	  SourceBlock		  "dspbuff3/Buffer"
	  SourceType		  "Buffer"
	  N			  "1.6051e+005"
	  V			  "0"
	  ic			  "0"
	}
	Block {
	  BlockType		  Fcn
	  Name			  "Fcn"
	  Position		  [565, 70, 625, 100]
	  Expr			  "u(3)-u(1)"
	}
	Block {
	  BlockType		  Fcn
	  Name			  "Fcn1"
	  Position		  [565, 120, 625, 150]
	  Expr			  "u(4)-u(2)"
	}
	Block {
	  BlockType		  Mux
	  Name			  "Mux"
	  Ports			  [4, 1]
	  Position		  [295, 14, 300, 151]
	  ShowName		  off
	  DisplayOption		  "bar"
	}
	Block {
	  BlockType		  Mux
	  Name			  "Mux1"
	  Ports			  [2, 1]
	  Position		  [650, 96, 655, 134]
	  ShowName		  off
	  Inputs		  "2"
	  DisplayOption		  "bar"
	}
	Block {
	  BlockType		  Reference
	  Name			  "Variance"
	  Ports			  [1, 1]
	  Position		  [425, 67, 465, 103]
	  FontSize		  10
	  SourceBlock		  "dspstat3/Variance"
	  SourceType		  "Variance"
	  run			  off
	  reset_popup		  "None"
	}
	Block {
	  BlockType		  ZeroOrderHold
	  Name			  "Zero-Order\nHold"
	  Position		  [325, 66, 360, 104]
	  SampleTime		  "6.23e-8"
	}
	Block {
	  BlockType		  Reference
	  Name			  "dB Conversion"
	  Ports			  [1, 1]
	  Position		  [485, 66, 525, 104]
	  SourceBlock		  "dspmathops/dB Conversion"
	  SourceType		  "dB Conversion"
	  dBtype		  "dB"
	  intype		  "Power"
	  R			  "1"
	  fuzz			  on
	}
	Block {
	  BlockType		  Outport
	  Name			  "Out1"
	  Position		  [670, 110, 700, 124]
	}
	Line {
	  SrcBlock		  "Zero-Order\nHold"
	  SrcPort		  1
	  DstBlock		  "Buffer"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Variance"
	  SrcPort		  1
	  DstBlock		  "dB Conversion"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Mux"
	  SrcPort		  1
	  DstBlock		  "Zero-Order\nHold"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "In1"
	  SrcPort		  1
	  Points		  [45, 0]
	  Branch {
	    DstBlock		    "Analog\nFilter Design4"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 70]
	    DstBlock		    "Analog\nFilter Design2"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "In2"
	  SrcPort		  1
	  Points		  [0, 0; 25, 0]
	  Branch {
	    DstBlock		    "Analog\nFilter Design1"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 100]
	    DstBlock		    "Analog\nFilter Design3"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Analog\nFilter Design4"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Analog\nFilter Design2"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  3
	}
	Line {
	  SrcBlock		  "Analog\nFilter Design3"
	  SrcPort		  1
	  Points		  [45, 0; 0, -30]
	  DstBlock		  "Mux"
	  DstPort		  4
	}
	Line {
	  SrcBlock		  "Fcn"
	  SrcPort		  1
	  Points		  [5, 0]
	  DstBlock		  "Mux1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Buffer"
	  SrcPort		  1
	  DstBlock		  "Variance"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "dB Conversion"
	  SrcPort		  1
	  Points		  [10, 0]
	  Branch {
	    DstBlock		    "Fcn"
	    DstPort		    1
	  }
	  Branch {
	    Points		    [0, 50]
	    DstBlock		    "Fcn1"
	    DstPort		    1
	  }
	}
	Line {
	  SrcBlock		  "Fcn1"
	  SrcPort		  1
	  Points		  [0, -10]
	  DstBlock		  "Mux1"
	  DstPort		  2
	}
	Line {
	  SrcBlock		  "Mux1"
	  SrcPort		  1
	  DstBlock		  "Out1"
	  DstPort		  1
	}
	Line {
	  SrcBlock		  "Analog\nFilter Design1"
	  SrcPort		  1
	  DstBlock		  "Mux"
	  DstPort		  2
	}
      }
    }
    Block {
      BlockType		      Saturate
      Name		      "Saturation"
      Position		      [315, 25, 345, 55]
      UpperLimit	      "inf"
      LowerLimit	      "0"
    }
    Block {
      BlockType		      Scope
      Name		      "Scope"
      Ports		      [2]
      Position		      [570, 30, 600, 65]
      Location		      [59, 481, 383, 720]
      Open		      on
      NumInputPorts	      "2"
      List {
	ListType		AxesTitles
	axes1			"%<SignalLabel>"
	axes2			"%<SignalLabel>"
      }
      List {
	ListType		SelectedSignals
	axes1			""
	axes2			""
      }
      TimeRange		      "0.005"
      YMin		      "0~0"
      YMax		      "1~1"
      DataFormat	      "StructureWithTime"
    }
    Block {
      BlockType		      SignalGenerator
      Name		      "Signal\nGenerator"
      Position		      [40, 15, 70, 45]
      Amplitude		      "0.3*1"
      Frequency		      "1000"
    }
    Block {
      BlockType		      SignalGenerator
      Name		      "Signal\nGenerator1"
      Position		      [40, 135, 70, 165]
      Frequency		      "1000e3"
      Port {
	PortNumber		1
	Name			"载波"
	TestPoint		off
	LinearAnalysisOutput	off
	LinearAnalysisInput	off
	RTWStorageClass		"Auto"
	DataLogging		off
	DataLoggingNameMode	"SignalName"
	DataLoggingDecimateData	off
	DataLoggingDecimation	"2"
	DataLoggingLimitDataPoints off
	DataLoggingMaxPoints	"5000"
      }
    }
    Block {
      BlockType		      Sum
      Name		      "Sum"
      Ports		      [2, 1]
      Position		      [95, 20, 115, 40]
      ShowName		      off
      IconShape		      "round"
      Inputs		      "|++"
      InputSameDT	      off
      OutDataTypeMode	      "Inherit via internal rule"
    }
    Block {
      BlockType		      Sum
      Name		      "Sum1"
      Ports		      [2, 1]
      Position		      [235, 30, 255, 50]
      ShowName		      off
      IconShape		      "round"
      Inputs		      "|++"
      InputSameDT	      off
      OutDataTypeMode	      "Inherit via internal rule"
    }
    Block {
      BlockType		      ToWorkspace
      Name		      "To Workspace"
      Position		      [595, 105, 655, 135]
      VariableName	      "SNR_out"
      MaxDataPoints	      "1"
      SampleTime	      "-1"
      SaveFormat	      "Array"
    }
    Line {
      SrcBlock		      "Constant"
      SrcPort		      1
      Points		      [30, 0]
      DstBlock		      "Sum"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Signal\nGenerator"
      SrcPort		      1
      DstBlock		      "Sum"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Sum"
      SrcPort		      1
      DstBlock		      "Product"
      DstPort		      1
    }
    Line {
      Name		      "载波"
      Labels		      [0, 0]
      SrcBlock		      "Signal\nGenerator1"
      SrcPort		      1
      Points		      [0, 0; 70, 0]
      Branch {
	DstBlock		"Product"
	DstPort			2
      }
      Branch {
	DstBlock		"Product1"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "Product"
      SrcPort		      1
      DstBlock		      "Sum1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Random\nNumber"
      SrcPort		      1
      Points		      [35, 0]
      DstBlock		      "Sum1"
      DstPort		      2
    }
    Line {
      SrcBlock		      "Sum1"
      SrcPort		      1
      Points		      [0, 0; 20, 0]
      Branch {
	DstBlock		"Saturation"
	DstPort			1
      }
      Branch {
	Points			[0, 95]
	DstBlock		"Product1"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Saturation"
      SrcPort		      1
      DstBlock		      "Analog\nFilter Design2"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Analog\nFilter Design2"
      SrcPort		      1
      Points		      [0, 0; 35, 0]
      Branch {
	DstBlock		"SNR Detection"
	DstPort			1
      }
      Branch {
	DstBlock		"Scope"
	DstPort			1
      }
    }
    Line {
      SrcBlock		      "Product1"
      SrcPort		      1
      DstBlock		      "Analog\nFilter Design1"
      DstPort		      1
    }
    Line {
      SrcBlock		      "Analog\nFilter Design1"
      SrcPort		      1
      Points		      [0, 0; 10, 0]
      Branch {
	Points			[0, 60]
	DstBlock		"SNR Detection"
	DstPort			2
      }
      Branch {
	Points			[0, -90]
	DstBlock		"Scope"
	DstPort			2
      }
    }
    Line {
      SrcBlock		      "SNR Detection"
      SrcPort		      1
      Points		      [0, 0; 15, 0]
      Branch {
	DstBlock		"Display"
	DstPort			1
      }
      Branch {
	Points			[0, -70]
	DstBlock		"To Workspace"
	DstPort			1
      }
    }
    Annotation {
      Name		      "包络检波和相干解调性能测试仿真模型\n文件名：ch5"
"example2.mdl"
      Position		      [193, 207]
      DropShadow	      on
      FontName		      "Arial"
      FontSize		      12
    }
    Annotation {
      Name		      "AWGN"
      Position		      [247, 21]
    }
    Annotation {
      Name		      "解调SNR测量结果输出dB"
      Position		      [621, 239]
    }
    Annotation {
      Name		      "包络检波"
      Position		      [330, 74]
    }
    Annotation {
      Name		      "相干解调"
      Position		      [333, 181]
    }
  }
}