📄 l2_dram.c
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/*++
Copyright (c) 2001 Sunplus Technology Co., Ltd.
Module Name:
L2_dram.c
Abstract:
Module related to L2 DRAM functions
Environment:
Keil C51 Compiler
Revision History:
11/12/2001 GTHsiao created
--*/
//=============================================================================
//Header file
//=============================================================================
#include "general.h"
#include "main.h"
#include "quantdef.h"
//=============================================================================
//Symbol
//=============================================================================
//-----------------------------------------------------------------------------
//Constant
//-----------------------------------------------------------------------------
//-----------------------------------------------------------------------------
//Variable
//-----------------------------------------------------------------------------
//=============================================================================
//Program
//=============================================================================
//-----------------------------------------------------------------------------
//L2_SDRAMInit
//-----------------------------------------------------------------------------
/*
routine description:
The SDRAM power-on initialization
arguments:
CamMode 0x00 : power-on initialization
0x01 : preview mode initialization
0x02 : DSC mode initialization
0x03 : Video clip mode initialization
0x04 : PC-camera mode initialization
0x05 : Playback mode initialization
return value:
0x00 - success
others - error
*/
UCHAR L2_InitSDRAM(UCHAR CamMode) USING_0
{
UCHAR status = L2K_SUCCESS;
//body
if(CamMode==0x00) //power-on SDRAM initialization
{
XBYTE[0x2006]=0x01; //turn on output enable
//patch4.4@ada@Snap image error in SDRAM begin
//XBYTE[0x2709]=0x0A; //sdclk phase
XBYTE[0x2709]=0x0C; //sdclk phase
//patch4.4@ada@Snap image error in SDRAM end
#ifdef M16 //16M SDRAM
XBYTE[0x2707]=0x04;
#endif
#ifdef M64 //64M SDRAM
XBYTE[0x2707]=0x05;
#endif
#ifdef M128 //128M SDRAM
XBYTE[0x2707]=0x06;
#endif
#ifdef M256 //256M SDRAM
XBYTE[0x2707]=0x07;
#endif
XBYTE[0x27a0]=0x04; //initialize the SDRAM
XBYTE[0x2717]=0x02; //SDRAM refresh source counted by DRAMCTRL itself
}
else if(CamMode==1) //Preview mode, Use sensor Hsync. as refresh source
{
XBYTE[0x2717]=0x00; //SDRAM refresh source set to Front h_sync
XBYTE[0x270a]=0x0f; //set refresh rate
XBYTE[0x27a1]=0x20; //stop videoClip
XBYTE[0x27d0]=0; //clear interrupt
XBYTE[0x27c0]=0; //disable interrupt
XBYTE[0x2739]=0x00; //set capture interval
XBYTE[0X2883]=0x00; //No DCT DC
XBYTE[0X2884]=0x00; //JFIF compatible
}
else if(CamMode==2) //DSC mode
{
XBYTE[0x2717]=0x00; //SDRAM refresh source set to Front h_sync
XBYTE[0x270a]=0x0f; //set refresh rate
}
else if(CamMode==3) //VideoClip
{
XBYTE[0x2717]=0x00; //SDRAM refresh source set to Front h_sync
XBYTE[0x270a]=0x0f; //set refresh rate
XBYTE[0X27C0]=0; //clear DRAM interrupt
XBYTE[0x27d0]=1; //enable the dram interrupt
if(G_FrameRate >= 20)
XBYTE[0x2739]=0x01; //set capture interval, target 15fps
else
XBYTE[0x2739]=0x00; //set capture interval, target 15fps
XBYTE[0X2883]=0x00; //No DCT DC
XBYTE[0X2884]=0x01; //JFIF compatible
}
else if(CamMode==4) //PC-cam mode
{
XBYTE[0x2717]=0x00; //SDRAM refresh source set to Front h_sync
XBYTE[0x270a]=0x0f; //set refresh rate
XBYTE[0X2883]=0x00; //No DCT DC
XBYTE[0X2884]=0x00; //JFIF compatible
}
else if(CamMode==5) //Playback
{
//XBYTE[0x2717]=0x00; //hx@2003.4.28 for mito turn off lcd
//XBYTE[0x270a]=0x0f; //hx@2003.4.28 for mito turn off lcd set refresh rate
XBYTE[0x2717]=0x01; //SDRAM refresh source set to TV(LCD) h_sync
XBYTE[0x270a]=0x08; //set refresh rate
XBYTE[0X2883]=0x00; //No DCT DC
}
else
{
XBYTE[0x2717]=0x02; //SDRAM refresh source counted by DRAMCTRL itself
XBYTE[0x270a]=0x07; //set refresh rate
}
XBYTE[0x2717]=0x02; //Jane@050219 //add for refresh sdram,the lcd noise when audio in
//return
return(status);
}
//-----------------------------------------------------------------------------
//L2_DRAMSetStartAddr
//-----------------------------------------------------------------------------
/*
routine description:
Set the SDRAM read/write starting address
arguments:
DRAMAddr - SDRAM read/write starting address
Read - Read action if set to 1
return value:
0x00 - success
others - error
*/
UCHAR L2_DRAMSetStartAddr(ULONG DRAMAddr, UCHAR Read) USING_0
{
UCHAR status = L2K_SUCCESS;
//body
XBYTE[0x2720]=(UCHAR)DRAMAddr&0xff; //set SDRAM starting addr
XBYTE[0x2721]=(UCHAR)(DRAMAddr>>8)&0xff;
XBYTE[0x2722]=(UCHAR)(DRAMAddr>>16)&0xff;
if(Read==0x01)
XBYTE[0x27a0]=0x01; //set prefetch
//return
return(status);
}
#if 1
//-----------------------------------------------------------------------------
//L2_DRAMReadWord
//-----------------------------------------------------------------------------
/*
routine description:
Read a word from the SDRAM
arguments:
LowByteData -
HighByteData -
return value:
0x00 - success
others - error
*/
UCHAR L2_DRAMReadWord(UCHAR *LowByteData, UCHAR *HighByteData) USING_0
{
UCHAR status = L2K_SUCCESS;
UCHAR drambusy;
//body
do
{
drambusy=XBYTE[0x27b0]&0x01;
}while(drambusy==0x01);
*LowByteData = XBYTE[0x2700];
*HighByteData = XBYTE[0x2701];
//return
return(status);
}
//-----------------------------------------------------------------------------
//L2_DRAMWriteWord
//-----------------------------------------------------------------------------
/*
routine description:
Write a word to the SDRAM
arguments:
LowByteData - The low byte data to be written to the SDRAM
HighByteData - The high byte data to be written to the SDRAM
return value:
0x00 - success
others - error
*/
UCHAR L2_DRAMWriteWord(UCHAR LowByteData, UCHAR HighByteData) USING_0
{
UCHAR status = L2K_SUCCESS;
UCHAR drambusy;
//body
XBYTE[0x2700]=LowByteData;
XBYTE[0x2701]=HighByteData;
do
{
drambusy=(XBYTE[0x27b0])&(0x01);
}while(drambusy==0x01);
//return
return(status);
}
#endif
//-----------------------------------------------------------------------------
//L2_FillDRAM
//-----------------------------------------------------------------------------
/*
routine description:
Fill a constant data to the SDRAM
arguments:
DRAMAddr - The linear starting address
FillSize - The number of words to be filled
LowByteData - The low byte data to be filled to the SDRAM
HighByteData - The high byte data to be filled to the SDRAM
return value:
0x00 - success
others - error
*/
UCHAR L2_FillDRAM(ULONG DRAMAddr, USHORT FillSize,
UCHAR LowByteData, UCHAR HighByteData) USING_0
{
UCHAR status = L2K_SUCCESS;
UCHAR drambusy;
//patch4.5.1@ada@Decrease the loading of DRAM bandwidth begin
if (FillSize > 0)
{
//body
XBYTE[0x2720]=(UCHAR)DRAMAddr&0xff;
XBYTE[0x2721]=(UCHAR)(DRAMAddr>>8)&0xff;
XBYTE[0x2722]=(UCHAR)(DRAMAddr>>16)&0xff;
XBYTE[0x2705]=(UCHAR)FillSize&0xff;
XBYTE[0x2706]=(UCHAR)(FillSize>>8)&0xff;
XBYTE[0x270b]=LowByteData;
XBYTE[0x270c]=HighByteData;
XBYTE[0x27a0]=0x02; //trigger fill action
do
{
drambusy=(XBYTE[0x27b0])&(0x01);
}while(drambusy==0x01);
}
//patch4.5.1@ada@Decrease the loading of DRAM bandwidth end
//return
return(status);
}
//-----------------------------------------------------------------------------
//L2_SetJPEGVscale
//-----------------------------------------------------------------------------
/*
routine description:
The SDRAM controller dropping or inserting line function setting
arguments:
SourceLineNum - The line number of the CDSP module output
TargetLineNum - The target line number after the inserting or
dropping line function
return value:
0x00 - success
others - error
*/
UCHAR L2_SetJPEGVscale(USHORT SourceLineNum, USHORT TargetLineNum) USING_0
{
UCHAR status = L2K_SUCCESS;
UCHAR diff,q,r;
//body
XBYTE[0x2792]=(UCHAR)(TargetLineNum)&0xff;
XBYTE[0x2793]=(UCHAR)(TargetLineNum>>8)&0xff;
if(SourceLineNum==TargetLineNum)
{XBYTE[0x2790]=0x00;
XBYTE[0x2791]=0x00;
XBYTE[0x2792]=0x00;
XBYTE[0x2793]=0x00;
}
else if(SourceLineNum>TargetLineNum) //scale down
{
XBYTE[0x2790]=0x02;
diff=SourceLineNum-TargetLineNum;
q=SourceLineNum/diff;
r=SourceLineNum%diff;
if(r==0) XBYTE[0x2791]=q-1;
else XBYTE[0x2791]=q;
}
else //scale up
{
XBYTE[0x2790]=0x03;
diff=TargetLineNum-SourceLineNum;
q=SourceLineNum/diff;
XBYTE[0x2791]=q-1;
}
//return
return(status);
}
//-----------------------------------------------------------------------------
//L2_WriteQTable
//-----------------------------------------------------------------------------
/*
routine description:
Fill the Q table
arguments:
ChangeQ - Really write the quantization table to the SRAM if set to 1
QTableIndex - The quantization table index, 8'h05 is reserved for all
1's of quantized value. The Q-table will not be changed
if index is set to 8'h00.
0xf0 : fill QTable (user defined Q-table) in raster scan
0xf1 : fill QTable (user defined Q-table) in zigzag scan
QTable - if QTableIndex is 0xf0 or 0xf1, QTable is filled
return value:
0x00 - success
others - error
*/
UCHAR L2_WriteQTable(UCHAR ChangeQ, UCHAR QTableIndex, UCHAR* QTable) USING_0
{
UCHAR status = L2K_SUCCESS;
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