📄 l2_lcdtv.c
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// patch 5.2.1_28@mattwang@add CASIO2G1163 LCD pannel beg
//#ifdef CASIO2G1163
if(index==19)// Casio2G1163 output
{
//Add for Casio 2G LCD begin by Hamming@2003.04.30
// patch 5.2.1_31@mattwang@fix CASIO2G panel power on sequence beg
XBYTE[0x2D76]|= 0x04; // set DIGTV18 as output to control POCB // 20040414 mattwang add
XBYTE[0x2D73]&= 0xFB; // set POCB low // 20040414 mattwang add
XBYTE[0x2D73]|= 0x04; // set POCB high // 20040414 mattwang add
// patch 5.2.1_33@mattwang@rename Casio2G_write to ThreeWire_WriteLsb12Data beg
ThreeWire_WriteLsb12Data(0x0086); // FUNC1: standby mode // 20040413 mattwang add
ThreeWire_WriteLsb12Data(0x0290); // BRIGHT
ThreeWire_WriteLsb12Data(0x06f1); // VCOMDC
ThreeWire_WriteLsb12Data(0x07f2); // CONTRAST/PANEL1
ThreeWire_WriteLsb12Data(0x0413); // VDISP/PANEL2
ThreeWire_WriteLsb12Data(0x00B4); // HDISP
ThreeWire_WriteLsb12Data(0x07B5); // PANEL3
//ThreeWire_WriteLsb12Data(0x0186); // FUNC1 // 20040413 mattwang mark
ThreeWire_WriteLsb12Data(0x0037); // FUNC2: neg hsync, neg vsync
// patch 5.2.1_33@mattwang@rename Casio2G_write to ThreeWire_WriteLsb12Data end
// patch 5.2.1_31@mattwang@fix CASIO2G panel power on sequence end
// patch 5.2.1_31@mattwang@fix CASIO2G1163 setting beg
XBYTE[0x2D26] = 0x00; // osdsubsamp //Added by Hamming
XBYTE[0x2D04] = 0xA3; //0x23; // hpixel // 20040414 mattwang modify
XBYTE[0x2D05] = 0x03; //0x02; // hpixel // 20040414 mattwang modify
XBYTE[0x2D06] = 0x03; // vsyncw
XBYTE[0x2D07] = 0x01; // hsyncw
XBYTE[0x2D08] = 0x1E; //0x0D; // vldx0 // 20040414 mattwang modify
XBYTE[0x2D09] = 0x00; // vldx0
XBYTE[0x2D0A] = 0x00; // vldy0
XBYTE[0x2D0B] = 0x00; // vldy0
XBYTE[0x2D0C] = 0x48; //0x24; // vldx1 // 20040414 mattwang modify
XBYTE[0x2D0D] = 0x02; // vldx1
XBYTE[0x2D0E] = 0xE2; //0xF0; // vldy1 // 20040414 mattwang modify
XBYTE[0x2D0F] = 0x00; // vldy1
XBYTE[0x2D20] = 0x20; //0x40; // imgsubsamp // 20040414 mattwang modify
XBYTE[0x2D21] = 0x20; //0x40; // osdsubsamp // 20040414 mattwang modify
//Add for Casio 2G LCD end by Hamming@2003.04.30
XBYTE[0x201C] = 0x02; // TV encoder clock=12MHz
XBYTE[0x2D00] = 0x08; // tvdspmode
XBYTE[0x2D02] = 0xF0; //0xFA; // vline // 20040414 mattwang modify
XBYTE[0x2D03] = 0x00; // vline
XBYTE[0x2D1B] = 0x00; // imgvofst
XBYTE[0x2D1C] = 0x00; // imgvofst
XBYTE[0x2D1D] = 0x00; // imghofst
XBYTE[0x2D1E] = 0x00; // imghofst
XBYTE[0x2D33] = 0x00; // osdvofst
XBYTE[0x2D34] = 0x12; //0x0A; // osdhofst // 20040414 mattwang modify
// patch 5.2.1_31@mattwang@fix CASIO2G1163 setting end
//patch4.3@yichang@0613 for TV sharpness
//XBYTE[0x2DE2] = 0x00; // field mode
XBYTE[0x2DE2] = 0x02; // field mode
// patch 5.2.1_31@mattwang@fix CASIO2G panel power on sequence beg
// patch 5.2.1_33@mattwang@rename Casio2G_write to ThreeWire_WriteLsb12Data beg
ThreeWire_WriteLsb12Data(0x0186); // FUNC1: normal mode // 20040413 mattwang add
// patch 5.2.1_33@mattwang@rename Casio2G_write to ThreeWire_WriteLsb12Data end
status = 0;
// patch 5.2.1_31@mattwang@fix CASIO2G panel power on sequence end
}
//#endif
// patch 5.2.1_28@mattwang@add CASIO2G1163 LCD pannel end
// patch 5.2.1_30@mattwang@add STNLCD128 LCD pannel beg
//#ifdef STNLCD128
if(index==20)// GiantPlus output
{
XBYTE[0x2D2B] |= 0x01; //enable gamma //cytsai@0328
XBYTE[0x21AC] |= 0x01; //enable saturation and hue adjustment //cytsai@0328
// patch 5.2.1_32@mattwang@fix STNLCD160 & STNLCD128 setting beg
XBYTE[0x21AE]= 0x58; // saturation // 20040423 mattwang add
XBYTE[0x201C] = 0x02; //00; // TV encoder clock=12MHz // 20040422 mattwang modify
XBYTE[0x2D20] = 0x40; // imgsubsamp // 20040422 mattwang add
XBYTE[0x2D00] = 0x0C; // tvdspmode
XBYTE[0x2D02] = 0x8B; //AF; // vline // 20040423 mattwang modify
XBYTE[0x2D03] = 0x00; // vline
XBYTE[0x2D04] = 0xAB; //1F; // hpixel // 20040423 mattwang modify
XBYTE[0x2D05] = 0x00; //01; // hpixel // 20040423 mattwang modify
XBYTE[0x2D06] = 0x02; // vsyncw
XBYTE[0x2D07] = 0x08; //04; // hsyncw // 20040423 mattwang modify
XBYTE[0x2D08] = 0x28; // vldx0
XBYTE[0x2D09] = 0x00; // vldx0
XBYTE[0x2D0A] = 0x04; // vldy0
XBYTE[0x2D0B] = 0x00; // vldy0
XBYTE[0x2D0C] = 0xA7; // vldx1
XBYTE[0x2D0D] = 0x00; // vldx1
XBYTE[0x2D0E] = 0x83; // vldy1
XBYTE[0x2D0F] = 0x00; // vldy1
XBYTE[0x2D1B] = 0x00; // imgvofst
XBYTE[0x2D1C] = 0x00; // imgvofst
XBYTE[0x2D1D] = 0x00; // imghofst
XBYTE[0x2D1E] = 0x00; // imghofst
XBYTE[0x2D26] = 0x02; // odd , even line
XBYTE[0x2D21] = 0x40; // osdsubsamp
XBYTE[0x2D32] = 0x20; // osdvzfac
XBYTE[0x2D33] = 0x00; // osdvofst
XBYTE[0x2D34] = 0x20; // osdhofst // 20040423 mattwang modify
XBYTE[0x2DE2] = 0x02; // field mode
// patch 5.2.1_32@mattwang@fix STNLCD160 & STNLCD128 setting end
return 0;
}
//#endif
// patch 5.2.1_30@mattwang@add STNLCD128 LCD pannel end
// patch 5.2.1_33@mattwang@add AU015AN04 LCD pannel beg
//#ifdef AU015AN04
if(index==21)// AU015AN04 output
{
ThreeWire_WriteMsb16Data(0x0001); // scan direction: up to down, left to right
ThreeWire_WriteMsb16Data(0x2001); // data setting: UPS052 mode
ThreeWire_WriteMsb16Data(0x400C); // source IC setting: normal operating
ThreeWire_WriteMsb16Data(0x6001); // timing select: UPS052 timing
XBYTE[0x201C] = 0x00; //0x00 27Mhz use 0x02 for 24Mhz // using 27MHz for AU digital I/F TFT-LCD
XBYTE[0x20E6] = 0x80; // phase adjustment
XBYTE[0x2D00] = 0x09; // tvdspmode= UPS052
// patch 5.2.1_35@mattwang@modify AU015AN04 dimension beg
XBYTE[0x2D02] = 262 & 0xFF; // vline
XBYTE[0x2D03] = 262 >> 8; // vline
XBYTE[0x2D06] = 3; // vsyncw
XBYTE[0x2D0A] = ((25-3)-1) & 0xFF; // vldy0
XBYTE[0x2D0B] = ((25-3)-1) >> 8; // vldy0
//XBYTE[0x2D0E] = ((25-3)+220-1) & 0xFF; // vldy1 // 20040805 mattwang mark
//XBYTE[0x2D0F] = ((25-3)+220-1) >> 8; // vldy1
XBYTE[0x2D0E] = ((25-3)+232-1) & 0xFF; // vldy1 // 20040805 mattwang modify
XBYTE[0x2D0F] = ((25-3)+232-1) >> 8; // vldy1
XBYTE[0x2D04] = (1560/2+1) & 0xFF; // hpixel
XBYTE[0x2D05] = (1560/2+1) >> 8; // hpixel
XBYTE[0x2D07] = 25/2+1; // hsyncw
XBYTE[0x2D08] = ((268-4*4)/2) & 0xFF; // vldx0
XBYTE[0x2D09] = ((268-4*4)/2) >> 8; // vldx0
//XBYTE[0x2D0C] = ((268+(280+56)*4)/2-1) & 0xFF; // vldx1 // 20040805 mattwang mark
//XBYTE[0x2D0D] = ((268+(280+56)*4)/2-1) >> 8; // vldx1
XBYTE[0x2D0C] = ((268+(280+36)*4)/2-1) & 0xFF; // vldx1 // 20040805 mattwang modify
XBYTE[0x2D0D] = ((268+(280+36)*4)/2-1) >> 8; // vldx1
// patch 5.2.1_35@mattwang@modify AU015AN04 dimension end
XBYTE[0x2D1B] = 0x00; // imgvofst
XBYTE[0x2D1C] = 0x00; // imgvofst
XBYTE[0x2D1D] = 0x00; // imghofst
XBYTE[0x2D1E] = 0x00; // imghofst
XBYTE[0x2D20] = 0x20; // imgsubsamp
XBYTE[0x2D21] = 0x24; // osdsubsamp
XBYTE[0x2D26] = 0x08; // oddrgb & evenrgb
XBYTE[0x2D33] = 0x00; // osdvofst
XBYTE[0x2D34] = 0x46; // osdhofst
XBYTE[0x2DE2] = 0x02; // field mode
status = 0;
}
//#endif
// patch 5.2.1_33@mattwang@add AU015AN04 LCD pannel end
MemStretch = tmp;
return(status);
}
//-----------------------------------------------------------------------------
//L2_SetDisplaySrcImgSize
//-----------------------------------------------------------------------------
// return value
// 0: no error
// 1: parameter error
UCHAR L2_SetDisplaySrcImgSize(USHORT hsize, USHORT vsize, UCHAR type)
{
UCHAR imghzfac, imgvzfac;
USHORT imggrp, dsphsize, dspvsize;
UCHAR LCD_status = 0;
UCHAR tmp;
//patch4.4@richie@tv begin
//adjust for lcdtv start point
UCHAR tmp1,tmp2;
USHORT lcdtvX0,lcdtvY0;
USHORT lcdtvX1,lcdtvY1;
tmp1 = XBYTE[0x2D09];
tmp2 = XBYTE[0x2D08];
lcdtvX0 = ( ((USHORT)tmp1 << 8) | ((USHORT)tmp2) );
tmp1 = XBYTE[0x2D0B];
tmp2 = XBYTE[0x2D0A];
lcdtvY0 = ( ((USHORT)tmp1 << 8) | ((USHORT)tmp2) );
tmp1 = XBYTE[0x2D0D];
tmp2 = XBYTE[0x2D0C];
lcdtvX1 = ( ((USHORT)tmp1 << 8) | ((USHORT)tmp2) );
tmp1 = XBYTE[0x2D0F];
tmp2 = XBYTE[0x2D0E];
lcdtvY1 = ( ((USHORT)tmp1 << 8) | ((USHORT)tmp2) );
//printf("L2 lcdtv = (%d,%d) (%d,%d)\n",lcdtvX0,lcdtvY0,lcdtvX1,lcdtvY1);
//printf("L2 width = %d,height = %d\n",(lcdtvX1 - lcdtvX0 + 1),(lcdtvY1 - lcdtvY0 + 1));
//patch4.4@richie@tv end
tmp = MemStretch;
MemStretch = 0x01;
if(hsize%16==0) imggrp = (hsize >> 4);
else imggrp = (hsize >> 4) + 1;
if(type==0||type==2||type==4||type==6||type==17) // NTSC display size
//patch4.3@yichang@0612 to fit TV screen
{
//patch4.4@richie@tv begin
//dsphsize = 640;dspvsize = 216;
dsphsize = (lcdtvX1 - lcdtvX0 + 1);
//patch4.4@yichang@tv begin
dspvsize = (lcdtvY1 - lcdtvY0 + 1);
if((G_DSPVsize/dspvsize) != 2)
{
//patch5.2.1@ada@Fix NTSC & PAL display error while rotation begin
//G_DSPVsize = 2 * dspvsize;
//vsize = G_DSPVsize;
vsize = 2 * dspvsize;
//patch5.2.1@ada@Fix NTSC & PAL display error while rotation end
}
//patch4.4@yichang@tv end
//patch4.4@richie@tv end
}
//{dsphsize = 720;dspvsize = 240;}
//{dsphsize = 800;dspvsize = 600;}
else if(type==1||type==3||type==5||type==7) // PAL display size
{
//patch4.4@richie@tv begin
//dsphsize = 720;dspvsize = 288;
dsphsize = (lcdtvX1 - lcdtvX0 + 1);
//patch4.4@yichang@tv begin
dspvsize = (lcdtvY1 - lcdtvY0 + 1);
if((G_DSPVsize/dspvsize) != 2)
{
//patch5.2.1@ada@Fix NTSC & PAL display error while rotation begin
//G_DSPVsize = 2 * dspvsize;
//vsize = G_DSPVsize;
vsize = 2 * dspvsize;
//patch5.2.1@ada@Fix NTSC & PAL display error while rotation end
}
//patch4.4@yichang@tv end
//patch4.4@richie@tv end
}
else if(type==8) // UPS051
{dsphsize = 288;dspvsize = 220;}
else if(type==9) // EPSON LCD panel
{dsphsize = 312;dspvsize = 230;}
else if(type==10) // CASIO LCD panel
{dsphsize = 356;dspvsize = 240;}
else if(type==11) // GiantPlus STN LCD panel
{dsphsize = 240;dspvsize = 160;}
else if(type==12) // PrimeView TFT LCD panel
{dsphsize = 640;dspvsize = 480;}
else if(type==13) // AU015AN02
{dsphsize = 312;dspvsize = 220;}
else if(type==14) // STNLCD160
//patch4.2@richie@0523
{dsphsize = 161;dspvsize = 120;}
else if(type==15) // PrimeView TFT LCD panel
{dsphsize = 800;dspvsize = 600;}
else if(type==16) // AU015BL01 //patch5.2.1@cwh@AU015BL01;2003/08/08
{dsphsize = 520;dspvsize = 250;}
// patch 5.2.1_28@mattwang@rename CASIO2G to CASIO2G1181 beg
else if(type==18) // CASIO2G1181 //patch5.2.1@cwh@CASIO2G;2003/09/24
{dsphsize = 480;dspvsize = 240;}
// patch 5.2.1_28@mattwang@rename CASIO2G to CASIO2G1181 end
// patch 5.2.1_28@mattwang@add CASIO2G1163 LCD pannel beg
else if(type==19) // CASIO2G1163
{dsphsize = 280;dspvsize = 228;}//WENDY@2004/9/9
// patch 5.2.1_28@mattwang@add CASIO2G1163 LCD pannel end
// patch 5.2.1_30@mattwang@add STNLCD128 LCD pannel beg
else if(type==20) // STNLCD128
{dsphsize = 128;dspvsize = 128;}
// patch 5.2.1_30@mattwang@add STNLCD128 LCD pannel end
// patch 5.2.1_33@mattwang@add AU015AN04 LCD pannel beg
else if(type==21) // AU015AN04
{dsphsize = 340;dspvsize = 232;} // 20040805 mattwang modify
// patch 5.2.1_33@mattwang@add AU015AN04 LCD pannel end
else LCD_status = 1;
imgvzfac = ((ULONG)vsize*32)/dspvsize;
imghzfac = ((ULONG)hsize*128)/dsphsize;
//printf("hsizec=%d, vsize=%d\n",hsize,vsize);
//printf("dsphsize=%d, dspvsize=%d\n",dsphsize,dspvsize);
//printf("imghzfac=%bx, imgvzfac=%bx\n",imghzfac,imgvzfac);
XBYTE[0x2D19] = imgvzfac;
XBYTE[0x2D1A] = imghzfac;
XBYTE[0x2D1F] = imggrp;
MemStretch = tmp;
return(LCD_status);
}
//-----------------------------------------------------------------------------
//L2_TurnOnOffDisplay
//-----------------------------------------------------------------------------
// return value
// 0: no error
// 1: parameter error
UCHAR L2_TurnOnOffDisplay1 (UCHAR mode)
{
UCHAR type;
UCHAR LCD_state = 0;
UCHAR tmp;
tmp = MemStretch;
MemStretch = 0x01;
type = XBYTE[0x2D00];
//patch4.4@richie@flip
type = type & 0x0F;
if(mode>2){
LCD_state = 1; // parameter error
}
//Joe@2003.3.12 14:26 modify begin
//else if(mode==0)
else if( (mode==0) || (G_DisplayMode == K_DisplayModePowerOff) )
//Joe@2003.3.12 14:26 modify end
{ // turn off display
//Joe@2003.3.5 13:42 add begin
if ((XBYTE[0x2001] & 0x01) > 0) //Make sure TV output is enabled
{
while ((XBYTE[0x2DA0] & 0x08) > 0); //wait TV VD low
while ((XBYTE[0x2DA0] & 0x08) == 0); //wait TV VD high
}
//Joe@2003.3.5 13:43 add end
XBYTE[0x2001] = 0x04;
XBYTE[0x2D01] = XBYTE[0x2D01] | 0x10;
//patch4.4.1@yichang@ to fix two LCD/TV display bugs
//1. TV output field sequence error.
//2. LCD and TV picture become vague as the display device is changed repeatedly.
//begin:
XBYTE[0x2013] = XBYTE[0x2013] & 0xE7; // stop the 27 and 13.5MHz source
//Joe@2003.2.25 14:52 add begin
#if(TURNKEY_OPTION == 1)
//L2_SetGPIOBit(15,0); //LCD_BACKLIGHT
//DbgPrint("L2_TurnOnOffDisplay15=%bu\n",15);
#else
L2_SetGPIOBit(16,0);
#endif
//Joe@2003.2.25 14:52 add end
}
else if(mode==1)
{ // turn on display
if(type==0||type==1)
{
//Joe@2003.2.25 14:52 add begin
#if(TURNKEY_OPTION == 1)
//L2_SetGPIOBit(15,0); //LCD_BACKLIGHT
//DbgPrint("L2_TurnOnOffDisplay16=%bu\n",16);
#else
L2_SetGPIOBit(16,0); //Back light(5V,18V)
#endif
//Joe@2003.3.5 13:42 add begin
if ((XBYTE[0x2001] & 0x01) > 0) //Make sure TV output is enabled
{
while ((XBYTE[0x2DA0] & 0x08) > 0); //wait TV VD low
while ((XBYTE[0x2DA0] & 0x08) == 0); //wait TV VD high
}
//Joe@2003.3.5 13:43 add end
//Joe@2003.2.27 13:06 modify begin
XBYTE[0x2001] = 0x01;
//XBYTE[0x2001] = 0x09;
//Joe@2003.2.27 13:06 modify end
XBYTE[0x2D01] = XBYTE[0x2D01] | 0x10;
XBYTE[0x2013] = XBYTE[0x2013] | 0x18; // start the 27 and 13.5MHz source
//Joe@2003.2.25 14:52 add end
}
else
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