sdramhw.c

台湾凌阳方案300万数码相机源代码

/*++

Copyright (c) 2001 Sunplus Technology Co., Ltd.

Module Name:

        sdramhw.c

Abstract:

        Module related to hardware access of SDRAM

Environment:

        Keil C51 Compiler

Revision History:

        08/28/2001      Chi-Yeh Tsai    created

--*/

//=============================================================================
//Header file
//=============================================================================
#include "general.h"
#include "asicreg.h"
#if ( CARD_OPTION == 1 )
#include "doslink.h"
#endif

#include "sdramhw.h"
#include "main.h"
#include "setmode.h"

//=============================================================================
//Symbol
//=============================================================================
//-----------------------------------------------------------------------------
//Constant
//-----------------------------------------------------------------------------

//-----------------------------------------------------------------------------
//Variable
//-----------------------------------------------------------------------------

//=============================================================================
//Program
//=============================================================================
#if 1
//-------------------------------------
//SDRAM_HwInitialize
//-------------------------------------
void SDRAM_HwInitialize(void) USING_0
{
        L2_FlashMode(K_MEDIA_None, K_MEDIA_None, K_MEDIA_PageSize512);
}
#endif

//-------------------------------------
//SDRAM_Dram2Sram
//-------------------------------------
// WWWW start
//patch4.5@ada@Add timeout count begin
UCHAR SDRAM_Dram2Sram(ULONG ramAddr, UCHAR *sramAddr, USHORT siz) USING_0
//void SDRAM_Dram2Sram(ULONG ramAddr, UCHAR *sramAddr, USHORT siz) USING_0
//patch4.5@ada@Add timeout count end
{
        WORD	i, k;

	//patch4.5@ada@Add timeout count begin
	UCHAR error;
	//patch4.5@ada@Add timeout count end
        
        SDRAM_CardSetStartAddress( ramAddr, TRUE );

	#if (K_HAVE_L2)
	if (sramAddr >= (UCHAR *)0x1000)
	{
		i = 0;
		while (siz > 0)
		{
			if (siz >= 1024)
				k = 1024;
			else
				k = siz;
			L2_SetDRAMDMA(ramAddr+(i>>1));
	     		L2_SetSRAMDMA((WORD)sramAddr - (WORD)0x1000 + (WORD)i); // 0x0c00

			//patch4.5@ada@Add timeout count begin
			error = L2_DoDMA(0,1,k,0,0); 	

			if (error != 0)
			{
				return FALSE;
			}
			//patch4.5@ada@Add timeout count end

			i += k;
			siz -= k;
		}
	}
	else
	{
		// wyeo@0527, patch 4.2
        	for (i = 0; i < siz; i += 2)
		{
			M_DRAM_ReadWord(sramAddr[i], sramAddr[i+1]);
		}
	}
	#else
		// wyeo@0527, patch 4.2
        	for (i = 0; i < siz; i += 2)
		{
			M_DRAM_ReadWord(sramAddr[i], sramAddr[i+1]);
		}
	#endif

	//patch4.5@ada@Add timeout count begin
	return TRUE;
	//patch4.5@ada@Add timeout count end
}

//-------------------------------------
//SDRAM_Sram2Dram
//-------------------------------------
//patch4.5@ada@Add timeout count begin
UCHAR SDRAM_Sram2Dram(UCHAR *sramAddr, ULONG ramAddr, USHORT siz) USING_0
//void SDRAM_Sram2Dram(UCHAR *sramAddr, ULONG ramAddr, USHORT siz) USING_0
//patch4.5@ada@Add timeout count end
{
	WORD	i, k;

	//patch4.5@ada@Add timeout count begin	
	UCHAR error;
	//patch4.5@ada@Add timeout count end
	
        SDRAM_CardSetStartAddress( ramAddr, FALSE );

	#if (K_HAVE_L2)
	if (sramAddr >= (UCHAR *)0x1000)
	{
		i = 0;
		while ( siz > 0 )
		{
			if (siz >= 1024)
				k = 1024;
			else
				k = siz;
	     		L2_SetSRAMDMA((WORD)sramAddr - (WORD)0x1000 + (WORD)i);
	     		L2_SetDRAMDMA(ramAddr+(i>>1));

				//patch4.5@ada@Add timeout count begin
	     		error = L2_DoDMA(1,0,k,0,0); 		          

				if (error != 0)
				{
					return FALSE;
				}
				//patch4.5@ada@Add timeout count end

			i += k;
			siz -= k;
		}
	}
	else
	{
		// wyeo@0527, patch 4.2
        	for (i = 0; i < siz; i += 2)
		{
			M_DRAM_WriteWord(sramAddr[i], sramAddr[i+1]);
		}
	}
	#else
		// wyeo@0527, patch 4.2
        	for (i = 0; i < siz; i += 2)
		{
			M_DRAM_WriteWord(sramAddr[i], sramAddr[i+1]);
		}
	#endif

	//patch4.5@ada@Add timeout count begin
	return TRUE;
	//patch4.5@ada@Add timeout count end
}

void SDRAM_CardSetStartAddress(ULONG address, BYTE prefetch) USING_0
{
     	//L2_DRAMSetStartAddr(address, prefetch);
	M_DRAM_SetStartAddress(address, prefetch);

        #if ( CARD_OPTION == 1 )
        G_DOS_SDRAM_NextIntRetAddr = address;      
        if ( prefetch )
                G_File_SDRAM_Read = 1;
	else
		G_File_SDRAM_Read = 0;
        #endif
}

// WWWW end


//-----------------------------------------------------------------------------
//SDRAM_Dram2Usb
//-----------------------------------------------------------------------------
UCHAR SDRAM_Dram2Usb(ULONG address, USHORT size) USING_0
{
        UCHAR status = TRUE;
	UCHAR bi;
	USHORT offset;

	//patch4.5@ada@Add timeout count begin
	UCHAR error;
	//patch4.5@ada@Add timeout count end

        G_ucState3 &= 0xfe;                             //FIFO prepare data doing
		
        //cytsai@1218
	//richie@vc0422
        //L2_DRAMSetStartAddr(address, K_SDRAM_NoPrefetch);
	L2_SetUSBDMA(K_DMA_UsbDontCare,K_USB_AP_DMA_IN);//for ap //BULK 2

////printf("size=%d\n",size);
	offset = 0;
	while (size > 1024)
	{
		L2_SetDRAMDMA(address + (offset / 2));

		//patch4.5@ada@Add timeout count begin
	     error = L2_DoDMA(K_DMA_DRAM, K_DMA_USB, 1024, K_DMA_AsyncRet, K_DMA_NoPadding0s);

		if (error != 0)
		{
			return FALSE;
		}
		//patch4.5@ada@Add timeout count end

	        G_ucState3 |= 0x01;

		//richie@vc0422
		for (bi=0;bi<(1024 / 64);bi++)
		{
////printf("w bi = %bx\n",bi);
			while (XBYTE[K_USB_AP_IN_BUF_SIZE] < 64) ;  //wait for 64 in bulk 2 buffer
			XBYTE[0x25a1] = K_USB_AP_IN_OPEN;//0x08;//open bulk in BULK2
			while ((XBYTE[0x25c2] & K_USB_AP_IN_ACK_MASK) == 0) ;  //wait pc ack
			XBYTE[0x25c2] = XBYTE[0x25c2] & K_USB_AP_IN_ACK_RESET;//reset 0x25c2
		}
		size -= 1024;
		offset += 1024;
	}

	if (size > 0)
	{
		L2_SetDRAMDMA(address + (offset / 2));

		//patch4.5@ada@Add timeout count begin
	     error = L2_DoDMA(K_DMA_DRAM, K_DMA_USB, size, K_DMA_AsyncRet, K_DMA_NoPadding0s);

		if (error != 0)
		{
			return FALSE;
		}
		//patch4.5@ada@Add timeout count end

	        G_ucState3 |= 0x01;

		//richie@vc0422
		for (bi=0;bi<(size / 64);bi++)
		{
////printf("i bi = %bx\n",bi);
			while (XBYTE[K_USB_AP_IN_BUF_SIZE] < 64) ;  //wait for 64 in bulk 2 buffer
			XBYTE[0x25a1] = K_USB_AP_IN_OPEN;//0x08;//open bulk in BULK2
			while ((XBYTE[0x25c2] & K_USB_AP_IN_ACK_MASK) == 0) ;  //wait pc ack
			XBYTE[0x25c2] = XBYTE[0x25c2] & K_USB_AP_IN_ACK_RESET;//reset 0x25c2
		}


		if ((size % 64) != 0)
		{
			while (XBYTE[K_USB_AP_IN_BUF_SIZE] < (size % 64)) ;  //wait for 64 in bulk buffer
			XBYTE[0x25a1] = K_USB_AP_IN_OPEN;//0x08;//open bulk in BULK2
			while ((XBYTE[0x25c2] & K_USB_AP_IN_ACK_MASK) == 0) ;  //wait pc ack
			XBYTE[0x25c2] = XBYTE[0x25c2] & K_USB_AP_IN_ACK_RESET;//reset 0x25c2
		}
	}


	//richie@vc0422
        //status = L2_CheckReadData2UsbDmaDone(size);

        G_ucState3 &= 0xf0;

        return status;
}