📄 os_dcc.lst
字号:
##############################################################################
# #
# IAR ARM ANSI C/C++ Compiler V4.42A/W32 EVALUATION 12/Dec/2008 17:14:25 #
# Copyright 1999-2005 IAR Systems. All rights reserved. #
# #
# Cpu mode = arm #
# Endian = little #
# Stack alignment = 4 #
# Source file = E:\IAR_2478\IAR_2478\26uCOS\Src\uCOS\UCOS-II\uCOS-II #
# \cpu\os_dcc.c #
# Command line = E:\IAR_2478\IAR_2478\26uCOS\Src\uCOS\UCOS-II\uCOS-II #
# \cpu\os_dcc.c -lCN E:\IAR_2478\IAR_2478\26uCOS\Src\u #
# COS\RAM_Debug\List\ -o E:\IAR_2478\IAR_2478\26uCOS\S #
# rc\uCOS\RAM_Debug\Obj\ -z2 --no_cse --no_unroll #
# --no_inline --no_code_motion --no_tbaa #
# --no_clustering --no_scheduling --debug --cpu_mode #
# arm --endian little --cpu ARM7TDMI-S --stack_align #
# 4 -e --fpu None --dlib_config "C:\Program Files\IAR #
# Systems\Embedded Workbench 4.0 #
# Evaluation\arm\LIB\dl4tpannl8n.h" -I #
# E:\IAR_2478\IAR_2478\26uCOS\Src\uCOS\include\ -I #
# E:\IAR_2478\IAR_2478\26uCOS\Src\uCOS\ucos-ii\include #
# \ -I "C:\Program Files\IAR Systems\Embedded #
# Workbench 4.0 Evaluation\arm\INC\" #
# List file = E:\IAR_2478\IAR_2478\26uCOS\Src\uCOS\RAM_Debug\List\ #
# os_dcc.lst #
# Object file = E:\IAR_2478\IAR_2478\26uCOS\Src\uCOS\RAM_Debug\Obj\o #
# s_dcc.r79 #
# #
# #
##############################################################################
E:\IAR_2478\IAR_2478\26uCOS\Src\uCOS\UCOS-II\uCOS-II\cpu\os_dcc.c
1 /*
2 *********************************************************************************************************
3 * uC/OS-II
4 * The Real-Time Kernel
5 *
6 *
7 * (c) Copyright 1992-2007, Micrium, Weston, FL
8 * All Rights Reserved
9 *
10 * Generic ARM Port
11 * DCC Communication
12 *
13 * File : OS_DCC.C
14 * Version : V1.82
15 *
16 * For : ARM7 or ARM9
17 * Mode : ARM or Thumb
18 * Toolchain : IAR's EWARM V4.40a and higher
19 *********************************************************************************************************
20 */
21
22 #include <ucos_ii.h>
23 /* This directive suppresses warnings for non-... */
24 #pragma diag_suppress=Pe940 /* ...void functions with no return values. */
25
26 #if OS_CPU_ARM_DCC_EN > 0
27
28 /*
29 *********************************************************************************************************
30 * CONSTANTS
31 *********************************************************************************************************
32 */
33
34 #define OS_DCC_OP_READ_U32 0x01000000
35 #define OS_DCC_OP_READ_U16 0x02000000
36 #define OS_DCC_OP_READ_U8 0x04000000
37 #define OS_DCC_OP_GET_CAPS 0x08000000
38 #define OS_DCC_OP_WRITE_U32 0x10000000
39 #define OS_DCC_OP_WRITE_U16 0x20000000
40 #define OS_DCC_OP_WRITE_U8 0x40000000
41 #define OS_DCC_OP_ODD_ADDR 0x80000000
42 #define OS_DCC_OP_COMMAND 0x00000001
43
44 #define OS_DCC_COMM_CTRL_RD 0x00000001
45 #define OS_DCC_COMM_CTRL_WR 0x00000002
46
47 #define OS_DCC_SIGNATURE 0x91CA0000
48 #define OS_DCC_CONFIG 0x00000077
49
50 /*
51 *********************************************************************************************************
52 * LOCAL VARIABLES
53 *********************************************************************************************************
54 */
55
\ In segment DATA_Z, align 4, align-sorted
56 static INT32U OSDCC_Cmd;
\ OSDCC_Cmd:
\ 00000000 DS8 4
\ In segment DATA_Z, align 4, align-sorted
57 static INT32U OSDCC_Addr;
\ OSDCC_Addr:
\ 00000000 DS8 4
\ In segment DATA_Z, align 4, align-sorted
58 static INT32U OSDCC_ItemCnt;
\ OSDCC_ItemCnt:
\ 00000000 DS8 4
\ In segment DATA_Z, align 4, align-sorted
59 static INT32U OSDCC_Data;
\ OSDCC_Data:
\ 00000000 DS8 4
60
61 /*
62 *********************************************************************************************************
63 * OSDCC_ReadCtrl()
64 *
65 * Description: This function retrieves data from the comms control register.
66 *
67 * Arguments : none
68 *
69 * Returns : The contents of the comms control register
70 *
71 * Notes : 1) This function uses a coprocessor register transfer instruction to place the contents
72 * of the comms control register in R0. Thus, the function does not contain an
73 * explicit return statement. "#pragma diag_suppress=Pe940", which appears at the
74 * top of this file, is used to suppress the warning that normally results from non-
75 * void functions lacking return statements.
76 *********************************************************************************************************
77 */
78
\ In segment CODE, align 4, keep-with-next
79 static __arm INT32U OSDCC_ReadCtrl (void)
80 {
81 __asm("mrc P14,0,R0,C0,C0");
\ OSDCC_ReadCtrl:
\ 00000000 100E10EE mrc P14,0,R0,C0,C0
82 }
\ 00000004 0EF0A0E1 MOV PC,LR ;; return
83
84 /*
85 *********************************************************************************************************
86 * OSDCC_Read()
87 *
88 * Description: This function retrieves data from the comms data read register.
89 *
90 * Arguments : none
91 *
92 * Returns : The contents of the comms data read register
93 *
94 * Notes : 1) This function uses a coprocessor register transfer instruction to place the contents
95 * of the comms data read register in R0. Thus, the function does not contain an
96 * explicit return statement. "#pragma diag_suppress=Pe940", which appears at the
97 * top of this file, is used to suppress the warning that normally results from non-
98 * void functions lacking return statements.
99 *********************************************************************************************************
100 */
101
\ In segment CODE, align 4, keep-with-next
102 static __arm INT32U OSDCC_Read (void)
103 {
104 __asm("mrc P14,0,R0,C1,C0");
\ OSDCC_Read:
\ 00000000 100E11EE mrc P14,0,R0,C1,C0
105 }
\ 00000004 0EF0A0E1 MOV PC,LR ;; return
106
107 /*
108 *********************************************************************************************************
109 * OSDCC_Write()
110 *
111 * Description: This function places data in the comms data write register.
112 *
113 * Arguments : none
114 *
115 * Returns : none
116 *********************************************************************************************************
117 */
118
\ In segment CODE, align 4, keep-with-next
119 static __arm void OSDCC_Write (INT32U data)
120 {
121 __asm("mcr P14,0,R0,C1,C0");
\ OSDCC_Write:
\ 00000000 100E01EE mcr P14,0,R0,C1,C0
122 }
\ 00000004 0EF0A0E1 MOV PC,LR ;; return
123
124 /*
125 *********************************************************************************************************
126 * OSDCC_Handler()
127 *
128 * Description: This function reads commands from the DCC comms data read register. Data may be
129 * transferred to or from memory based on those commands.
130 *
131 * Arguments : none
132 *
133 * Returns : none
134 *
135 * Notes : 1) This function should be called periodically. If OS_CPU_ARM_DCC_EN is '1', this
136 * function will be called from both the idle task hook and the tick interrupt hook.
137 *********************************************************************************************************
138 */
139
\ In segment CODE, align 4, keep-with-next
140 void OSDCC_Handler (void)
141 {
\ OSDCC_Handler:
\ 00000000 30402DE9 PUSH {R4,R5,LR}
142 INT32U reg_val;
143 #if OS_CRITICAL_METHOD == 3 /* Allocate storage for CPU status register */
144 OS_CPU_SR cpu_sr = 0;
\ 00000004 0000A0E3 MOV R0,#+0
\ 00000008 0050B0E1 MOVS R5,R0
145 #endif
146
147
148 OS_ENTER_CRITICAL(); /* Disable interrupts */
\ 0000000C ........ _BLF OS_CPU_SR_Save,??OS_CPU_SR_Save??rA
\ 00000010 0050B0E1 MOVS R5,R0
149
150 /* Check for the presence of new data */
151 if ((OSDCC_ReadCtrl() & OS_DCC_COMM_CTRL_RD) != 0) {
\ 00000014 ........ BL OSDCC_ReadCtrl
\ 00000018 010010E3 TST R0,#0x1
\ 0000001C 5C00000A BEQ ??OSDCC_Handler_0
152 reg_val = OSDCC_Read(); /* Read the new data */
\ 00000020 ........ BL OSDCC_Read
\ 00000024 0040B0E1 MOVS R4,R0
153
154 if ((reg_val & OS_DCC_OP_COMMAND) != 0) { /* Determine whether a command has been received */
\ 00000028 010014E3 TST R4,#0x1
\ 0000002C 5600000A BEQ ??OSDCC_Handler_1
155 OSDCC_Cmd = reg_val;
\ 00000030 44029FE5 LDR R0,??OSDCC_Handler_2 ;; OSDCC_Cmd
\ 00000034 004080E5 STR R4,[R0, #+0]
156 /* Check for an odd address in the next operation */
157 if ((OSDCC_Cmd & OS_DCC_OP_ODD_ADDR) != 0) {
\ 00000038 3C029FE5 LDR R0,??OSDCC_Handler_2 ;; OSDCC_Cmd
\ 0000003C 000090E5 LDR R0,[R0, #+0]
\ 00000040 800410E3 TST R0,#0x80000000
\ 00000044 0400000A BEQ ??OSDCC_Handler_3
158 OSDCC_Addr |= 1;
\ 00000048 30029FE5 LDR R0,??OSDCC_Handler_2+0x4 ;; OSDCC_Addr
\ 0000004C 2C129FE5 LDR R1,??OSDCC_Handler_2+0x4 ;; OSDCC_Addr
\ 00000050 001091E5 LDR R1,[R1, #+0]
\ 00000054 011091E3 ORRS R1,R1,#0x1
\ 00000058 001080E5 STR R1,[R0, #+0]
159 }
160 /* If data will be read, adjust OSDCC_ItemCnt */
161 if ((OSDCC_Cmd & (OS_DCC_OP_READ_U32 | OS_DCC_OP_READ_U16 | OS_DCC_OP_READ_U8
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -