📄 target.lst
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\ 00000064 203093E3 ORRS R3,R3,#0x20
\ 00000068 003082E5 STR R3,[R2, #+0]
91 while( !(SCS & 0x40) ); /* Wait until main OSC is usable */
\ ??ConfigurePLL_2:
\ 0000006C 00219FE5 LDR R2,??ConfigurePLL_0+0xC ;; 0xffffffffe01fc1a0
\ 00000070 002092E5 LDR R2,[R2, #+0]
\ 00000074 400012E3 TST R2,#0x40
\ 00000078 FBFFFF0A BEQ ??ConfigurePLL_2
92
93 CLKSRCSEL = 0x1; /* select main OSC, 12MHz, as the PLL clock source */
\ 0000007C F4209FE5 LDR R2,??ConfigurePLL_0+0x10 ;; 0xffffffffe01fc10c
\ 00000080 0130A0E3 MOV R3,#+1
\ 00000084 003082E5 STR R3,[R2, #+0]
94
95 PLLCFG = PLL_MValue | (PLL_NValue << 16);
\ 00000088 EC209FE5 LDR R2,??ConfigurePLL_0+0x14 ;; 0xffffffffe01fc084
\ 0000008C 0B30A0E3 MOV R3,#+11
\ 00000090 003082E5 STR R3,[R2, #+0]
96 PLLFEED = 0xaa;
\ 00000094 D4209FE5 LDR R2,??ConfigurePLL_0+0x8 ;; 0xffffffffe01fc08c
\ 00000098 AA30A0E3 MOV R3,#+170
\ 0000009C 003082E5 STR R3,[R2, #+0]
97 PLLFEED = 0x55;
\ 000000A0 C8209FE5 LDR R2,??ConfigurePLL_0+0x8 ;; 0xffffffffe01fc08c
\ 000000A4 5530A0E3 MOV R3,#+85
\ 000000A8 003082E5 STR R3,[R2, #+0]
98
99 PLLCON = 1; /* Enable PLL, disconnected */
\ 000000AC B8209FE5 LDR R2,??ConfigurePLL_0+0x4 ;; 0xffffffffe01fc080
\ 000000B0 0130A0E3 MOV R3,#+1
\ 000000B4 003082E5 STR R3,[R2, #+0]
100 PLLFEED = 0xaa;
\ 000000B8 B0209FE5 LDR R2,??ConfigurePLL_0+0x8 ;; 0xffffffffe01fc08c
\ 000000BC AA30A0E3 MOV R3,#+170
\ 000000C0 003082E5 STR R3,[R2, #+0]
101 PLLFEED = 0x55;
\ 000000C4 A4209FE5 LDR R2,??ConfigurePLL_0+0x8 ;; 0xffffffffe01fc08c
\ 000000C8 5530A0E3 MOV R3,#+85
\ 000000CC 003082E5 STR R3,[R2, #+0]
102
103 CCLKCFG = CCLKDivValue; /* Set clock divider */
\ 000000D0 A8209FE5 LDR R2,??ConfigurePLL_0+0x18 ;; 0xffffffffe01fc104
\ 000000D4 0430A0E3 MOV R3,#+4
\ 000000D8 003082E5 STR R3,[R2, #+0]
104 #if USE_USB
105 USBCLKCFG = USBCLKDivValue; /* usbclk = 288 MHz/6 = 48 MHz */
\ 000000DC A0209FE5 LDR R2,??ConfigurePLL_0+0x1C ;; 0xffffffffe01fc108
\ 000000E0 0530A0E3 MOV R3,#+5
\ 000000E4 003082E5 STR R3,[R2, #+0]
106 #endif
107
108 while ( ((PLLSTAT & (1 << 26)) == 0) ); /* Check lock bit status */
\ ??ConfigurePLL_3:
\ 000000E8 78209FE5 LDR R2,??ConfigurePLL_0 ;; 0xffffffffe01fc088
\ 000000EC 002092E5 LDR R2,[R2, #+0]
\ 000000F0 400612E3 TST R2,#0x4000000
\ 000000F4 FBFFFF0A BEQ ??ConfigurePLL_3
109
110 MValue = PLLSTAT & 0x00007FFF;
\ 000000F8 68209FE5 LDR R2,??ConfigurePLL_0 ;; 0xffffffffe01fc088
\ 000000FC 002092E5 LDR R2,[R2, #+0]
\ 00000100 8228B0E1 LSLS R2,R2,#+17
\ 00000104 A228B0E1 LSRS R2,R2,#+17
\ 00000108 0200B0E1 MOVS R0,R2
111 NValue = (PLLSTAT & 0x00FF0000) >> 16;
\ 0000010C 54209FE5 LDR R2,??ConfigurePLL_0 ;; 0xffffffffe01fc088
\ 00000110 002092E5 LDR R2,[R2, #+0]
\ 00000114 FF2812E2 ANDS R2,R2,#0xFF0000
\ 00000118 2228B0E1 LSRS R2,R2,#+16
\ 0000011C 0210B0E1 MOVS R1,R2
112 while ((MValue != PLL_MValue) && ( NValue != PLL_NValue) );
\ ??ConfigurePLL_4:
\ 00000120 0B0050E3 CMP R0,#+11
\ 00000124 0100000A BEQ ??ConfigurePLL_5
\ 00000128 000051E3 CMP R1,#+0
\ 0000012C FBFFFF1A BNE ??ConfigurePLL_4
113
114 PLLCON = 3; /* enable and connect */
\ ??ConfigurePLL_5:
\ 00000130 34209FE5 LDR R2,??ConfigurePLL_0+0x4 ;; 0xffffffffe01fc080
\ 00000134 0330A0E3 MOV R3,#+3
\ 00000138 003082E5 STR R3,[R2, #+0]
115 PLLFEED = 0xaa;
\ 0000013C 2C209FE5 LDR R2,??ConfigurePLL_0+0x8 ;; 0xffffffffe01fc08c
\ 00000140 AA30A0E3 MOV R3,#+170
\ 00000144 003082E5 STR R3,[R2, #+0]
116 PLLFEED = 0x55;
\ 00000148 20209FE5 LDR R2,??ConfigurePLL_0+0x8 ;; 0xffffffffe01fc08c
\ 0000014C 5530A0E3 MOV R3,#+85
\ 00000150 003082E5 STR R3,[R2, #+0]
117 while ( ((PLLSTAT & (1 << 25)) == 0) ); /* Check connect bit status */
\ ??ConfigurePLL_6:
\ 00000154 0C209FE5 LDR R2,??ConfigurePLL_0 ;; 0xffffffffe01fc088
\ 00000158 002092E5 LDR R2,[R2, #+0]
\ 0000015C 800712E3 TST R2,#0x2000000
\ 00000160 FBFFFF0A BEQ ??ConfigurePLL_6
118 return;
\ 00000164 0EF0A0E1 MOV PC,LR ;; return
\ ??ConfigurePLL_0:
\ 00000168 88C01FE0 DC32 0xffffffffe01fc088
\ 0000016C 80C01FE0 DC32 0xffffffffe01fc080
\ 00000170 8CC01FE0 DC32 0xffffffffe01fc08c
\ 00000174 A0C11FE0 DC32 0xffffffffe01fc1a0
\ 00000178 0CC11FE0 DC32 0xffffffffe01fc10c
\ 0000017C 84C01FE0 DC32 0xffffffffe01fc084
\ 00000180 04C11FE0 DC32 0xffffffffe01fc104
\ 00000184 08C11FE0 DC32 0xffffffffe01fc108
119 }
120
121 /******************************************************************************
122 ** Function name: TargetResetInit
123 **
124 ** Descriptions: Initialize the target board before running the main()
125 ** function; User may change it as needed, but may not
126 ** deleted it.
127 **
128 ** parameters: None
129 ** Returned value: None
130 **
131 ******************************************************************************/
\ In segment CODE, align 4, keep-with-next
132 void TargetResetInit(void)
133 {
\ TargetResetInit:
\ 00000000 00402DE9 PUSH {LR}
134 /* This if-else statement detects if interrupt vectors located by the linker
135 command file are at memory location 0 or not. */
136 #pragma segment = "INTVEC"
137 if (( void * )0x00000000UL == __segment_begin( "INTVEC" ))
\ 00000004 8C009FE5 LDR R0,??TargetResetInit_0 ;; SFB(INTVEC)
\ 00000008 000050E3 CMP R0,#+0
\ 0000000C 0300001A BNE ??TargetResetInit_1
138 {
139 MEMMAP = 1; // normal flash mode
\ 00000010 84009FE5 LDR R0,??TargetResetInit_0+0x4 ;; 0xffffffffe01fc040
\ 00000014 0110A0E3 MOV R1,#+1
\ 00000018 001080E5 STR R1,[R0, #+0]
\ 0000001C 020000EA B ??TargetResetInit_2
140 }
141 else
142 {
143 MEMMAP = 2 ; // user ram mode - Map lowest 64 bytes of the address space to
\ ??TargetResetInit_1:
\ 00000020 74009FE5 LDR R0,??TargetResetInit_0+0x4 ;; 0xffffffffe01fc040
\ 00000024 0210A0E3 MOV R1,#+2
\ 00000028 001080E5 STR R1,[R0, #+0]
144 // bottom of internal RAM, moving exception vectors into place
145 }
146
147 #if USE_USB
148 PCONP |= 0x80000000; /* Turn On USB PCLK */
\ ??TargetResetInit_2:
\ 0000002C 6C009FE5 LDR R0,??TargetResetInit_0+0x8 ;; 0xffffffffe01fc0c4
\ 00000030 68109FE5 LDR R1,??TargetResetInit_0+0x8 ;; 0xffffffffe01fc0c4
\ 00000034 001091E5 LDR R1,[R1, #+0]
\ 00000038 801491E3 ORRS R1,R1,#0x80000000
\ 0000003C 001080E5 STR R1,[R0, #+0]
149 #endif
150 /* Configure PLL, switch from IRC to Main OSC */
151 ConfigurePLL();
\ 00000040 ........ BL ConfigurePLL
152
153 /* Set system timers for each component */
154 #if (Fpclk / (Fcclk / 4)) == 1
155 PCLKSEL0 = 0x00000000; /* PCLK is 1/4 CCLK */
156 PCLKSEL1 = 0x00000000;
157 #endif
158 #if (Fpclk / (Fcclk / 4)) == 2
159 PCLKSEL0 = 0xAAAAAAAA; /* PCLK is 1/2 CCLK */
\ 00000044 58009FE5 LDR R0,??TargetResetInit_0+0xC ;; 0xffffffffe01fc1a8
\ 00000048 58109FE5 LDR R1,??TargetResetInit_0+0x10 ;; 0xffffffffaaaaaaaa
\ 0000004C 001080E5 STR R1,[R0, #+0]
160 PCLKSEL1 = 0xAAAAAAAA;
\ 00000050 54009FE5 LDR R0,??TargetResetInit_0+0x14 ;; 0xffffffffe01fc1ac
\ 00000054 4C109FE5 LDR R1,??TargetResetInit_0+0x10 ;; 0xffffffffaaaaaaaa
\ 00000058 001080E5 STR R1,[R0, #+0]
161 #endif
162 #if (Fpclk / (Fcclk / 4)) == 4
163 PCLKSEL0 = 0x55555555; /* PCLK is the same as CCLK */
164 PCLKSEL1 = 0x55555555;
165 #endif
166
167 /* Set memory accelerater module*/
168 MAMCR = 0;
\ 0000005C E004A0E3 MOV R0,#-536870912
\ 00000060 7F0980E3 ORR R0,R0,#0x1FC000
\ 00000064 0010A0E3 MOV R1,#+0
\ 00000068 001080E5 STR R1,[R0, #+0]
169 #if Fcclk < 20000000
170 MAMTIM = 1;
171 #else
172 #if Fcclk < 40000000
173 MAMTIM = 2;
174 #else
175 MAMTIM = 3;
\ 0000006C 4E02A0E3 MOV R0,#-536870908
\ 00000070 7F0980E3 ORR R0,R0,#0x1FC000
\ 00000074 0310A0E3 MOV R1,#+3
\ 00000078 001080E5 STR R1,[R0, #+0]
176 #endif
177 #endif
178 MAMCR = 2;
\ 0000007C E004A0E3 MOV R0,#-536870912
\ 00000080 7F0980E3 ORR R0,R0,#0x1FC000
\ 00000084 0210A0E3 MOV R1,#+2
\ 00000088 001080E5 STR R1,[R0, #+0]
179
180 GPIOResetInit();
\ 0000008C ........ BL GPIOResetInit
181
182 init_VIC();
\ 00000090 ........ _BLF init_VIC,??init_VIC??rA
183
184 return;
\ 00000094 0080BDE8 POP {PC} ;; return
\ ??TargetResetInit_0:
\ 00000098 ........ DC32 SFB(INTVEC)
\ 0000009C 40C01FE0 DC32 0xffffffffe01fc040
\ 000000A0 C4C01FE0 DC32 0xffffffffe01fc0c4
\ 000000A4 A8C11FE0 DC32 0xffffffffe01fc1a8
\ 000000A8 AAAAAAAA DC32 0xffffffffaaaaaaaa
\ 000000AC ACC11FE0 DC32 0xffffffffe01fc1ac
185 }
\ In segment INTVEC, align 1
186
187 /******************************************************************************
188 ** End Of File
189 ******************************************************************************/
Maximum stack usage in bytes:
Function CSTACK
-------- ------
ConfigurePLL 0
GPIOResetInit 0
TargetResetInit 4
Segment part sizes:
Function/Label Bytes
-------------- -----
GPIOResetInit 404
ConfigurePLL 392
TargetResetInit 176
Others 12
984 bytes in segment CODE
972 bytes of CODE memory (+ 12 bytes shared)
Errors: none
Warnings: none
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