preparejump.s

pocket pc hx4700 bootloader

/*

Copyright (C) 2005 Pawel Kolodziejski

This file is free software; you can redistribute it and/or modify it
under the terms of the GNU General Public License as published by the
Free Software Foundation; either version 2, or (at your option) any
later version.

In addition to the permissions in the GNU General Public License, the
Free Software Foundation gives you unlimited permission to link the
compiled version of this file into combinations with other programs,
and to distribute those combinations without any restriction coming
from the use of this file.  (The General Public License restrictions
do apply in other respects; for example, they cover modification of
the file, and distribution when not linked into a combine
executable.)

This file is distributed in the hope that it will be useful, but
WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
General Public License for more details.

You should have received a copy of the GNU General Public License
along with this program; see the file COPYING.  If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA.  */

#define ALIGN .align 0

#define ENTRY(name) \
	.globl name; \
	ALIGN; \
	name:

#define CPWAIT \
	mrc     p15, 0, r0, c2, c0, 0; \
	mov     r0, r0; \
	sub     pc, pc, #4;

ENTRY(JumpLoader)

	ldr	r6, =0xA3200100
	ldr	r5, =0xA0000100
	ldr	r7, =0xA0308100

copy_loop:
	ldr	r8, [r6]
	str	r8, [r5]
	add	r6, r6, #4
	add	r5, r5, #4
	cmp	r5, r7
	blt	copy_loop

	ldr	r2, =0x221
	ldr	r1, =0x41300000
	str	r2, [r1]
	ldr	r1, =0x41300008
	mov	r1, #3
	mcr	p14, 0, r1, c6, c0
	nop
	nop
	nop
	nop
	CPWAIT

	ldr	r1, =565		@ machine number
	ldr	r2, =0xA0000100		@ saved tag list
	ldr	r11, =0xA0008000
        mov     r0, #0
@ Jump into the kernel:
	mov	pc, r11

ENTRY(TurnOnICache)

	mrc     p15, 0, r3, c1, c0, 0   @ Read 1 Register of CP15
	orr     r3, r3, #0x1000         @ Icache on
	mcr     p15, 0, r3, c1, c0, 0   @ Enable I cache
	CPWAIT

	mov     pc, lr

ENTRY(setCoreClock)

	ldr	r2, =0x161
	ldr	r1, =0x41300000
	str	r2, [r1]
	ldr	r1, =0x41300008
	mov     r2, #2
	str	r2, [r1]
	mov	r1, #3
	mcr	p14, 0, r1, c6, c0
	nop
	nop
	nop
	nop
	CPWAIT
	mov     pc, lr