keyb.vhd

fifo code. i have adde the code for key lib to the data which has been transfered

-- Main control process
---------------------------------------------------------------------------

process(clk_100, enable)
begin
	if enable = '0' then
		mp_state <= mp_waituser;
	elsif rising_edge(clk_100) then
		-- State change
		mp_state <= next_mp_state;
		-- Error counter: locks the keyboard for 10 seconds if a wrong
		-- password is introduced
		if err_ctr_load = '1' then
			err_ctr <= (others => '1');
		elsif err_ctr /= 0 then
			err_ctr <= err_ctr - 1;
		end if;
		-- Led counter: Displays a letter on the 7-segment display for
		-- 1 second
		if led_ctr_load = '1' then
			led_ctr <= (others => '1');
		elsif led_ctr /= 0 then
			led_ctr <= led_ctr - 1;
		end if;
		-- Copy the contents of the "value" register
		if save_user = '1' then
			user <= value(7 downto 0);
		end if;
		if save_pass = '1' then
			pass <= value;
		end if;
	end if;
end process;

process(mp_state, count, value, user, pass, err_ctr, led_ctr, key_isstar)
begin
	-- Set the default values
	next_mp_state <= mp_state;
	flash_read <= '0';
	flash_write <= '0';
	led_ctr_load <= '0';
	err_ctr_load <= '0';
	save_user <= '0';
	save_pass <= '0';
	keyb_reset <= '0';
	enable <= 'Z';
	if mp_state = mp_waituser then
		-- Waiting for the username
		if count = 2 then
			-- Username completed => save it and reset the keyboard
			next_mp_state <= mp_waitpass;
			save_user <= '1';
			keyb_reset <= '1';
		end if;
	elsif mp_state = mp_waitpass then
		-- Waiting for password
		-- Get the password from the Flash memory
		flash_read <= '1';
		if count = 6 then
			-- Password completed => compare it with the one stored in
			-- the Flash memory
			if value = pass_m then
				-- Correct password
				if user /= 0 then
					-- Standard user => open the door
					next_mp_state <= mp_open;
					led_ctr_load <= '1';
				else
					-- Administrator => add/remove/edit password
					next_mp_state <= mp_waituser2;
				end if;
			else
				-- Wrong password
				next_mp_state <= mp_err;
				err_ctr_load <= '1';
			end if;
			-- Reset the keyboard
			keyb_reset <= '1';
		end if;
	elsif mp_state = mp_err then
		-- Wrong password => lock the keyboard for 10 seconds
		if err_ctr = 0 then
			enable <= '0';
		end if;
	elsif mp_state = mp_open then
		-- Door is open => display an "O" on the 7-segment display
		if led_ctr = 0 then
			enable <= '0';
		end if;
	elsif mp_state = mp_waituser2 then
		-- add/remove/edit password, waiting for username
		if count = 2 then
			-- Username completed => save it and reset the keyboard
			next_mp_state <= mp_waitpass2;
			save_user <= '1';
			keyb_reset <= '1';
		end if;
	elsif mp_state = mp_waitpass2 then
		-- Waiting for password
		if count = 6 or key_isstar = '1' then
			-- Password completed => write it to the Flash memory.
			next_mp_state <= mp_changepass;
			save_pass <= '1';
			keyb_reset <= '1';
			led_ctr_load <= '1';
		end if;
	elsif mp_state = mp_changepass then
		-- Writing the password to the Flash memory => display a "F" on
		-- the 7-segment display
		flash_write <= '1';
		-- System reset after 1 second
		if led_ctr = 0 then
			enable <= '0';
		end if;
	else
		-- Invalid state => system reset
		enable <= '0';
	end if;
end process;


---------------------------------------------------------------------------
-- Flash read
-- When the "flash_read" signal goes high, looks for the password in the 
-- Flash memory
---------------------------------------------------------------------------

process(clk_50k, enable)
begin
	if enable = '0' then
		fr_state <= fr_idle;
		pass_m <= (others => '1');
	elsif rising_edge(clk_50k) then
		-- State change
		fr_state <= next_fr_state;
		-- Change Flash address
		flash_abufr <= next_flash_abufr;
		-- Shift the data byte into the pass_m register
		if save_pass_m = '1' then
			pass_m <= pass_m(15 downto 0) & flash_d;
		end if;
	end if;
end process;

process(fr_state, flash_read, flash_abufr, flash_d, user)
begin
	-- Set the default values
	next_fr_state <= fr_state;
	next_flash_abufr <= flash_abufr;
	flash_a <= (others => 'Z');
	flash_cen <= 'Z';
	flash_oen <= 'Z';
	enable <= 'Z';
	save_pass_m <= '0';
	if fr_state = fr_idle then
		-- Do nothing until the main control process raises the
		-- "flash_read" signal
		if flash_read = '1' then
			next_fr_state <= fr_search;
			next_flash_abufr <= "011111111111111100";
		end if;				 
	elsif fr_state = fr_search then
		-- Look for the username
		flash_a <= flash_abufr;
		flash_cen <= '0';
		flash_oen <= '0';
		if flash_d = user then
			-- User found => read the password
			next_fr_state <= fr_readpass_23_16;
		elsif flash_abufr = "010001000100001100" then
			-- User not found => stop the process
			next_fr_state <= fr_end;
		else
			-- Look for the username in the previous location
			next_flash_abufr <= flash_abufr - 4;
		end if;
	elsif fr_state = fr_readpass_23_16 then
		-- Reading the 1st byte of the password
		flash_a <= flash_abufr + 1;
		flash_cen <= '0';
		flash_oen <= '0';
		save_pass_m <= '1';
		next_fr_state <= fr_readpass_15_8;
	elsif fr_state = fr_readpass_15_8 then
		-- Reading the 2nd byte of the password
		flash_a <= flash_abufr + 2;
		flash_cen <= '0';
		flash_oen <= '0';
		save_pass_m <= '1';
		next_fr_state <= fr_readpass_7_0;
	elsif fr_state = fr_readpass_7_0 then
		-- Reading the 3rd byte of the password
		flash_a <= flash_abufr + 3;
		flash_cen <= '0';
		flash_oen <= '0';
		save_pass_m <= '1';
		next_fr_state <= fr_end;
	elsif fr_state = fr_end then
		-- Read cycle completed => wait until the "flash_read" signal
		-- goes down
		if flash_read = '0' then
			next_fr_state <= fr_idle;
		end if;
	else
		-- Invalid state => system reset
		enable <= '0';
	end if;
end process;	
		
			
---------------------------------------------------------------------------
-- Flash write:
-- When the "flash_write" signal goes high, writes the password to the
-- Flash memory
---------------------------------------------------------------------------

process(clk_50k, enable)
begin
	if enable = '0' then
		fw_state <= fw_idle;
	elsif rising_edge(clk_50k) then
		-- State change
		fw_state <= next_fw_state;
		-- Change Flash address
		flash_abufw <= next_flash_abufw;
		-- Change the byte index
		fw_bytectr <= next_fw_bytectr;
	end if;
end process;

process(fw_state, flash_write, flash_abufw, fw_bytectr, flash_d, clk_50k, user, pass)
begin
	-- Set the default values
	next_fw_state <= fw_state;
	next_flash_abufw <= flash_abufw;
	next_fw_bytectr <= fw_bytectr;
	flash_a <= (others => 'Z');
	flash_dbuf <= (others => 'X');
	flash_cen <= 'Z';
	flash_oen <= 'Z';
	flash_wen <= '1';
	enable <= 'Z';
	if fw_state = fw_idle then
		-- Do nothing until the main control process raises the
		-- "flash_write" signal
		if flash_write = '1' then
			next_fw_state <= fw_search;
			next_flash_abufw <= "010001000100001100";
		end if;
		next_fw_bytectr <= "00";
	elsif fw_state = fw_search then
		-- Look for the first free address
		flash_a <= flash_abufw;
		flash_cen <= '0';
		flash_oen <= '0';
		if flash_d = "11111111" then
			next_fw_state <= fw_byte1;
		else
			next_flash_abufw <= flash_abufw + 4;
		end if;
		next_fw_bytectr <= "00";
	elsif fw_state = fw_byte1 then
		-- Writing to Flash, 1st clock cycle
		flash_a <= "000101010101010101";
		flash_dbuf <= "10101010";
		flash_cen <= '0';
		flash_wen <= '0';
		next_fw_state <= fw_byte2;
	elsif fw_state = fw_byte2 then
		-- Writing to Flash, 2nd clock cycle
		flash_a <= "000010101010101010";
		flash_dbuf <= "01010101";
		flash_cen <= '0';
		flash_wen <= '0';
		next_fw_state <= fw_byte3;
	elsif fw_state = fw_byte3 then
		-- Writing to Flash, 3rd clock cycle
		flash_a <= "000101010101010101";
		flash_dbuf <= "10100000";
		flash_cen <= '0';
		flash_wen <= '0';
		next_fw_state <= fw_byte4;
	elsif fw_state = fw_byte4 then
		-- Writing to Flash, 4th clock cycle
		-- Output address and data
		flash_a <= flash_abufw + fw_bytectr;
		case fw_bytectr is
			when "00" => flash_dbuf <= user;
			when "01" => flash_dbuf <= pass(23 downto 16);
			when "10" => flash_dbuf <= pass(15 downto 8);
			when "11" => flash_dbuf <= pass(7 downto 0);
			when others => NULL;
		end case;
		flash_cen <= '0';
		flash_wen <= '0';
		-- Repeat the write cycle until all 4 bytes are written
		next_fw_bytectr <= fw_bytectr + 1;
		if fw_bytectr = 3 then
			next_fw_state <= fw_end;
		else
			next_fw_state <= fw_byte1;
		end if;
	elsif fw_state = fw_end then
		-- Read cycle completed => wait until the "flash_write" signal
		-- goes down
		if flash_write = '0' then
			next_fw_state <= fw_idle;
		end if;
	else
		-- Invalid state => system reset
		enable <= '0';
	end if;
end process;


end keyb_arch;