📄 phy_cdma_coin_sig_recv_traffic_33_rrc_final.mdl
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InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
}
Block {
BlockType Product
Name "Product2"
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Position [410, 172, 440, 203]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
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Block {
BlockType Product
Name "Product3"
Ports [2, 1]
Position [410, 252, 440, 283]
InputSameDT off
OutDataTypeMode "Inherit via internal rule"
SaturateOnIntegerOverflow off
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Block {
BlockType Reference
Name "Unipolar to\nBipolar\nConverter2"
Ports [1, 1]
Position [140, 231, 210, 279]
ShowName off
SourceBlock "commutil2/Unipolar to\nBipolar\nConvert"
"er"
SourceType "Unipolar to Bipolar Converter"
ShowPortLabels "on"
M "2"
polarity "Negative"
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Block {
BlockType Reference
Name "Unipolar to\nBipolar\nConverter3"
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ShowName off
SourceBlock "commutil2/Unipolar to\nBipolar\nConvert"
"er"
SourceType "Unipolar to Bipolar Converter"
ShowPortLabels "on"
M "2"
polarity "Negative"
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Block {
BlockType Outport
Name "Out1"
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IconDisplay "Port number"
BusOutputAsStruct off
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Block {
BlockType Outport
Name "Out2"
Position [605, 213, 635, 227]
Port "2"
IconDisplay "Port number"
BusOutputAsStruct off
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Line {
SrcBlock "Unipolar to\nBipolar\nConverter2"
SrcPort 1
DstBlock "Buffer"
DstPort 1
}
Line {
SrcBlock "Unipolar to\nBipolar\nConverter3"
SrcPort 1
DstBlock "Buffer1"
DstPort 1
}
Line {
SrcBlock "DSP\nConstant"
SrcPort 1
DstBlock "Unipolar to\nBipolar\nConverter2"
DstPort 1
}
Line {
SrcBlock "DSP\nConstant1"
SrcPort 1
DstBlock "Unipolar to\nBipolar\nConverter3"
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Line {
SrcBlock "Buffer"
SrcPort 1
DstBlock "Delay"
DstPort 1
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Line {
SrcBlock "In2"
SrcPort 1
Points [40, 0; 0, 60]
Branch {
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DstPort 1
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Branch {
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DstBlock "Product2"
DstPort 2
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Line {
SrcBlock "Buffer1"
SrcPort 1
DstBlock "Delay1"
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Line {
SrcBlock "Product"
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DstBlock "Add"
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Line {
SrcBlock "Product1"
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DstBlock "Add"
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Line {
SrcBlock "Product2"
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DstBlock "Add1"
DstPort 1
}
Line {
SrcBlock "Product3"
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DstBlock "Add1"
DstPort 2
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Line {
SrcBlock "Add"
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DstBlock "Gain"
DstPort 1
}
Line {
SrcBlock "Add1"
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DstBlock "Gain1"
DstPort 1
}
Line {
SrcBlock "In1"
SrcPort 1
Points [85, 0]
Branch {
DstBlock "Product"
DstPort 1
}
Branch {
Points [0, 225]
DstBlock "Product3"
DstPort 1
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}
Line {
SrcBlock "Gain"
SrcPort 1
DstBlock "Out1"
DstPort 1
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Line {
SrcBlock "Gain1"
SrcPort 1
DstBlock "Out2"
DstPort 1
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Line {
SrcBlock "Delay"
SrcPort 1
Points [0, -75]
Branch {
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DstBlock "Product"
DstPort 2
}
Branch {
DstBlock "Product2"
DstPort 1
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}
Line {
SrcBlock "Delay1"
SrcPort 1
Points [20, 0; 0, -45]
Branch {
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DstBlock "Product1"
DstPort 2
}
Branch {
DstBlock "Product3"
DstPort 2
}
}
}
}
Block {
BlockType Reference
Name "Unipolar to\nBipolar\nConverter1"
Ports [1, 1]
Position [445, 361, 525, 409]
ShowName off
SourceBlock "commutil2/Unipolar to\nBipolar\nConverter"
SourceType "Unipolar to Bipolar Converter"
ShowPortLabels on
M "2"
polarity "Negative"
}
Block {
BlockType Reference
Name "Upsample"
Ports [1, 1]
Position [345, 108, 365, 132]
ShowName off
SourceBlock "dspsigops/Upsample"
SourceType "Upsample"
N "2"
phase "0"
ic "0"
mode "Maintain input frame rate"
}
Block {
BlockType Reference
Name "Upsample1"
Ports [1, 1]
Position [345, 153, 365, 177]
ShowName off
SourceBlock "dspsigops/Upsample"
SourceType "Upsample"
N "2"
phase "1"
ic "0"
mode "Maintain input frame rate"
}
Block {
BlockType Outport
Name "Out1"
Position [750, 148, 780, 162]
ShowName off
IconDisplay "Port number"
BusOutputAsStruct off
}
Line {
SrcBlock "Hadamard\nCode Generator"
SrcPort 1
DstBlock "Delay2"
DstPort 1
}
Line {
SrcBlock "Hadamard\nCode Generator1"
SrcPort 1
DstBlock "Delay3"
DstPort 1
}
Line {
SrcBlock "Subsystem7"
SrcPort 1
DstBlock "Product"
DstPort 2
}
Line {
SrcBlock "Subsystem7"
SrcPort 2
DstBlock "Product1"
DstPort 1
}
Line {
SrcBlock "Add"
SrcPort 1
DstBlock "Gain3"
DstPort 1
}
Line {
SrcBlock "Gain3"
SrcPort 1
DstBlock "Gain2"
DstPort 1
}
Line {
SrcBlock "Gain2"
SrcPort 1
DstBlock "Buffer1"
DstPort 1
}
Line {
SrcBlock "Matrix\nSum1"
SrcPort 1
DstBlock "Upsample1"
DstPort 1
}
Line {
SrcBlock "Matrix\nSum"
SrcPort 1
DstBlock "Upsample"
DstPort 1
}
Line {
SrcBlock "Upsample"
SrcPort 1
DstBlock "Add"
DstPort 1
}
Line {
SrcBlock "Upsample1"
SrcPort 1
DstBlock "Add"
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}
Line {
SrcBlock "Long Code Generator\n1.2288Mcps1"
SrcPort 1
Points [55, 0]
Branch {
Points [0, -30]
DstBlock "Downsample"
DstPort 1
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Branch {
Points [0, 30]
DstBlock "Downsample1"
DstPort 1
}
}
Line {
SrcBlock "Delay"
SrcPort 1
Points [5, 0]
DstBlock "Interlacer"
DstPort 2
}
Line {
SrcBlock "Downsample1"
SrcPort 1
DstBlock "Delay"
DstPort 1
}
Line {
SrcBlock "Downsample"
SrcPort 1
Points [80, 0]
DstBlock "Interlacer"
DstPort 1
}
Line {
SrcBlock "Interlacer"
SrcPort 1
DstBlock "Unipolar to\nBipolar\nConverter1"
DstPort 1
}
Line {
SrcBlock "Buffer1"
SrcPort 1
DstBlock "Product2"
DstPort 1
}
Line {
SrcBlock "Unipolar to\nBipolar\nConverter1"
SrcPort 1
DstBlock "Delay1"
DstPort 1
}
Line {
SrcBlock "Product2"
SrcPort 1
DstBlock "Bipolar to\nUnipolar\nConverter"
DstPort 1
}
Line {
SrcBlock "Delay1"
SrcPort 1
Points [5, 0]
DstBlock "Product2"
DstPort 2
}
Line {
SrcBlock "Bipolar to\nUnipolar\nConverter"
SrcPort 1
DstBlock "Out1"
DstPort 1
}
Line {
SrcBlock "In1"
SrcPort 1
DstBlock "Subsystem"
DstPort 1
}
Line {
SrcBlock "In2"
SrcPort 1
DstBlock "Subsystem"
DstPort 2
}
Line {
SrcBlock "Subsystem"
SrcPort 1
DstBlock "Subsystem7"
DstPort 1
}
Line {
SrcBlock "Subsystem"
SrcPort 2
DstBlock "Subsystem7"
DstPort 2
}
Line {
SrcBlock "Delay2"
SrcPort 1
Points [0, 20]
DstBlock "Product"
DstPort 1
}
Line {
SrcBlock "Delay3"
SrcPort 1
Points [0, -15]
DstBlock "Product1"
DstPort 2
}
Line {
SrcBlock "Product"
SrcPort 1
DstBlock "Delay4"
DstPort 1
}
Line {
SrcBlock "Delay4"
SrcPort 1
DstBlock "Matrix\nSum"
DstPort 1
}
Line {
SrcBlock "Product1"
SrcPort 1
DstBlock "Delay5"
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