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📄 upsd3200.h

📁 本程序是一个RS232转网口的。是一个透明传输的模块
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 /* `=========================================================================`
                    ***************************************
                  ****   *                           *   ****
                                 Title: UPSD3200
                             File name: Upsd3200.h
                             Project name: UPSD3234A
                  ***                                    ****
                    ****************** * ******************
                  ****                                   ****
                              Author: gaowang zhang
                           MPG Prague, Czech Republic
                  ****   *                           *   ****
                    ***************************************

 `========================================================================` */
#ifndef _UPSD_H_
#define _UPSD_H_
typedef struct          // general structure of 8 bit register allowing bit access
 {
  unsigned char bit0 : 1;
  unsigned char bit1 : 1;
  unsigned char bit2 : 1;
  unsigned char bit3 : 1;
  unsigned char bit4 : 1;
  unsigned char bit5 : 1;
  unsigned char bit6 : 1;
  unsigned char bit7 : 1;
 }
   Register;
typedef union                             // allow bit or byte access to registers
 {
  char byte;
  Register bits;
 }
   xdata Mix_Reg;
typedef union                             // allow bit or byte access to registers
 {
  char byte;
  Register bits;
 }
   SFR_Reg;
   /*========================================================================
                             Standard PSD Registers
   ========================================================================*/
typedef xdata struct REG_PSD_struct
 {
  SFR_Reg DATAIN_A;                    // PSD_REG_BASE +0x00
  SFR_Reg DATAIN_B;                          //              +0x01
  SFR_Reg CONTROL_A;                         //              +0x02
  SFR_Reg CONTROL_B;                         //              +0x03
  SFR_Reg DATAOUT_A;                         //              +0x04
  SFR_Reg DATAOUT_B;                         //              +0x05
  SFR_Reg DIRECTION_A;                       //              +0x06
  SFR_Reg DIRECTION_B;                       //              +0x07
  SFR_Reg DRIVE_A;                           //              +0x08
  SFR_Reg DRIVE_B;                           //              +0x09
  unsigned char IMC_A;                       //              +0x0A
  unsigned char IMC_B;                       //              +0x0B
  unsigned char OUTENABLE_A;                 //              +0x0C
  unsigned char OUTENABLE_B;                 //              +0x0D
  unsigned char res2[2];                     //      spacer
  unsigned char DATAIN_C;                    //              +0x10
  unsigned char DATAIN_D;                    //              +0x11
  SFR_Reg DATAOUT_C;                         //              +0x12
  SFR_Reg DATAOUT_D;                         //              +0x13
  unsigned char DIRECTION_C;                 //              +0x14
  unsigned char DIRECTION_D;                 //              +0x15
  unsigned char DRIVE_C;                     //              +0x16
  unsigned char DRIVE_D;                     //              +0x17
  unsigned char IMC_C;                       //              +0x18
  unsigned char res1a;                       //      spacer
  unsigned char OUTENABLE_C;                 //              +0x1A
  unsigned char OUTENABLE_D;                 //              +0x1B
  unsigned char res4[4];                     //      spacer
  unsigned char OMC_AB;                      //              +0x20
  unsigned char OMC_BC;                      //              +0x21
  unsigned char OMCMASK_AB;                  //              +0x22
  unsigned char OMCMASK_BC;                  //              +0x23
  unsigned char res8c[0x8C];                 //      spacer
  unsigned char PMMR0;                       //              +0xB0
  unsigned char res1b;                       //      spacer
  unsigned char PMMR1;                       //              +0xB2
  unsigned char res1c;                       //      spacer
  unsigned char PMMR2;                       //              +0xB4
  unsigned char res0B[0x0B];                 //      spacer
  unsigned char MAINPROTECT;                 //              +0xC0
  unsigned char res1d;                       //      spacer
  unsigned char ALTPROTECT;                  //              +0xC2
  unsigned char res4a[4];                    //      spacer
  unsigned char JTAG;                        //              +0xC7
  unsigned char res18[0x18];                 //      spacer
  unsigned char PAGE;                        //              +0xE0
  unsigned char res1e;                       //      spacer
  unsigned char VM;                  //              +0xE2
  unsigned char res29[0x1d];                 //      spacer
 }PSD_REGS;

   /*========================================================================
                      PSD control register bit definitions
   ========================================================================*/
//PSD PORTA
#define PA0  bit0
#define PA1  bit1
#define PA2  bit2
#define PA3  bit3
#define PA4  bit4
#define PA5  bit5
#define PA6  bit6
#define PA7  bit7
//PSD PORTB
#define PB0  bit0
#define PB1  bit1
#define PB2  bit2
#define PB3  bit3
#define PB4  bit4
#define PB5  bit5
#define PB6  bit6
#define PB7  bit7
//PSD PORTC
#define PC0  bit0
#define PC1  bit1
#define PC2  bit2
#define PC3  bit3
#define PC4  bit4
#define PC5  bit5
#define PC6  bit6
#define PC7  bit7
//PSD PORTD
#define PD0  bit0
#define PD1  bit1
#define PD2  bit2
//PSD JTAG
#define JEN  bit0                            // JTAG enable
//PSD PMMR0
#define APD_ENABLE bit1
#define PLD_TURBO  bit3
#define PLD_ARRAY_CLK bit4
#define PLD_MCELL_CLK bit5
//PSD PMMR2
#define PLD_CNTL0  bit2
#define PLD_CNTL1  bit3
#define PLD_CNTL2  bit4
#define PLD_ALE  bit5
#define PLD_DBE  bit6
//PSD VM
#define SRAM_CODE  bit0
#define EE_CODE  bit1
#define FL_CODE  bit2
#define EE_DATA  bit3
#define FL_DATA  bit4
#define PIO_EN  bit7


   /*========================================================================
                          Standard 8051 MCU Registers
   ========================================================================*/
sfr P0    = 0x80;   // Port 0 - Always used for External Memory Access (no access)
/*  P1  */
sfr P1    = 0x90;                            // Port 1
sbit ADC3  = P1^7;                           // ADC Input 3
sbit ADC2  = P1^6;                           // ADC Input 2
sbit ADC1  = P1^5;                           // ADC Input 1
sbit ADC0  = P1^4;                           // ADC Input 0
sbit TXD2  = P1^3;                           // USART2
sbit RXD2  = P1^2;                           // USART2
sbit T2EX  = P1^1;                           // Timer2 Triger
sbit T2    = P1^0;                           // Timer2 Input
sfr P2    = 0xA0;   // Port 2 - Always used for External Memory Access (no access)
/*  P3  */
sfr P3    = 0xB0;                            // Port 3
sbit I2CSC = P3^7;                           // I2C Serial Clock
sbit I2CSD = P3^6;                           // I2C Serial Data
sbit T1    = P3^5;                           // Timer 1 Input
sbit T0    = P3^4;                           // Timer 0 Input
sbit INT1  = P3^3;                           // Ext Int 1 / Timer 1 Gate
sbit INT0  = P3^2;                           // Ext Int 0 / Timer 0 Gate
sbit TXD   = P3^1;                           // USART0
sbit RXD   = P3^0;                           // USART0

/*  PSW  */
sfr PSW   = 0xD0;                            // Program Status Word
sbit CY    = PSW^7;                          // Carry
sbit AC    = PSW^6;                          // Aux.carry b3 to b4
sbit F0    = PSW^5;                          // user flag
sbit RS1   = PSW^4;                          // Rx bank select b1
sbit RS0   = PSW^3;                          // Rx bank select b0
sbit OV    = PSW^2;                          // Overflow
sbit F1    = PSW^1;                          // user flag
sbit P     = PSW^0;                          // even parity of accumulator
sfr ACC   = 0xE0;                            // Accumulator
sfr B     = 0xF0;                            // Register B
sfr SP    = 0x81;                            // Stack Pointer
sfr DPL   = 0x82;                            // Data Pointer low byte
sfr DPH   = 0x83;                            // Data Pointer high byt
sfr PCON  = 0x87;                            // MCU Power Control Register
/*  TCON  */
sfr TCON  = 0x88;                            // Timer / Counter Control
sbit TF1   = TCON^7;                         // Standard 8051 timer control
sbit TR1   = TCON^6;
sbit TF0   = TCON^5;
sbit TR0   = TCON^4;
sbit IE1   = TCON^3;
sbit IT1   = TCON^2;
sbit IE0   = TCON^1;
sbit IT0   = TCON^0;

sfr TMOD  = 0x89;                            // Timer / Counter Mode
sfr TL0   = 0x8A;                            // Timer 0 low byte
sfr TL1   = 0x8B;                            // Timer 1 low byte
sfr TH0   = 0x8C;                            // Timer 0 high byte
sfr TH1   = 0x8D;                            // Timer 1 high byte
/*  IE  */
sfr IE    = 0xA8;                            // Interrupt Enable (main)
sbit EA    = IE^7;                           // Enable All interrupts
sbit ET2   = IE^5;                           // Timer 2
sbit ES    = IE^4;                           // Usart 0
sbit ET1   = IE^3;                           // Timer 1
sbit EX1   = IE^2;                           // External Int1
sbit ET0   = IE^1;                           // Timer 0
sbit EX0   = IE^0;                           // External Int0
/*  IP  */
sfr IP    = 0xB8;                            // Interrupt Priority (main)
sbit PT2   = IP^5;                           // Timer 2
sbit PS    = IP^4;                           // Usart 0
sbit PT1   = IP^3;                           // Timer 1
sbit PX1   = IP^2;                           // Ext Int1
sbit PT0   = IP^1;                           // Timer 0
sbit PX0   = IP^0;                           // Ext Int 0
/*  SCON  */
sfr SCON  = 0x98;                            // UART0 Serial Control
sbit SM0   = SCON^7;                         // Standard 8051 Uart Control
sbit SM1   = SCON^6;
sbit SM2   = SCON^5;
sbit REN   = SCON^4;
sbit TB8   = SCON^3;
sbit RB8   = SCON^2;
sbit TI    = SCON^1;
sbit RI    = SCON^0;
sfr SBUF  = 0x99;                            // UART0 Serial Buffer
sfr SBUF0 = 0x99;                            // UART0 Serial Buffer

   /*========================================================================
                             Common 8052 Extensions
   ========================================================================*/
/*  T2CON  */
sfr T2CON  = 0xC8;                           // Timer 2 Control
sbit TF2    = T2CON^7;
sbit EXF2   = T2CON^6;
sbit RCLK   = T2CON^5;
sbit TCLK   = T2CON^4;
sbit EXEN2  = T2CON^3;
sbit TR2    = T2CON^2;
sbit C_T2   = T2CON^1;
sbit CP_RL2 = T2CON^0;

sfr T2MOD  = 0xC9;                           // Timer 2 Mode
sfr RCAP2L = 0xCA;                           // Timer 2 Reload low byte
sfr RCAP2H = 0xCB;                           // Timer 2 Reload high byte
sfr TL2    = 0xCC;                           // Timer 2 low byte
sfr TH2    = 0xCD;                           // Timer 2 high byte

   /*========================================================================
                              uPSD 3200 Extensions
   ========================================================================*/
/*    P4   */
sfr P4       = 0xC0;                         // New port 4
sbit PWMCH4   = P4^7;                        // PWM3
sbit PWMCH3   = P4^6;                        // PWM3
sbit PWMCH2   = P4^5;                        // PMW2
sbit PWMCH1   = P4^4;                        // PMW1
sbit PWMCH0   = P4^3;                        // PMW0 (8-bit)
sbit DDCVSYNC = P4^2;                        // DDC Vsync input
sbit DDCSCL   = P4^1;                        // DDC SCL
sbit DDCSDA   = P4^0;                        // DDC SDA
sfr P1SFS    = 0x91;                         // Port 1 I/O select
sfr P3SFS    = 0x93;                         // Port 3 I/O select
sfr P4SFS    = 0x94;                         // Port 4 I/O select
// --- ADC SFRs ---
sfr ASCL   = 0x95;                           // ADC Clock Prescaler 8-bit
sfr ADAT   = 0x96;                           // ADC Data Value

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