buffer422.hif

一个同步422接口控制器的verilog源程序。

-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q11
-1
3
q10
-1
3
q1
-1
3
q0
-1
3
cnt_en
-1
3
clock
-1
3
aclr
-1
3
}
# end
# entity
buffer422
# storage
db|buffer422.(0).cnf
db|buffer422.(0).cnf
# case_insensitive
# source_file
buffer422.bdf
474d4c84eb7651e9385547414cdeec
24
# hierarchies {
|
}
# end
# entity
lpm_fifo0
# storage
db|buffer422.(2).cnf
db|buffer422.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
lpm_fifo0.v
d1ef5bb22743eb1867ab35f43f123f
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
lpm_fifo0:inst1
}
# end
# entity
dcfifo
# storage
db|buffer422.(19).cnf
db|buffer422.(19).cnf
# case_insensitive
# source_file
d:|altera|quartus60|libraries|megafunctions|dcfifo.tdf
f52f61d654507d26e32b8ae857d410
6
# user_parameter {
AUTO_CARRY_CHAINS
ON
AUTO_CARRY
USR
IGNORE_CARRY_BUFFERS
OFF
IGNORE_CARRY
USR
AUTO_CASCADE_CHAINS
ON
AUTO_CASCADE
USR
IGNORE_CASCADE_BUFFERS
OFF
IGNORE_CASCADE
USR
LPM_WIDTH
1
PARAMETER_DEC
USR
LPM_NUMWORDS
131072
PARAMETER_DEC
USR
LPM_WIDTHU
17
PARAMETER_DEC
USR
LPM_SHOWAHEAD
OFF
PARAMETER_UNKNOWN
USR
UNDERFLOW_CHECKING
ON
PARAMETER_UNKNOWN
USR
OVERFLOW_CHECKING
ON
PARAMETER_UNKNOWN
USR
USE_EAB
ON
PARAMETER_UNKNOWN
USR
ADD_RAM_OUTPUT_REGISTER
OFF
PARAMETER_UNKNOWN
USR
DELAY_RDUSEDW
1
PARAMETER_UNKNOWN
DEF
DELAY_WRUSEDW
1
PARAMETER_UNKNOWN
DEF
RDSYNC_DELAYPIPE
3
PARAMETER_UNKNOWN
DEF
WRSYNC_DELAYPIPE
3
PARAMETER_UNKNOWN
DEF
CLOCKS_ARE_SYNCHRONIZED
TRUE
PARAMETER_UNKNOWN
USR
DEVICE_FAMILY
Cyclone
PARAMETER_UNKNOWN
USR
CBXI_PARAMETER
dcfifo_so91
PARAMETER_UNKNOWN
USR
}
# used_port {
wrreq
-1
3
wrclk
-1
3
rdusedw
-1
3
rdreq
-1
3
rdclk
-1
3
q
-1
3
data
-1
3
aclr
-1
3
}
# include_file {
d:|altera|quartus60|libraries|megafunctions|lpm_counter.inc
758886b0947dd67e65ec58adda9b948
d:|altera|quartus60|libraries|megafunctions|lpm_add_sub.inc
7d9a33dd39f13aa690c3d0edd88351
d:|altera|quartus60|libraries|megafunctions|altdpram.inc
4e1931f9814db9f22f22b9eb377c65d6
d:|altera|quartus60|libraries|megafunctions|a_graycounter.inc
6bb463da5ec6451f39fdb64aba52ffc0
d:|altera|quartus60|libraries|megafunctions|a_fefifo.inc
c8498561e0bdc47f87b5548333d65f50
d:|altera|quartus60|libraries|megafunctions|a_gray2bin.inc
2466d892d81838e113e13f4e76e71f2
d:|altera|quartus60|libraries|megafunctions|dffpipe.inc
8dfdb676c11c7bcef0694118a05ea2d
d:|altera|quartus60|libraries|megafunctions|alt_sync_fifo.inc
f4c68b9daca4a0e5389631895df30d0
d:|altera|quartus60|libraries|megafunctions|lpm_compare.inc
aec4ea1b78f4cda1c3effe18f1abbf63
d:|altera|quartus60|libraries|megafunctions|altsyncram_fifo.inc
12f7d8c61da985ee5330de43a169e
d:|altera|quartus60|libraries|megafunctions|aglobal60.inc
b3d07c643dae10ab2b3e646e99ec45fc
}
# hierarchies {
lpm_fifo0:inst1|dcfifo:dcfifo_component
}
# end
# entity
dcfifo_so91
# storage
db|buffer422.(20).cnf
db|buffer422.(20).cnf
# case_insensitive
# source_file
db|dcfifo_so91.tdf
baea734912bc7f8ad595178cbd41f494
6
# used_port {
wrreq
-1
3
wrclk
-1
3
rdusedw9
-1
3
rdusedw8
-1
3
rdusedw7
-1
3
rdusedw6
-1
3
rdusedw5
-1
3
rdusedw4
-1
3
rdusedw3
-1
3
rdusedw2
-1
3
rdusedw16
-1
3
rdusedw15
-1
3
rdusedw14
-1
3
rdusedw13
-1
3
rdusedw12
-1
3
rdusedw11
-1
3
rdusedw10
-1
3
rdusedw1
-1
3
rdusedw0
-1
3
rdreq
-1
3
rdclk
-1
3
q0
-1
3
data0
-1
3
aclr
-1
3
}
# hierarchies {
lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_so91:auto_generated
}
# end
# entity
alt_sync_fifo_fjm
# storage
db|buffer422.(21).cnf
db|buffer422.(21).cnf
# case_insensitive
# source_file
db|alt_sync_fifo_fjm.tdf
85547f853a3515fd7f38d94c5f15b6
6
# used_port {
wrusedw9
-1
3
wrusedw8
-1
3
wrusedw7
-1
3
wrusedw6
-1
3
wrusedw5
-1
3
wrusedw4
-1
3
wrusedw3
-1
3
wrusedw2
-1
3
wrusedw16
-1
3
wrusedw15
-1
3
wrusedw14
-1
3
wrusedw13
-1
3
wrusedw12
-1
3
wrusedw11
-1
3
wrusedw10
-1
3
wrusedw1
-1
3
wrusedw0
-1
3
wrreq
-1
3
wrfull
-1
3
wrempty
-1
3
wrclk
-1
3
rdusedw9
-1
3
rdusedw8
-1
3
rdusedw7
-1
3
rdusedw6
-1
3
rdusedw5
-1
3
rdusedw4
-1
3
rdusedw3
-1
3
rdusedw2
-1
3
rdusedw16
-1
3
rdusedw15
-1
3
rdusedw14
-1
3
rdusedw13
-1
3
rdusedw12
-1
3
rdusedw11
-1
3
rdusedw10
-1
3
rdusedw1
-1
3
rdusedw0
-1
3
rdreq
-1
3
rdfull
-1
3
rdempty
-1
3
rdclk
-1
3
q0
-1
3
data0
-1
3
aclr
-1
3
}
# hierarchies {
lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_so91:auto_generated|alt_sync_fifo_fjm:sync_fifo
}
# end
# entity
dpram_evr
# storage
db|buffer422.(22).cnf
db|buffer422.(22).cnf
# case_insensitive
# source_file
db|dpram_evr.tdf
9c339524d829eced3d54ac1c6736aaf
6
# used_port {
wren
-1
3
wraddress9
-1
3
wraddress8
-1
3
wraddress7
-1
3
wraddress6
-1
3
wraddress5
-1
3
wraddress4
-1
3
wraddress3
-1
3
wraddress2
-1
3
wraddress16
-1
3
wraddress15
-1
3
wraddress14
-1
3
wraddress13
-1
3
wraddress12
-1
3
wraddress11
-1
3
wraddress10
-1
3
wraddress1
-1
3
wraddress0
-1
3
rdaddress9
-1
3
rdaddress8
-1
3
rdaddress7
-1
3
rdaddress6
-1
3
rdaddress5
-1
3
rdaddress4
-1
3
rdaddress3
-1
3
rdaddress2
-1
3
rdaddress16
-1
3
rdaddress15
-1
3
rdaddress14
-1
3
rdaddress13
-1
3
rdaddress12
-1
3
rdaddress11
-1
3
rdaddress10
-1
3
rdaddress1
-1
3
rdaddress0
-1
3
q0
-1
3
outclocken
-1
3
outclock
-1
3
inclock
-1
3
data0
-1
3
}
# hierarchies {
lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_so91:auto_generated|alt_sync_fifo_fjm:sync_fifo|dpram_evr:dpram4
}
# end
# entity
altsyncram_pof1
# storage
db|buffer422.(23).cnf
db|buffer422.(23).cnf
# case_insensitive
# source_file
db|altsyncram_pof1.tdf
7acebb4c3bc778e5678fc1a564b877
6
# user_parameter {
PORT_A_ADDRESS_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_A_BYTE_ENABLE_MASK_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_A_DATA_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_ADDRESS_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_BYTE_ENABLE_MASK_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_DATA_WIDTH
1
PARAMETER_UNKNOWN
DEF
}
# used_port {
wren_a
-1
3
q_b0
-1
3
data_a0
-1
3
clocken1
-1
3
clock1
-1
3
clock0
-1
3
address_b9
-1
3
address_b8
-1
3
address_b7
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b16
-1
3
address_b15
-1
3
address_b14
-1
3
address_b13
-1
3
address_b12
-1
3
address_b11
-1
3
address_b10
-1
3
address_b1
-1
3
address_b0
-1
3
address_a9
-1
3
address_a8
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a16
-1
3
address_a15
-1
3
address_a14
-1
3
address_a13
-1
3
address_a12
-1
3
address_a11
-1
3
address_a10
-1
3
address_a1
-1
3
address_a0
-1
3
}
# memory_file {
none
0
}
# hierarchies {
lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_so91:auto_generated|alt_sync_fifo_fjm:sync_fifo|dpram_evr:dpram4|altsyncram_pof1:altsyncram14
}
# end
# entity
decode_tt6
# storage
db|buffer422.(24).cnf
db|buffer422.(24).cnf
# case_insensitive
# source_file
db|decode_tt6.tdf
d9296742595457edf62fe2ea5b426ae
6
# used_port {
eq9
-1
3
eq8
-1
3
eq7
-1
3
eq6
-1
3
eq5
-1
3
eq4
-1
3
eq31
-1
3
eq30
-1
3
eq3
-1
3
eq29
-1
3
eq28
-1
3
eq27
-1
3
eq26
-1
3
eq25
-1
3
eq24
-1
3
eq23
-1
3
eq22
-1
3
eq21
-1
3
eq20
-1
3
eq2
-1
3
eq19
-1
3
eq18
-1
3
eq17
-1
3
eq16
-1
3
eq15
-1
3
eq14
-1
3
eq13
-1
3
eq12
-1
3
eq11
-1
3
eq10
-1
3
eq1
-1
3
eq0
-1
3
enable
-1
3
data4
-1
3
data3
-1
3
data2
-1
3
data1
-1
3
data0
-1
3
}
# hierarchies {
lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_so91:auto_generated|alt_sync_fifo_fjm:sync_fifo|dpram_evr:dpram4|altsyncram_pof1:altsyncram14|decode_tt6:decode16
lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_so91:auto_generated|alt_sync_fifo_fjm:sync_fifo|dpram_evr:dpram4|altsyncram_pof1:altsyncram14|decode_tt6:rden_decode
}
# end
# entity
mux_6o7
# storage
db|buffer422.(25).cnf
db|buffer422.(25).cnf
# case_insensitive
# source_file
db|mux_6o7.tdf
95c69b365e916f286fcc83768e4b3e3
6
# used_port {
sel4
-1
3
sel3
-1
3
sel2
-1
3
sel1
-1
3
sel0
-1
3
result0
-1
3
data9
-1
3
data8
-1
3
data7
-1
3
data6
-1
3
data5
-1
3
data4
-1
3
data31
-1
3
data30
-1
3
data3
-1
3
data29
-1
3
data28
-1
3
data27
-1
3
data26
-1
3
data25
-1
3
data24
-1
3
data23
-1
3
data22
-1
3
data21
-1
3
data20
-1
3
data2
-1
3
data19
-1
3
data18
-1
3
data17
-1
3
data16
-1
3
data15
-1
3
data14
-1
3
data13
-1
3
data12
-1
3
data11
-1
3
data10
-1
3
data1
-1
3
data0
-1
3
}
# hierarchies {
lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_so91:auto_generated|alt_sync_fifo_fjm:sync_fifo|dpram_evr:dpram4|altsyncram_pof1:altsyncram14|mux_6o7:mux17
}
# end
# entity
add_sub_bg8
# storage
db|buffer422.(26).cnf
db|buffer422.(26).cnf
# case_insensitive
# source_file
db|add_sub_bg8.tdf
95b2b9837813bf94d7614e9aea7545fa
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab16
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa16
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
cout
-1
3
}
# hierarchies {
lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_so91:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_bg8:add_sub2
}
# end
# entity
add_sub_h18
# storage
db|buffer422.(27).cnf
db|buffer422.(27).cnf
# case_insensitive
# source_file
db|add_sub_h18.tdf
bed81612e2c436274ba279d73d83ba9
6
# used_port {
result9
-1
3
result8
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result17
-1
3
result16
-1
3
result15
-1
3
result14
-1
3
result13
-1
3
result12
-1
3
result11
-1
3
result10
-1
3
result1
-1
3
result0
-1
3
datab9
-1
3
datab8
-1
3
datab7
-1
3
datab6
-1
3
datab5
-1
3
datab4
-1
3
datab3
-1
3
datab2
-1
3
datab17
-1
3
datab16
-1
3
datab15
-1
3
datab14
-1
3
datab13
-1
3
datab12
-1
3
datab11
-1
3
datab10
-1
3
datab1
-1
3
datab0
-1
3
dataa9
-1
3
dataa8
-1
3
dataa7
-1
3
dataa6
-1
3
dataa5
-1
3
dataa4
-1
3
dataa3
-1
3
dataa2
-1
3
dataa17
-1
3
dataa16
-1
3
dataa15
-1
3
dataa14
-1
3
dataa13
-1
3
dataa12
-1
3
dataa11
-1
3
dataa10
-1
3
dataa1
-1
3
dataa0
-1
3
}
# hierarchies {
lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_so91:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3
}
# end
# entity
cntr_q08
# storage
db|buffer422.(28).cnf
db|buffer422.(28).cnf
# case_insensitive
# source_file
db|cntr_q08.tdf
2e493358b5f2ed10e0eeb8c02b53c7b0
6
# used_port {
q9
-1
3
q8
-1
3
q7
-1
3
q6
-1
3
q5
-1
3
q4
-1
3
q3
-1
3
q2
-1
3
q17
-1
3
q16
-1
3
q15
-1
3
q14
-1
3
q13
-1
3
q12
-1
3
q11
-1
3
q10
-1
3
q1
-1
3
q0
-1
3
cnt_en
-1
3
clock
-1
3
aclr
-1
3
}
# hierarchies {
lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_so91:auto_generated|alt_sync_fifo_fjm:sync_fifo|cntr_q08:cntr1
}
# end
# entity
buff_control
# storage
db|buffer422.(1).cnf
db|buffer422.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_sensitive
# source_file
buff_control.v
a5934773aab266431253f98f147619a
7
# internal_option {
AUTO_RESOURCE_SHARING
OFF
}
# hierarchies {
buff_control:inst
}
# end
# complete