buffer422.fit.eqn

一个同步422接口控制器的verilog源程序。

--H1L42 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~502COUT1_552 at LC_X23_Y16_N0
--operation mode is arithmetic

H1L42_cout_1 = F1_dffe5a[8] & F1_dffe8a[8] & !H1L62 # !F1_dffe5a[8] & (F1_dffe8a[8] # !H1L62);
H1L42 = CARRY(H1L42_cout_1);


--H1L52 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~505 at LC_X23_Y17_N9
--operation mode is arithmetic

H1L52_carry_eqn = (!H1L04 & H1L82) # (H1L04 & H1L92);
H1L52 = F1_dffe8a[7] $ F1_dffe5a[7] $ !H1L52_carry_eqn;

--H1L62 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~507 at LC_X23_Y17_N9
--operation mode is arithmetic

H1L62 = CARRY(F1_dffe8a[7] & F1_dffe5a[7] & !H1L92 # !F1_dffe8a[7] & (F1_dffe5a[7] # !H1L92));


--H1L72 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~510 at LC_X23_Y17_N8
--operation mode is arithmetic

H1L72_carry_eqn = (!H1L04 & H1L13) # (H1L04 & H1L23);
H1L72 = F1_dffe8a[6] $ F1_dffe5a[6] $ H1L72_carry_eqn;

--H1L82 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~512 at LC_X23_Y17_N8
--operation mode is arithmetic

H1L82_cout_0 = F1_dffe8a[6] & (!H1L13 # !F1_dffe5a[6]) # !F1_dffe8a[6] & !F1_dffe5a[6] & !H1L13;
H1L82 = CARRY(H1L82_cout_0);

--H1L92 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~512COUT1_551 at LC_X23_Y17_N8
--operation mode is arithmetic

H1L92_cout_1 = F1_dffe8a[6] & (!H1L23 # !F1_dffe5a[6]) # !F1_dffe8a[6] & !F1_dffe5a[6] & !H1L23;
H1L92 = CARRY(H1L92_cout_1);


--H1L03 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~515 at LC_X23_Y17_N7
--operation mode is arithmetic

H1L03_carry_eqn = (!H1L04 & H1L43) # (H1L04 & H1L53);
H1L03 = F1_dffe8a[5] $ F1_dffe5a[5] $ !H1L03_carry_eqn;

--H1L13 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~517 at LC_X23_Y17_N7
--operation mode is arithmetic

H1L13_cout_0 = F1_dffe8a[5] & F1_dffe5a[5] & !H1L43 # !F1_dffe8a[5] & (F1_dffe5a[5] # !H1L43);
H1L13 = CARRY(H1L13_cout_0);

--H1L23 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~517COUT1_550 at LC_X23_Y17_N7
--operation mode is arithmetic

H1L23_cout_1 = F1_dffe8a[5] & F1_dffe5a[5] & !H1L53 # !F1_dffe8a[5] & (F1_dffe5a[5] # !H1L53);
H1L23 = CARRY(H1L23_cout_1);


--H1L33 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~520 at LC_X23_Y17_N6
--operation mode is arithmetic

H1L33_carry_eqn = (!H1L04 & H1L73) # (H1L04 & H1L83);
H1L33 = F1_dffe8a[4] $ F1_dffe5a[4] $ H1L33_carry_eqn;

--H1L43 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~522 at LC_X23_Y17_N6
--operation mode is arithmetic

H1L43_cout_0 = F1_dffe8a[4] & (!H1L73 # !F1_dffe5a[4]) # !F1_dffe8a[4] & !F1_dffe5a[4] & !H1L73;
H1L43 = CARRY(H1L43_cout_0);

--H1L53 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~522COUT1_549 at LC_X23_Y17_N6
--operation mode is arithmetic

H1L53_cout_1 = F1_dffe8a[4] & (!H1L83 # !F1_dffe5a[4]) # !F1_dffe8a[4] & !F1_dffe5a[4] & !H1L83;
H1L53 = CARRY(H1L53_cout_1);


--H1L63 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~525 at LC_X23_Y17_N5
--operation mode is arithmetic

H1L63_carry_eqn = H1L04;
H1L63 = F1_dffe8a[3] $ F1_dffe5a[3] $ !H1L63_carry_eqn;

--H1L73 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~527 at LC_X23_Y17_N5
--operation mode is arithmetic

H1L73_cout_0 = F1_dffe8a[3] & F1_dffe5a[3] & !H1L04 # !F1_dffe8a[3] & (F1_dffe5a[3] # !H1L04);
H1L73 = CARRY(H1L73_cout_0);

--H1L83 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~527COUT1_548 at LC_X23_Y17_N5
--operation mode is arithmetic

H1L83_cout_1 = F1_dffe8a[3] & F1_dffe5a[3] & !H1L04 # !F1_dffe8a[3] & (F1_dffe5a[3] # !H1L04);
H1L83 = CARRY(H1L83_cout_1);


--H1L93 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~530 at LC_X23_Y17_N4
--operation mode is arithmetic

H1L93 = F1_dffe5a[2] $ F1_dffe8a[2] $ H1L24;

--H1L04 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~532 at LC_X23_Y17_N4
--operation mode is arithmetic

H1L04 = CARRY(F1_dffe5a[2] & F1_dffe8a[2] & !H1L34 # !F1_dffe5a[2] & (F1_dffe8a[2] # !H1L34));


--H1L14 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~535 at LC_X23_Y17_N3
--operation mode is arithmetic

H1L14 = F1_dffe8a[1] $ F1_dffe5a[1] $ !H1L54;

--H1L24 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~537 at LC_X23_Y17_N3
--operation mode is arithmetic

H1L24_cout_0 = F1_dffe8a[1] & F1_dffe5a[1] & !H1L54 # !F1_dffe8a[1] & (F1_dffe5a[1] # !H1L54);
H1L24 = CARRY(H1L24_cout_0);

--H1L34 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~537COUT1_547 at LC_X23_Y17_N3
--operation mode is arithmetic

H1L34_cout_1 = F1_dffe8a[1] & F1_dffe5a[1] & !H1L64 # !F1_dffe8a[1] & (F1_dffe5a[1] # !H1L64);
H1L34 = CARRY(H1L34_cout_1);


--H1L44 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~540 at LC_X23_Y17_N2
--operation mode is arithmetic

H1L44 = F1_dffe8a[0] $ F1_dffe5a[0];

--H1L54 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~542 at LC_X23_Y17_N2
--operation mode is arithmetic

H1L54_cout_0 = F1_dffe8a[0] # !F1_dffe5a[0];
H1L54 = CARRY(H1L54_cout_0);

--H1L64 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~542COUT1_546 at LC_X23_Y17_N2
--operation mode is arithmetic

H1L64_cout_1 = F1_dffe8a[0] # !F1_dffe5a[0];
H1L64 = CARRY(H1L64_cout_1);


--B1_clcnt[1] is buff_control:inst|clcnt[1] at LC_X8_Y13_N8
--operation mode is normal

B1_clcnt[1]_lut_out = !B1_clcnt[2] & (B1_clcnt[1] $ B1_clcnt[0]);
B1_clcnt[1] = DFFEAS(B1_clcnt[1]_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--B1_clcnt[2] is buff_control:inst|clcnt[2] at LC_X8_Y13_N4
--operation mode is normal

B1_clcnt[2]_lut_out = B1_clcnt[2] & !B1_clcnt[1] & !B1_clcnt[0] # !B1_clcnt[2] & B1_clcnt[1] & B1_clcnt[0];
B1_clcnt[2] = DFFEAS(B1_clcnt[2]_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--B1_clcnt[0] is buff_control:inst|clcnt[0] at LC_X8_Y13_N6
--operation mode is normal

B1_clcnt[0]_lut_out = !B1_clcnt[0] & (!B1_clcnt[1] # !B1_clcnt[2]);
B1_clcnt[0] = DFFEAS(B1_clcnt[0]_lut_out, GLOBAL(clk), GLOBAL(rst), , , , , , );


--B1L601 is buff_control:inst|reduce_nor~0 at LC_X8_Y13_N2
--operation mode is normal

B1L601 = B1_clcnt[2] & !B1_clcnt[1] & B1_clcnt[0];


--B1_active is buff_control:inst|active at LC_X22_Y14_N6