buffer422.fit.eqn

一个同步422接口控制器的verilog源程序。

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--B1_clkdiv is buff_control:inst|clkdiv at LC_X8_Y13_N5
--operation mode is normal

B1_clkdiv_lut_out = !B1_clkdiv;
B1_clkdiv = DFFEAS(B1_clkdiv_lut_out, GLOBAL(clk), GLOBAL(rst), , B1L601, , , , );


--B1_dout is buff_control:inst|dout at LC_X12_Y14_N6
--operation mode is normal

B1_dout_lut_out = B1_infoe_sel & !B1_infoe[31] # !B1_infoe_sel & (B1L43);
B1_dout = DFFEAS(B1_dout_lut_out, GLOBAL(B1_clkdiv), GLOBAL(rst), , , B1L201, , , B1_infos_sel);


--H1L1 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~460 at LC_X23_Y16_N8
--operation mode is normal

H1L1_carry_eqn = (!H1L21 & H1L3) # (H1L21 & H1L4);
H1L1 = F1_dffe8a[16] $ H1L1_carry_eqn $ F1_dffe5a[16];


--H1L2 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~465 at LC_X23_Y16_N7
--operation mode is arithmetic

H1L2_carry_eqn = (!H1L21 & H1L6) # (H1L21 & H1L7);
H1L2 = F1_dffe8a[15] $ F1_dffe5a[15] $ !H1L2_carry_eqn;

--H1L3 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~467 at LC_X23_Y16_N7
--operation mode is arithmetic

H1L3_cout_0 = F1_dffe8a[15] & F1_dffe5a[15] & !H1L6 # !F1_dffe8a[15] & (F1_dffe5a[15] # !H1L6);
H1L3 = CARRY(H1L3_cout_0);

--H1L4 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~467COUT1_558 at LC_X23_Y16_N7
--operation mode is arithmetic

H1L4_cout_1 = F1_dffe8a[15] & F1_dffe5a[15] & !H1L7 # !F1_dffe8a[15] & (F1_dffe5a[15] # !H1L7);
H1L4 = CARRY(H1L4_cout_1);


--H1L5 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~470 at LC_X23_Y16_N6
--operation mode is arithmetic

H1L5_carry_eqn = (!H1L21 & H1L9) # (H1L21 & H1L01);
H1L5 = F1_dffe8a[14] $ F1_dffe5a[14] $ H1L5_carry_eqn;

--H1L6 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~472 at LC_X23_Y16_N6
--operation mode is arithmetic

H1L6_cout_0 = F1_dffe8a[14] & (!H1L9 # !F1_dffe5a[14]) # !F1_dffe8a[14] & !F1_dffe5a[14] & !H1L9;
H1L6 = CARRY(H1L6_cout_0);

--H1L7 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~472COUT1_557 at LC_X23_Y16_N6
--operation mode is arithmetic

H1L7_cout_1 = F1_dffe8a[14] & (!H1L01 # !F1_dffe5a[14]) # !F1_dffe8a[14] & !F1_dffe5a[14] & !H1L01;
H1L7 = CARRY(H1L7_cout_1);


--H1L8 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~475 at LC_X23_Y16_N5
--operation mode is arithmetic

H1L8_carry_eqn = H1L21;
H1L8 = F1_dffe8a[13] $ F1_dffe5a[13] $ !H1L8_carry_eqn;

--H1L9 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~477 at LC_X23_Y16_N5
--operation mode is arithmetic

H1L9_cout_0 = F1_dffe8a[13] & F1_dffe5a[13] & !H1L21 # !F1_dffe8a[13] & (F1_dffe5a[13] # !H1L21);
H1L9 = CARRY(H1L9_cout_0);

--H1L01 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~477COUT1_556 at LC_X23_Y16_N5
--operation mode is arithmetic

H1L01_cout_1 = F1_dffe8a[13] & F1_dffe5a[13] & !H1L21 # !F1_dffe8a[13] & (F1_dffe5a[13] # !H1L21);
H1L01 = CARRY(H1L01_cout_1);


--H1L11 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~480 at LC_X23_Y16_N4
--operation mode is arithmetic

H1L11_carry_eqn = (!H1L62 & H1L41) # (H1L62 & H1L51);
H1L11 = F1_dffe8a[12] $ F1_dffe5a[12] $ H1L11_carry_eqn;

--H1L21 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~482 at LC_X23_Y16_N4
--operation mode is arithmetic

H1L21 = CARRY(F1_dffe8a[12] & (!H1L51 # !F1_dffe5a[12]) # !F1_dffe8a[12] & !F1_dffe5a[12] & !H1L51);


--H1L31 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~485 at LC_X23_Y16_N3
--operation mode is arithmetic

H1L31_carry_eqn = (!H1L62 & H1L71) # (H1L62 & H1L81);
H1L31 = F1_dffe8a[11] $ F1_dffe5a[11] $ !H1L31_carry_eqn;

--H1L41 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~487 at LC_X23_Y16_N3
--operation mode is arithmetic

H1L41_cout_0 = F1_dffe8a[11] & F1_dffe5a[11] & !H1L71 # !F1_dffe8a[11] & (F1_dffe5a[11] # !H1L71);
H1L41 = CARRY(H1L41_cout_0);

--H1L51 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~487COUT1_555 at LC_X23_Y16_N3
--operation mode is arithmetic

H1L51_cout_1 = F1_dffe8a[11] & F1_dffe5a[11] & !H1L81 # !F1_dffe8a[11] & (F1_dffe5a[11] # !H1L81);
H1L51 = CARRY(H1L51_cout_1);


--H1L61 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~490 at LC_X23_Y16_N2
--operation mode is arithmetic

H1L61_carry_eqn = (!H1L62 & H1L02) # (H1L62 & H1L12);
H1L61 = F1_dffe5a[10] $ F1_dffe8a[10] $ H1L61_carry_eqn;

--H1L71 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~492 at LC_X23_Y16_N2
--operation mode is arithmetic

H1L71_cout_0 = F1_dffe5a[10] & F1_dffe8a[10] & !H1L02 # !F1_dffe5a[10] & (F1_dffe8a[10] # !H1L02);
H1L71 = CARRY(H1L71_cout_0);

--H1L81 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~492COUT1_554 at LC_X23_Y16_N2
--operation mode is arithmetic

H1L81_cout_1 = F1_dffe5a[10] & F1_dffe8a[10] & !H1L12 # !F1_dffe5a[10] & (F1_dffe8a[10] # !H1L12);
H1L81 = CARRY(H1L81_cout_1);


--H1L91 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~495 at LC_X23_Y16_N1
--operation mode is arithmetic

H1L91_carry_eqn = (!H1L62 & H1L32) # (H1L62 & H1L42);
H1L91 = F1_dffe5a[9] $ F1_dffe8a[9] $ !H1L91_carry_eqn;

--H1L02 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~497 at LC_X23_Y16_N1
--operation mode is arithmetic

H1L02_cout_0 = F1_dffe5a[9] & (!H1L32 # !F1_dffe8a[9]) # !F1_dffe5a[9] & !F1_dffe8a[9] & !H1L32;
H1L02 = CARRY(H1L02_cout_0);

--H1L12 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~497COUT1_553 at LC_X23_Y16_N1
--operation mode is arithmetic

H1L12_cout_1 = F1_dffe5a[9] & (!H1L42 # !F1_dffe8a[9]) # !F1_dffe5a[9] & !F1_dffe8a[9] & !H1L42;
H1L12 = CARRY(H1L12_cout_1);


--H1L22 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~500 at LC_X23_Y16_N0
--operation mode is arithmetic

H1L22_carry_eqn = H1L62;
H1L22 = F1_dffe5a[8] $ F1_dffe8a[8] $ H1L22_carry_eqn;

--H1L32 is lpm_fifo0:inst1|dcfifo:dcfifo_component|dcfifo_gfu:auto_generated|alt_sync_fifo_fjm:sync_fifo|add_sub_h18:add_sub3|add_sub_cella[0]~502 at LC_X23_Y16_N0
--operation mode is arithmetic

H1L32_cout_0 = F1_dffe5a[8] & F1_dffe8a[8] & !H1L62 # !F1_dffe5a[8] & (F1_dffe8a[8] # !H1L62);
H1L32 = CARRY(H1L32_cout_0);