📄 stm32f10x_tim.txt
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;;;322 if (TIM_ICInitStruct->TIM_ICMode == TIM_ICMode_ICAP)
0002c4 8820 LDRH r0,[r4,#0]
0002c6 2807 CMP r0,#7
0002c8 d131 BNE |L1.814|
;;;323 {
;;;324 if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1)
0002ca 8860 LDRH r0,[r4,#2]
0002cc b950 CBNZ r0,|L1.740|
;;;325 {
;;;326 /* TI1 Configuration */
;;;327 TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
0002ce 7aa3 LDRB r3,[r4,#0xa]
0002d0 88e2 LDRH r2,[r4,#6]
0002d2 88a1 LDRH r1,[r4,#4]
0002d4 4628 MOV r0,r5
0002d6 f7fff7ff BL TI1_Config
;;;328 TIM_ICInitStruct->TIM_ICSelection,
;;;329 TIM_ICInitStruct->TIM_ICFilter);
;;;330
;;;331 /* Set the Input Capture Prescaler value */
;;;332 TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
0002da 8921 LDRH r1,[r4,#8]
0002dc 4628 MOV r0,r5
0002de e8bde8bd POP {r4,r5,lr}
0002e2 e7fe B TIM_SetIC1Prescaler
|L1.740|
;;;333 }
;;;334 else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_2)
0002e4 2801 CMP r0,#1
0002e6 d10a BNE |L1.766|
;;;335 {
;;;336 /* TI2 Configuration */
;;;337 TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
0002e8 7aa3 LDRB r3,[r4,#0xa]
0002ea 88e2 LDRH r2,[r4,#6]
0002ec 88a1 LDRH r1,[r4,#4]
0002ee 4628 MOV r0,r5
0002f0 f7fff7ff BL TI2_Config
;;;338 TIM_ICInitStruct->TIM_ICSelection,
;;;339 TIM_ICInitStruct->TIM_ICFilter);
;;;340
;;;341 /* Set the Input Capture Prescaler value */
;;;342 TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
0002f4 8921 LDRH r1,[r4,#8]
0002f6 4628 MOV r0,r5
0002f8 e8bde8bd POP {r4,r5,lr}
0002fc e7fe B TIM_SetIC2Prescaler
|L1.766|
;;;343 }
;;;344 else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_3)
0002fe 2802 CMP r0,#2
000300 d10a BNE |L1.792|
;;;345 {
;;;346 /* TI3 Configuration */
;;;347 TI3_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
000302 7aa3 LDRB r3,[r4,#0xa]
000304 88e2 LDRH r2,[r4,#6]
000306 88a1 LDRH r1,[r4,#4]
000308 4628 MOV r0,r5
00030a f7fff7ff BL TI3_Config
;;;348 TIM_ICInitStruct->TIM_ICSelection,
;;;349 TIM_ICInitStruct->TIM_ICFilter);
;;;350
;;;351 /* Set the Input Capture Prescaler value */
;;;352 TIM_SetIC3Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
00030e 8921 LDRH r1,[r4,#8]
000310 4628 MOV r0,r5
000312 e8bde8bd POP {r4,r5,lr}
000316 e7fe B TIM_SetIC3Prescaler
|L1.792|
;;;353 }
;;;354 else /* TIM_Channel_4 */
;;;355 {
;;;356 /* TI4 Configuration */
;;;357 TI4_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
000318 7aa3 LDRB r3,[r4,#0xa]
00031a 88e2 LDRH r2,[r4,#6]
00031c 88a1 LDRH r1,[r4,#4]
00031e 4628 MOV r0,r5
000320 f7fff7ff BL TI4_Config
;;;358 TIM_ICInitStruct->TIM_ICSelection,
;;;359 TIM_ICInitStruct->TIM_ICFilter);
;;;360
;;;361 /* Set the Input Capture Prescaler value */
;;;362 TIM_SetIC4Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
000324 8921 LDRH r1,[r4,#8]
000326 4628 MOV r0,r5
000328 e8bde8bd POP {r4,r5,lr}
00032c e7fe B TIM_SetIC4Prescaler
|L1.814|
;;;363 }
;;;364 }
;;;365 else
;;;366 {
;;;367 PWMI_Config(TIMx, TIM_ICInitStruct);
00032e 4621 MOV r1,r4
000330 4628 MOV r0,r5
000332 e8bde8bd POP {r4,r5,lr}
000336 e7fe B PWMI_Config
;;;368 }
;;;369 }
;;;370
ENDP
TIM_TimeBaseStructInit PROC
;;;381 /* Set the default configuration */
;;;382 TIM_TimeBaseInitStruct->TIM_Period = TIM_Period_Reset_Mask;
000338 2100 MOVS r1,#0
00033a 8001 STRH r1,[r0,#0]
;;;383 TIM_TimeBaseInitStruct->TIM_Prescaler = TIM_Prescaler_Reset_Mask;
00033c 8041 STRH r1,[r0,#2]
;;;384 TIM_TimeBaseInitStruct->TIM_ClockDivision = TIM_CKD_DIV1;
00033e 8081 STRH r1,[r0,#4]
;;;385 TIM_TimeBaseInitStruct->TIM_CounterMode = TIM_CounterMode_Up;
000340 80c1 STRH r1,[r0,#6]
;;;386 }
000342 4770 BX lr
;;;387
ENDP
TIM_OCStructInit PROC
;;;398 /* Set the default configuration */
;;;399 TIM_OCInitStruct->TIM_OCMode = TIM_OCMode_Timing;
000344 2100 MOVS r1,#0
000346 8001 STRH r1,[r0,#0]
;;;400 TIM_OCInitStruct->TIM_Channel = TIM_Channel_1;
000348 8041 STRH r1,[r0,#2]
;;;401 TIM_OCInitStruct->TIM_Pulse = TIM_Pulse_Reset_Mask;
00034a 8081 STRH r1,[r0,#4]
;;;402 TIM_OCInitStruct->TIM_OCPolarity = TIM_OCPolarity_High;
00034c 80c1 STRH r1,[r0,#6]
;;;403 }
00034e 4770 BX lr
;;;404
ENDP
TIM_ICStructInit PROC
;;;415 /* Set the default configuration */
;;;416 TIM_ICInitStruct->TIM_ICMode = TIM_ICMode_ICAP;
000350 2107 MOVS r1,#7
000352 8001 STRH r1,[r0,#0]
;;;417 TIM_ICInitStruct->TIM_Channel = TIM_Channel_1;
000354 2100 MOVS r1,#0
000356 8041 STRH r1,[r0,#2]
;;;418 TIM_ICInitStruct->TIM_ICPolarity = TIM_ICPolarity_Rising;
000358 8081 STRH r1,[r0,#4]
;;;419 TIM_ICInitStruct->TIM_ICSelection = TIM_ICSelection_DirectTI;
00035a 2201 MOVS r2,#1
00035c 80c2 STRH r2,[r0,#6]
;;;420 TIM_ICInitStruct->TIM_ICPrescaler = TIM_ICPSC_DIV1;
00035e 8101 STRH r1,[r0,#8]
;;;421 TIM_ICInitStruct->TIM_ICFilter = TIM_ICFilter_Mask;
000360 7281 STRB r1,[r0,#0xa]
;;;422 }
000362 4770 BX lr
;;;423
ENDP
TIM_Cmd PROC
;;;437
;;;438 if (NewState != DISABLE)
000364 b121 CBZ r1,|L1.880|
;;;439 {
;;;440 /* Enable the TIM Counter */
;;;441 TIMx->CR1 |= CR1_CEN_Set;
000366 8801 LDRH r1,[r0,#0]
000368 f041f041 ORR r1,r1,#1
00036c 8001 STRH r1,[r0,#0]
;;;442 }
;;;443 else
;;;444 {
;;;445 /* Disable the TIM Counter */
;;;446 TIMx->CR1 &= CR1_CEN_Reset;
;;;447 }
;;;448 }
00036e 4770 BX lr
|L1.880|
000370 8801 LDRH r1,[r0,#0]
000372 f021f021 BIC r1,r1,#1
000376 f421f421 BIC r1,r1,#0xfc00
00037a 8001 STRH r1,[r0,#0]
00037c 4770 BX lr
;;;449
ENDP
TIM_ITConfig PROC
;;;473
;;;474 if (NewState != DISABLE)
00037e b11a CBZ r2,|L1.904|
;;;475 {
;;;476 /* Enable the Interrupt sources */
;;;477 TIMx->DIER |= TIM_IT;
000380 8982 LDRH r2,[r0,#0xc]
000382 4311 ORRS r1,r1,r2
000384 8181 STRH r1,[r0,#0xc]
;;;478 }
;;;479 else
;;;480 {
;;;481 /* Disable the Interrupt sources */
;;;482 TIMx->DIER &= (u16)(~TIM_IT);
;;;483 }
;;;484 }
000386 4770 BX lr
|L1.904|
000388 8982 LDRH r2,[r0,#0xc]
00038a ea22ea22 BIC r1,r2,r1
00038e 8181 STRH r1,[r0,#0xc]
000390 4770 BX lr
;;;485
ENDP
TIM_DMAConfig PROC
;;;511
;;;512 tmpdcr = TIMx->DCR;
000392 f8b0f8b0 LDRH r3,[r0,#0x48]
;;;513
;;;514 /* Reset the DBA and the DBL Bits */
;;;515 tmpdcr &= DCR_DMA_Mask;
;;;516
;;;517 /* Set the DMA Base and the DMA Burst Length */
;;;518 tmpdcr |= TIM_DMABase | TIM_DMABurstLength;
000396 4311 ORRS r1,r1,r2
;;;519
;;;520 TIMx->DCR = (u16)tmpdcr;
000398 f8a0f8a0 STRH r1,[r0,#0x48]
;;;521 }
00039c 4770 BX lr
;;;522
ENDP
TIM_DMACmd PROC
;;;546
;;;547 tmpdier = TIMx->DIER;
00039e 8983 LDRH r3,[r0,#0xc]
;;;548
;;;549 if (Newstate != DISABLE)
0003a0 b10a CBZ r2,|L1.934|
;;;550 {
;;;551 /* Enable the DMA sources */
;;;552 tmpdier |= TIM_DMASource;
0003a2 4319 ORRS r1,r1,r3
0003a4 e002 B |L1.940|
|L1.934|
;;;553 }
;;;554 else
;;;555 {
;;;556 /* Disable the DMA sources */
;;;557 tmpdier &= (u16)(~TIM_DMASource);
0003a6 43c9 MVNS r1,r1
0003a8 b289 UXTH r1,r1
0003aa 4019 ANDS r1,r1,r3
|L1.940|
;;;558 }
;;;559 TIMx->DIER = (u16)tmpdier;
0003ac 8181 STRH r1,[r0,#0xc]
;;;560 }
0003ae 4770 BX lr
;;;561
ENDP
TIM_InternalClockConfig PROC
;;;571 /* Disable slave mode to clock the prescaler directly with the internal clock */
;;;572 TIMx->SMCR &= SMCR_SMS_Mask;
0003b0 8901 LDRH r1,[r0,#8]
0003b2 f021f021 BIC r1,r1,#0xf
0003b6 8101 STRH r1,[r0,#8]
;;;573 }
0003b8 4770 BX lr
;;;574 /*******************************************************************************
ENDP
TIM_SelectInputTrigger PROC
;;;768
;;;769 tmpsmcr = TIMx->SMCR;
0003ba 8902 LDRH r2,[r0,#8]
;;;770
;;;771 /* Select the Tgigger Source */
;;;772 tmpsmcr &= SMCR_TS_Mask;
0003bc f64ff64f MOV r3,#0xff87
0003c0 401a ANDS r2,r2,r3
;;;773 tmpsmcr |= TIM_InputTriggerSource;
0003c2 4311 ORRS r1,r1,r2
;;;774
;;;775 TIMx->SMCR = (u16)tmpsmcr;
0003c4 8101 STRH r1,[r0,#8]
;;;776 }
0003c6 4770 BX lr
;;;777
ENDP
TIM_ITRxExternalClockConfig PROC
;;;587 void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, u16 TIM_InputTriggerSource)
;;;588 {
0003c8 b510 PUSH {r4,lr}
0003ca 4604 MOV r4,r0
;;;589 /* Check the parameters */
;;;590 assert(IS_TIM_INTERNAL_TRIGGER_SELECTION(TIM_InputTriggerSource));
;;;591
;;;592 /* Select the Internal Trigger */
;;;593 TIM_SelectInputTrigger(TIMx, TIM_InputTriggerSource);
0003cc 4620 MOV r0,r4
0003ce f7fff7ff BL TIM_SelectInputTrigger
;;;594
;;;595 /* Select the External clock mode1 */
;;;596 TIMx->SMCR |= TIM_SlaveMode_External1;
0003d2 8920 LDRH r0,[r4,#8]
0003d4 f040f040 ORR r0,r0,#7
0003d8 8120 STRH r0,[r4,#8]
;;;597 }
0003da bd10 POP {r4,pc}
;;;598 /*******************************************************************************
ENDP
TIM_TIxExternalClockConfig PROC
;;;617 u16 TIM_ICPolarity, u8 ICFilter)
;;;618 {
0003dc b530 PUSH {r4,r5,lr}
0003de 460d MOV r5,r1
0003e0 4604 MOV r4,r0
0003e2 4611 MOV r1,r2
;;;619 /* Check the parameters */
;;;620 assert(IS_TIM_TIX_TRIGGER_SELECTION(TIM_TIxExternalCLKSource));
;;;621 assert(IS_TIM_IC_POLARITY(TIM_ICPolarity));
;;;622 assert(IS_TIM_IC_FILTER(ICFilter));
;;;623
;;;624 /* Configure the Timer Input Clock Source */
;;;625 if (TIM_TIxExternalCLKSource == TIM_TIxExternalCLK1Source_TI2)
0003e4 2d60 CMP r5,#0x60
0003e6 d104 BNE |L1.1010|
;;;626 {
;;;627 TI2_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter);
0003e8 2201 MOVS r2,#1
0003ea 4620 MOV r0,r4
0003ec f7fff7ff BL TI2_Config
0003f0 e003 B |L1.1018|
|L1.1010|
;;;628 }
;;;629 else
;;;630 {
;;;631 TI1_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter);
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