📄 stm32f10x_usart.txt
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;;;559
ENDP
USART_SmartCardCmd PROC
;;;574
;;;575 if (NewState != DISABLE)
000208 b121 CBZ r1,|L1.532|
;;;576 {
;;;577 /* Enable the SC mode by setting the SCEN bit in the CR3 register */
;;;578 USARTx->CR3 |= CR3_SCEN_Set;
00020a 8a81 LDRH r1,[r0,#0x14]
00020c f041f041 ORR r1,r1,#0x20
000210 8281 STRH r1,[r0,#0x14]
;;;579 }
;;;580 else
;;;581 {
;;;582 /* Disable the SC mode by clearing the SCEN bit in the CR3 register */
;;;583 USARTx->CR3 &= CR3_SCEN_Reset;
;;;584 }
;;;585 }
000212 4770 BX lr
|L1.532|
000214 8a81 LDRH r1,[r0,#0x14]
000216 f021f021 BIC r1,r1,#0x20
00021a 8281 STRH r1,[r0,#0x14]
00021c 4770 BX lr
;;;586
ENDP
USART_SmartCardNACKCmd PROC
;;;601
;;;602 if (NewState != DISABLE)
00021e b121 CBZ r1,|L1.554|
;;;603 {
;;;604 /* Enable the NACK transmission by setting the NACK bit in the CR3 register */
;;;605 USARTx->CR3 |= CR3_NACK_Set;
000220 8a81 LDRH r1,[r0,#0x14]
000222 f041f041 ORR r1,r1,#0x10
000226 8281 STRH r1,[r0,#0x14]
;;;606 }
;;;607 else
;;;608 {
;;;609 /* Disable the NACK transmission by clearing the NACK bit in the CR3 register */
;;;610 USARTx->CR3 &= CR3_NACK_Reset;
;;;611 }
;;;612
;;;613 }
000228 4770 BX lr
|L1.554|
00022a 8a81 LDRH r1,[r0,#0x14]
00022c f021f021 BIC r1,r1,#0x10
000230 8281 STRH r1,[r0,#0x14]
000232 4770 BX lr
;;;614
ENDP
USART_HalfDuplexCmd PROC
;;;629
;;;630 if (NewState != DISABLE)
000234 b121 CBZ r1,|L1.576|
;;;631 {
;;;632 /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
;;;633 USARTx->CR3 |= CR3_HDSEL_Set;
000236 8a81 LDRH r1,[r0,#0x14]
000238 f041f041 ORR r1,r1,#8
00023c 8281 STRH r1,[r0,#0x14]
;;;634 }
;;;635 else
;;;636 {
;;;637 /* Disable the Half-Duplex mode by clearing the HDSEL bit in the CR3 register */
;;;638 USARTx->CR3 &= CR3_HDSEL_Reset;
;;;639 }
;;;640 }
00023e 4770 BX lr
|L1.576|
000240 8a81 LDRH r1,[r0,#0x14]
000242 f021f021 BIC r1,r1,#8
000246 8281 STRH r1,[r0,#0x14]
000248 4770 BX lr
;;;641
ENDP
USART_IrDAConfig PROC
;;;658
;;;659 USARTx->CR3 &= CR3_IRLP_Mask;
00024a 8a82 LDRH r2,[r0,#0x14]
00024c f022f022 BIC r2,r2,#4
000250 8282 STRH r2,[r0,#0x14]
;;;660 USARTx->CR3 |= USART_IrDAMode;
000252 8a82 LDRH r2,[r0,#0x14]
000254 4311 ORRS r1,r1,r2
000256 8281 STRH r1,[r0,#0x14]
;;;661 }
000258 4770 BX lr
;;;662
ENDP
USART_IrDACmd PROC
;;;677
;;;678 if (NewState != DISABLE)
00025a b121 CBZ r1,|L1.614|
;;;679 {
;;;680 /* Enable the IrDA mode by setting the IREN bit in the CR3 register */
;;;681 USARTx->CR3 |= CR3_IREN_Set;
00025c 8a81 LDRH r1,[r0,#0x14]
00025e f041f041 ORR r1,r1,#2
000262 8281 STRH r1,[r0,#0x14]
;;;682 }
;;;683 else
;;;684 {
;;;685 /* Disable the IrDA mode by clearing the IREN bit in the CR3 register */
;;;686 USARTx->CR3 &= CR3_IREN_Reset;
;;;687 }
;;;688 }
000264 4770 BX lr
|L1.614|
000266 8a81 LDRH r1,[r0,#0x14]
000268 f021f021 BIC r1,r1,#2
00026c 8281 STRH r1,[r0,#0x14]
00026e 4770 BX lr
;;;689
ENDP
USART_GetFlagStatus PROC
;;;710 FlagStatus USART_GetFlagStatus(USART_TypeDef* USARTx, u16 USART_FLAG)
;;;711 {
000270 4602 MOV r2,r0
;;;712 FlagStatus bitstatus = RESET;
000272 2000 MOVS r0,#0
;;;713
;;;714 /* Check the parameters */
;;;715 assert(IS_USART_FLAG(USART_FLAG));
;;;716
;;;717 if ((USARTx->SR & USART_FLAG) != (u16)RESET)
000274 8812 LDRH r2,[r2,#0]
000276 420a TST r2,r1
000278 d000 BEQ |L1.636|
;;;718 {
;;;719 bitstatus = SET;
00027a 2001 MOVS r0,#1
|L1.636|
;;;720 }
;;;721 else
;;;722 {
;;;723 bitstatus = RESET;
;;;724 }
;;;725 return bitstatus;
;;;726 }
00027c 4770 BX lr
;;;727
ENDP
USART_ClearFlag PROC
;;;752
;;;753 USARTx->SR &= (u16)~USART_FLAG;
00027e 8802 LDRH r2,[r0,#0]
000280 ea22ea22 BIC r1,r2,r1
000284 8001 STRH r1,[r0,#0]
;;;754 }
000286 4770 BX lr
;;;755
ENDP
USART_GetITStatus PROC
;;;776 ITStatus USART_GetITStatus(USART_TypeDef* USARTx, u16 USART_IT)
;;;777 {
000288 b410 PUSH {r4}
;;;778 u32 bitpos = 0x00, itmask = 0x00, usartreg = 0;
;;;779 ITStatus bitstatus = RESET;
00028a f04ff04f MOV r12,#0
;;;780
;;;781 /* Check the parameters */
;;;782 assert(IS_USART_IT(USART_IT));
;;;783
;;;784 /* Get the USART register index */
;;;785 usartreg = (((u8)USART_IT) >> 0x05);
00028e f3c1f3c1 UBFX r3,r1,#5,#3
;;;786
;;;787 /* Get the interrupt position */
;;;788 itmask = USART_IT & USART_IT_Mask;
000292 f001f001 AND r2,r1,#0x1f
;;;789
;;;790 itmask = (u32)0x01 << itmask;
000296 2401 MOVS r4,#1
000298 fa04fa04 LSL r2,r4,r2
;;;791
;;;792 if (usartreg == 0x01) /* The IT is in CR1 register */
00029c 2b01 CMP r3,#1
00029e d102 BNE |L1.678|
;;;793 {
;;;794 itmask &= USARTx->CR1;
0002a0 8983 LDRH r3,[r0,#0xc]
0002a2 401a ANDS r2,r2,r3
0002a4 e006 B |L1.692|
|L1.678|
;;;795 }
;;;796 else if (usartreg == 0x02) /* The IT is in CR2 register */
0002a6 2b02 CMP r3,#2
0002a8 d102 BNE |L1.688|
;;;797 {
;;;798 itmask &= USARTx->CR2;
0002aa 8a03 LDRH r3,[r0,#0x10]
0002ac 401a ANDS r2,r2,r3
0002ae e001 B |L1.692|
|L1.688|
;;;799 }
;;;800 else /* The IT is in CR3 register */
;;;801 {
;;;802 itmask &= USARTx->CR3;
0002b0 8a83 LDRH r3,[r0,#0x14]
0002b2 401a ANDS r2,r2,r3
|L1.692|
;;;803 }
;;;804
;;;805 bitpos = USART_IT >> 0x08;
0002b4 0a09 LSRS r1,r1,#8
;;;806
;;;807 bitpos = (u32)0x01 << bitpos;
0002b6 fa04fa04 LSL r1,r4,r1
;;;808 bitpos &= USARTx->SR;
0002ba 8800 LDRH r0,[r0,#0]
0002bc 4008 ANDS r0,r0,r1
;;;809
;;;810 if ((itmask != (u16)RESET)&&(bitpos != (u16)RESET))
0002be b112 CBZ r2,|L1.710|
0002c0 b108 CBZ r0,|L1.710|
;;;811 {
;;;812 bitstatus = SET;
0002c2 f04ff04f MOV r12,#1
|L1.710|
;;;813 }
;;;814 else
;;;815 {
;;;816 bitstatus = RESET;
;;;817 }
;;;818 return bitstatus;
;;;819 }
0002c6 bc10 POP {r4}
0002c8 4660 MOV r0,r12
0002ca 4770 BX lr
;;;820
ENDP
USART_ClearITPendingBit PROC
;;;847
;;;848 bitpos = USART_IT >> 0x08;
0002cc 0a09 LSRS r1,r1,#8
;;;849
;;;850 itmask = (u32)0x01 << bitpos;
0002ce 2201 MOVS r2,#1
0002d0 fa02fa02 LSL r1,r2,r1
;;;851 USARTx->SR &= ~itmask;
0002d4 8802 LDRH r2,[r0,#0]
0002d6 ea22ea22 BIC r1,r2,r1
0002da 8001 STRH r1,[r0,#0]
;;;852 }
0002dc 4770 BX lr
;;;853
ENDP
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