📄 os_time.txt
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; generated by ARM/Thumb C/C++ Compiler with , RVCT3.1 [Build 914] for uVision
; commandline ArmCC [--debug -c --asm --interleave -o.\rvmdk\os_time.o --depend=.\rvmdk\os_time.d --device=DARMSTM -O1 -Otime -I. -I..\BSP -I..\..\..\..\..\uCOS-II\Ports\arm-cortex-m3\Generic\RealView -I..\..\..\..\..\uCOS-II\Source -I..\..\..\..\..\CPU\ST\STM32\inc -I..\..\..\..\..\uC-CPU -I..\..\..\..\..\uC-CPU\Arm-Cortex-M3\RealView -I..\..\..\..\..\uC-LIB -I..\..\..\..\..\uC-Probe\Target\Plugins\uCOS-II -I..\..\..\..\..\uC-Probe\Target\Communication\Generic\Source -I..\..\..\..\..\uC-Probe\Target\Communication\Generic\RS-232\Ports\ST\STM32 -I..\..\..\..\..\uC-Probe\Target\Communication\Generic\RS-232\Source -ID:\Keil\ARM\INC\ST\STM32F10x ..\..\..\..\..\uCOS-II\Source\os_time.c]
THUMB
AREA ||.text||, CODE, READONLY, ALIGN=2
OSTimeDly PROC
;;;44 void OSTimeDly (INT16U ticks)
;;;45 {
000000 b510 PUSH {r4,lr}
000002 4604 MOV r4,r0
;;;46 INT8U y;
;;;47 #if OS_CRITICAL_METHOD == 3 /* Allocate storage for CPU status register */
;;;48 OS_CPU_SR cpu_sr = 0;
;;;49 #endif
;;;50
;;;51
;;;52
;;;53 if (OSIntNesting > 0) { /* See if trying to call from an ISR */
000004 4866 LDR r0,|L1.416|
000006 7800 LDRB r0,[r0,#0] ; OSIntNesting
000008 2800 CMP r0,#0
00000a d121 BNE |L1.80|
;;;54 return;
;;;55 }
;;;56 if (ticks > 0) { /* 0 means no delay! */
00000c 2c00 CMP r4,#0
00000e d01f BEQ |L1.80|
;;;57 OS_ENTER_CRITICAL();
000010 f7fff7ff BL OS_CPU_SR_Save
;;;58 y = OSTCBCur->OSTCBY; /* Delay current task */
000014 4963 LDR r1,|L1.420|
000016 680a LDR r2,[r1,#0] ; OSTCBCur
000018 f892f892 LDRB r1,[r2,#0x30]
;;;59 OSRdyTbl[y] &= ~OSTCBCur->OSTCBBitX;
00001c 4b62 LDR r3,|L1.424|
00001e f892f892 LDRB lr,[r2,#0x31]
000022 f813f813 LDRB r12,[r3,r1]
000026 ea2cea2c BIC r12,r12,lr
00002a f803f803 STRB r12,[r3,r1]
;;;60 if (OSRdyTbl[y] == 0) {
00002e 5c59 LDRB r1,[r3,r1]
000030 b939 CBNZ r1,|L1.66|
;;;61 OSRdyGrp &= ~OSTCBCur->OSTCBBitY;
000032 495e LDR r1,|L1.428|
000034 f892f892 LDRB r3,[r2,#0x32]
000038 f891f891 LDRB r12,[r1,#0] ; OSRdyGrp
00003c ea2cea2c BIC r3,r12,r3
000040 700b STRB r3,[r1,#0] ; OSRdyGrp
|L1.66|
;;;62 }
;;;63 OSTCBCur->OSTCBDly = ticks; /* Load ticks in TCB */
000042 8554 STRH r4,[r2,#0x2a]
;;;64 OS_EXIT_CRITICAL();
000044 f7fff7ff BL OS_CPU_SR_Restore
;;;65 OS_Sched(); /* Find next task to run! */
000048 e8bde8bd POP {r4,lr}
00004c f7fff7ff B.W OS_Sched
|L1.80|
;;;66 }
;;;67 }
000050 bd10 POP {r4,pc}
;;;68 /*$PAGE*/
ENDP
OSTimeDlyHMSM PROC
;;;96 INT8U OSTimeDlyHMSM (INT8U hours, INT8U minutes, INT8U seconds, INT16U ms)
;;;97 {
000052 b510 PUSH {r4,lr}
;;;98 INT32U ticks;
;;;99 INT16U loops;
;;;100
;;;101
;;;102 if (OSIntNesting > 0) { /* See if trying to call from an ISR */
000054 f8dff8df LDR r12,|L1.416|
000058 f89cf89c LDRB r12,[r12,#0] ; OSIntNesting
00005c f1bcf1bc CMP r12,#0
000060 d001 BEQ |L1.102|
;;;103 return (OS_ERR_TIME_DLY_ISR);
000062 2055 MOVS r0,#0x55
;;;104 }
;;;105 #if OS_ARG_CHK_EN > 0
;;;106 if (hours == 0) {
;;;107 if (minutes == 0) {
;;;108 if (seconds == 0) {
;;;109 if (ms == 0) {
;;;110 return (OS_ERR_TIME_ZERO_DLY);
;;;111 }
;;;112 }
;;;113 }
;;;114 }
;;;115 if (minutes > 59) {
;;;116 return (OS_ERR_TIME_INVALID_MINUTES); /* Validate arguments to be within range */
;;;117 }
;;;118 if (seconds > 59) {
;;;119 return (OS_ERR_TIME_INVALID_SECONDS);
;;;120 }
;;;121 if (ms > 999) {
;;;122 return (OS_ERR_TIME_INVALID_MS);
;;;123 }
;;;124 #endif
;;;125 /* Compute the total number of clock ticks required.. */
;;;126 /* .. (rounded to the nearest tick) */
;;;127 ticks = ((INT32U)hours * 3600L + (INT32U)minutes * 60L + (INT32U)seconds) * OS_TICKS_PER_SEC
;;;128 + OS_TICKS_PER_SEC * ((INT32U)ms + 500L / OS_TICKS_PER_SEC) / 1000L;
;;;129 loops = (INT16U)(ticks >> 16); /* Compute the integral number of 65536 tick delays */
;;;130 ticks = ticks & 0xFFFFL; /* Obtain the fractional number of ticks */
;;;131 OSTimeDly((INT16U)ticks);
;;;132 while (loops > 0) {
;;;133 OSTimeDly((INT16U)32768u);
;;;134 OSTimeDly((INT16U)32768u);
;;;135 loops--;
;;;136 }
;;;137 return (OS_ERR_NONE);
;;;138 }
000064 bd10 POP {r4,pc}
|L1.102|
000066 b920 CBNZ r0,|L1.114|
000068 b919 CBNZ r1,|L1.114|
00006a b912 CBNZ r2,|L1.114|
00006c b90b CBNZ r3,|L1.114|
00006e 2054 MOVS r0,#0x54
000070 bd10 POP {r4,pc}
|L1.114|
000072 293b CMP r1,#0x3b
000074 d901 BLS |L1.122|
000076 2051 MOVS r0,#0x51
000078 bd10 POP {r4,pc}
|L1.122|
00007a 2a3b CMP r2,#0x3b
00007c d901 BLS |L1.130|
00007e 2052 MOVS r0,#0x52
000080 bd10 POP {r4,pc}
|L1.130|
000082 f5b3f5b3 CMP r3,#0x3e8
000086 d301 BCC |L1.140|
000088 2053 MOVS r0,#0x53
00008a bd10 POP {r4,pc}
|L1.140|
00008c 1d5b ADDS r3,r3,#5
00008e f04ff04f MOV r12,#0x64
000092 fb03fb03 MUL r3,r3,r12
000096 f44ff44f MOV r12,#0x3e8
00009a fbb3fbb3 UDIV r3,r3,r12
00009e f44ff44f MOV r12,#0xe10
0000a2 fb00fb00 MUL r0,r0,r12
0000a6 ebc1ebc1 RSB r1,r1,r1,LSL #4
0000aa eb00eb00 ADD r0,r0,r1,LSL #2
0000ae 4410 ADD r0,r0,r2
0000b0 2119 MOVS r1,#0x19
0000b2 4348 MULS r0,r1,r0
0000b4 eb03eb03 ADD r0,r3,r0,LSL #2
0000b8 0c04 LSRS r4,r0,#16
0000ba b280 UXTH r0,r0
0000bc f7fff7ff BL OSTimeDly
0000c0 b15c CBZ r4,|L1.218|
|L1.194|
0000c2 f44ff44f MOV r0,#0x8000
0000c6 f7fff7ff BL OSTimeDly
0000ca f44ff44f MOV r0,#0x8000
0000ce f7fff7ff BL OSTimeDly
0000d2 1e60 SUBS r0,r4,#1
0000d4 b284 UXTH r4,r0
0000d6 2c00 CMP r4,#0
0000d8 d1f3 BNE |L1.194|
|L1.218|
0000da 2000 MOVS r0,#0
0000dc bd10 POP {r4,pc}
;;;139 #endif
ENDP
OSTimeDlyResume PROC
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