📄 stm32f10x_can.txt
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; generated by ARM/Thumb C/C++ Compiler with , RVCT3.1 [Build 914] for uVision
; commandline ArmCC [--debug -c --asm --interleave -o.\rvmdk\stm32f10x_can.o --depend=.\rvmdk\stm32f10x_can.d --device=DARMSTM -O1 -Otime -I. -I..\BSP -I..\..\..\..\..\uCOS-II\Ports\arm-cortex-m3\Generic\RealView -I..\..\..\..\..\uCOS-II\Source -I..\..\..\..\..\CPU\ST\STM32\inc -I..\..\..\..\..\uC-CPU -I..\..\..\..\..\uC-CPU\Arm-Cortex-M3\RealView -I..\..\..\..\..\uC-LIB -I..\..\..\..\..\uC-Probe\Target\Plugins\uCOS-II -I..\..\..\..\..\uC-Probe\Target\Communication\Generic\Source -I..\..\..\..\..\uC-Probe\Target\Communication\Generic\RS-232\Ports\ST\STM32 -I..\..\..\..\..\uC-Probe\Target\Communication\Generic\RS-232\Source -ID:\Keil\ARM\INC\ST\STM32F10x ..\..\..\..\..\CPU\ST\STM32\src\stm32f10x_can.c]
THUMB
AREA ||.text||, CODE, READONLY, ALIGN=2
CAN_DeInit PROC
;;;93 void CAN_DeInit(void)
;;;94 {
000000 b510 PUSH {r4,lr}
;;;95 /* Enable CAN reset state */
;;;96 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN, ENABLE);
000002 2101 MOVS r1,#1
000004 0648 LSLS r0,r1,#25
000006 f7fff7ff BL RCC_APB1PeriphResetCmd
;;;97 /* Release CAN from reset state */
;;;98 RCC_APB1PeriphResetCmd(RCC_APB1Periph_CAN, DISABLE);
00000a e8bde8bd POP {r4,lr}
00000e 2100 MOVS r1,#0
000010 f04ff04f MOV r0,#0x2000000
000014 f7fff7ff B.W RCC_APB1PeriphResetCmd
;;;99 }
;;;100
ENDP
CAN_Init PROC
;;;112 {
;;;113 u8 InitStatus = 0;
000018 2200 MOVS r2,#0
;;;114
;;;115 /* Check the parameters */
;;;116 assert(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TTCM));
;;;117 assert(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_ABOM));
;;;118 assert(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_AWUM));
;;;119 assert(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_NART));
;;;120 assert(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_RFLM));
;;;121 assert(IS_FUNCTIONAL_STATE(CAN_InitStruct->CAN_TXFP));
;;;122 assert(IS_CAN_MODE(CAN_InitStruct->CAN_Mode));
;;;123 assert(IS_CAN_SJW(CAN_InitStruct->CAN_SJW));
;;;124 assert(IS_CAN_BS1(CAN_InitStruct->CAN_BS1));
;;;125 assert(IS_CAN_BS2(CAN_InitStruct->CAN_BS2));
;;;126 assert(IS_CAN_PRESCALER(CAN_InitStruct->CAN_Prescaler));
;;;127
;;;128 /* Request initialisation */
;;;129 CAN->MCR = CAN_MCR_INRQ;
00001a 49fb LDR r1,|L1.1032|
00001c 2301 MOVS r3,#1
00001e f8c1f8c1 STR r3,[r1,#0x400]
;;;130
;;;131 /* ...and check acknowledged */
;;;132 if ((CAN->MSR & CAN_MSR_INAK) == 0)
000022 f8d1f8d1 LDR r3,[r1,#0x404]
000026 f013f013 TST r3,#1
00002a d07c BEQ |L1.294|
;;;133 {
;;;134 InitStatus = CANINITFAILED;
;;;135 }
;;;136 else
;;;137 {
;;;138 /* Set the time triggered communication mode */
;;;139 if (CAN_InitStruct->CAN_TTCM == ENABLE)
00002c 7802 LDRB r2,[r0,#0]
00002e 2a01 CMP r2,#1
000030 d106 BNE |L1.64|
;;;140 {
;;;141 CAN->MCR |= CAN_MCR_TTCM;
000032 f8d1f8d1 LDR r2,[r1,#0x400]
000036 f042f042 ORR r2,r2,#0x80
00003a f8c1f8c1 STR r2,[r1,#0x400]
00003e e005 B |L1.76|
|L1.64|
;;;142 }
;;;143 else
;;;144 {
;;;145 CAN->MCR &= ~CAN_MCR_TTCM;
000040 f8d1f8d1 LDR r2,[r1,#0x400]
000044 f022f022 BIC r2,r2,#0x80
000048 f8c1f8c1 STR r2,[r1,#0x400]
|L1.76|
;;;146 }
;;;147
;;;148 /* Set the automatic bus-off management */
;;;149 if (CAN_InitStruct->CAN_ABOM == ENABLE)
00004c 7842 LDRB r2,[r0,#1]
00004e 2a01 CMP r2,#1
000050 d106 BNE |L1.96|
;;;150 {
;;;151 CAN->MCR |= CAN_MCR_ABOM;
000052 f8d1f8d1 LDR r2,[r1,#0x400]
000056 f042f042 ORR r2,r2,#0x40
00005a f8c1f8c1 STR r2,[r1,#0x400]
00005e e005 B |L1.108|
|L1.96|
;;;152 }
;;;153 else
;;;154 {
;;;155 CAN->MCR &= ~CAN_MCR_ABOM;
000060 f8d1f8d1 LDR r2,[r1,#0x400]
000064 f022f022 BIC r2,r2,#0x40
000068 f8c1f8c1 STR r2,[r1,#0x400]
|L1.108|
;;;156 }
;;;157
;;;158 /* Set the automatic wake-up mode */
;;;159 if (CAN_InitStruct->CAN_AWUM == ENABLE)
00006c 7882 LDRB r2,[r0,#2]
00006e 2a01 CMP r2,#1
000070 d106 BNE |L1.128|
;;;160 {
;;;161 CAN->MCR |= CAN_MCR_AWUM;
000072 f8d1f8d1 LDR r2,[r1,#0x400]
000076 f042f042 ORR r2,r2,#0x20
00007a f8c1f8c1 STR r2,[r1,#0x400]
00007e e005 B |L1.140|
|L1.128|
;;;162 }
;;;163 else
;;;164 {
;;;165 CAN->MCR &= ~CAN_MCR_AWUM;
000080 f8d1f8d1 LDR r2,[r1,#0x400]
000084 f022f022 BIC r2,r2,#0x20
000088 f8c1f8c1 STR r2,[r1,#0x400]
|L1.140|
;;;166 }
;;;167
;;;168 /* Set the no automatic retransmission */
;;;169 if (CAN_InitStruct->CAN_NART == ENABLE)
00008c 78c2 LDRB r2,[r0,#3]
00008e 2a01 CMP r2,#1
000090 d106 BNE |L1.160|
;;;170 {
;;;171 CAN->MCR |= CAN_MCR_NART;
000092 f8d1f8d1 LDR r2,[r1,#0x400]
000096 f042f042 ORR r2,r2,#0x10
00009a f8c1f8c1 STR r2,[r1,#0x400]
00009e e005 B |L1.172|
|L1.160|
;;;172 }
;;;173 else
;;;174 {
;;;175 CAN->MCR &= ~CAN_MCR_NART;
0000a0 f8d1f8d1 LDR r2,[r1,#0x400]
0000a4 f022f022 BIC r2,r2,#0x10
0000a8 f8c1f8c1 STR r2,[r1,#0x400]
|L1.172|
;;;176 }
;;;177
;;;178 /* Set the receive FIFO locked mode */
;;;179 if (CAN_InitStruct->CAN_RFLM == ENABLE)
0000ac 7902 LDRB r2,[r0,#4]
0000ae 2a01 CMP r2,#1
0000b0 d106 BNE |L1.192|
;;;180 {
;;;181 CAN->MCR |= CAN_MCR_RFLM;
0000b2 f8d1f8d1 LDR r2,[r1,#0x400]
0000b6 f042f042 ORR r2,r2,#8
0000ba f8c1f8c1 STR r2,[r1,#0x400]
0000be e005 B |L1.204|
|L1.192|
;;;182 }
;;;183 else
;;;184 {
;;;185 CAN->MCR &= ~CAN_MCR_RFLM;
0000c0 f8d1f8d1 LDR r2,[r1,#0x400]
0000c4 f022f022 BIC r2,r2,#8
0000c8 f8c1f8c1 STR r2,[r1,#0x400]
|L1.204|
;;;186 }
;;;187
;;;188 /* Set the transmit FIFO priority */
;;;189 if (CAN_InitStruct->CAN_TXFP == ENABLE)
0000cc 7942 LDRB r2,[r0,#5]
0000ce 2a01 CMP r2,#1
0000d0 d106 BNE |L1.224|
;;;190 {
;;;191 CAN->MCR |= CAN_MCR_TXFP;
0000d2 f8d1f8d1 LDR r2,[r1,#0x400]
0000d6 f042f042 ORR r2,r2,#4
0000da f8c1f8c1 STR r2,[r1,#0x400]
0000de e005 B |L1.236|
|L1.224|
;;;192 }
;;;193 else
;;;194 {
;;;195 CAN->MCR &= ~CAN_MCR_TXFP;
0000e0 f8d1f8d1 LDR r2,[r1,#0x400]
0000e4 f022f022 BIC r2,r2,#4
0000e8 f8c1f8c1 STR r2,[r1,#0x400]
|L1.236|
;;;196 }
;;;197
;;;198 /* Set the bit timing register */
;;;199 CAN->BTR = (u32)((u32)CAN_InitStruct->CAN_Mode << 30) | ((u32)CAN_InitStruct->CAN_SJW << 24) |
0000ec 7982 LDRB r2,[r0,#6]
0000ee 79c3 LDRB r3,[r0,#7]
0000f0 0792 LSLS r2,r2,#30
0000f2 ea42ea42 ORR r2,r2,r3,LSL #24
0000f6 7a03 LDRB r3,[r0,#8]
0000f8 ea42ea42 ORR r2,r2,r3,LSL #16
0000fc 7a43 LDRB r3,[r0,#9]
0000fe 8940 LDRH r0,[r0,#0xa]
000100 ea42ea42 ORR r2,r2,r3,LSL #20
000104 1e40 SUBS r0,r0,#1
000106 4310 ORRS r0,r0,r2
000108 f8c1f8c1 STR r0,[r1,#0x41c]
;;;200 ((u32)CAN_InitStruct->CAN_BS1 << 16) | ((u32)CAN_InitStruct->CAN_BS2 << 20) |
;;;201 ((u32)CAN_InitStruct->CAN_Prescaler - 1);
;;;202
;;;203 InitStatus = CANINITOK;
00010c 2201 MOVS r2,#1
;;;204
;;;205 /* Request leave initialisation */
;;;206 CAN->MCR &= ~CAN_MCR_INRQ;
00010e f8d1f8d1 LDR r0,[r1,#0x400]
000112 f020f020 BIC r0,r0,#1
000116 f8c1f8c1 STR r0,[r1,#0x400]
;;;207
;;;208 /* ...and check acknowledged */
;;;209 if ((CAN->MSR & CAN_MSR_INAK) != CAN_MSR_INAK)
00011a f8d1f8d1 LDR r0,[r1,#0x404]
00011e f010f010 TST r0,#1
000122 d100 BNE |L1.294|
;;;210 {
;;;211 InitStatus = CANINITFAILED;
000124 2200 MOVS r2,#0
|L1.294|
;;;212 }
;;;213 }
;;;214
;;;215 /* At this step, return the status of initialization */
;;;216 return InitStatus;
000126 4610 MOV r0,r2
;;;217 }
000128 4770 BX lr
;;;218
ENDP
CAN_FilterInit PROC
;;;238
;;;239 FilterNumber_BitPos =
00012a 7801 LDRB r1,[r0,#0]
00012c 2201 MOVS r2,#1
00012e fa02fa02 LSL r1,r2,r1
000132 b289 UXTH r1,r1
;;;240 (u16)((u16)0x0001 << ((u16)CAN_FilterInitStruct->CAN_FilterNumber));
;;;241
;;;242 /* Initialisation mode for the filter */
;;;243 CAN->FMR |= CAN_FMR_FINIT;
000134 4ab4 LDR r2,|L1.1032|
000136 f8d2f8d2 LDR r3,[r2,#0x600]
00013a f043f043 ORR r3,r3,#1
00013e f8c2f8c2 STR r3,[r2,#0x600]
;;;244
;;;245 /* Filter Deactivation */
;;;246 CAN->FA0R &= ~(u32)FilterNumber_BitPos;
000142 f8d2f8d2 LDR r3,[r2,#0x61c]
000146 438b BICS r3,r3,r1
000148 f8c2f8c2 STR r3,[r2,#0x61c]
;;;247
;;;248 /* Filter Scale */
;;;249 if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_16bit)
00014c 7883 LDRB r3,[r0,#2]
00014e b9d3 CBNZ r3,|L1.390|
;;;250 {
;;;251 /* 16-bit scale for the filter */
;;;252 CAN->FS0R &= ~(u32)FilterNumber_BitPos;
000150 f8d2f8d2 LDR r3,[r2,#0x60c]
000154 438b BICS r3,r3,r1
000156 f8c2f8c2 STR r3,[r2,#0x60c]
;;;253
;;;254 /* First 16-bit identifier and First 16-bit mask */
;;;255 /* Or First 16-bit identifier and Second 16-bit identifier */
;;;256 CAN->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR0 =
00015a 88c3 LDRH r3,[r0,#6]
00015c f8b0f8b0 LDRH r12,[r0,#0xa]
000160 ea43ea43 ORR r3,r3,r12,LSL #16
000164 f890f890 LDRB r12,[r0,#0]
000168 eb02eb02 ADD r12,r2,r12,LSL #3
00016c f8ccf8cc STR r3,[r12,#0x640]
;;;257 ((u32)((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterMaskIdLow) << 16) |
;;;258 ((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterIdLow);
;;;259
;;;260 /* Second 16-bit identifier and Second 16-bit mask */
;;;261 /* Or Third 16-bit identifier and Fourth 16-bit identifier */
;;;262 CAN->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 =
000170 8883 LDRH r3,[r0,#4]
000172 f8b0f8b0 LDRH r12,[r0,#8]
000176 ea43ea43 ORR r3,r3,r12,LSL #16
00017a f890f890 LDRB r12,[r0,#0]
00017e eb02eb02 ADD r12,r2,r12,LSL #3
000182 f8ccf8cc STR r3,[r12,#0x644]
|L1.390|
;;;263 ((u32)((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
;;;264 ((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterIdHigh);
;;;265 }
;;;266 if (CAN_FilterInitStruct->CAN_FilterScale == CAN_FilterScale_32bit)
000186 7883 LDRB r3,[r0,#2]
000188 2b01 CMP r3,#1
00018a d11a BNE |L1.450|
;;;267 {
;;;268 /* 32-bit scale for the filter */
;;;269 CAN->FS0R |= FilterNumber_BitPos;
00018c f8d2f8d2 LDR r3,[r2,#0x60c]
000190 430b ORRS r3,r3,r1
000192 f8c2f8c2 STR r3,[r2,#0x60c]
;;;270
;;;271 /* 32-bit identifier or First 32-bit identifier */
;;;272 CAN->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR0 =
000196 88c3 LDRH r3,[r0,#6]
000198 f8b0f8b0 LDRH r12,[r0,#4]
00019c ea43ea43 ORR r3,r3,r12,LSL #16
0001a0 f890f890 LDRB r12,[r0,#0]
0001a4 eb02eb02 ADD r12,r2,r12,LSL #3
0001a8 f8ccf8cc STR r3,[r12,#0x640]
;;;273 ((u32)((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterIdHigh) << 16) |
;;;274 ((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterIdLow);
;;;275
;;;276 /* 32-bit mask or Second 32-bit identifier */
;;;277 CAN->sFilterRegister[CAN_FilterInitStruct->CAN_FilterNumber].FR1 =
0001ac 8943 LDRH r3,[r0,#0xa]
0001ae f8b0f8b0 LDRH r12,[r0,#8]
0001b2 ea43ea43 ORR r3,r3,r12,LSL #16
0001b6 f890f890 LDRB r12,[r0,#0]
0001ba eb02eb02 ADD r12,r2,r12,LSL #3
0001be f8ccf8cc STR r3,[r12,#0x644]
|L1.450|
;;;278 ((u32)((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterMaskIdHigh) << 16) |
;;;279 ((u32)0x0000FFFF & CAN_FilterInitStruct->CAN_FilterMaskIdLow);
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