stm32f10x_iwdg.txt

ucos2.86版本结合STM板极支持包

; generated by ARM/Thumb C/C++ Compiler with , RVCT3.1 [Build 914] for uVision
; commandline ArmCC [--debug -c --asm --interleave -o.\rvmdk\stm32f10x_iwdg.o --depend=.\rvmdk\stm32f10x_iwdg.d --device=DARMSTM -O1 -Otime -I. -I..\BSP -I..\..\..\..\..\uCOS-II\Ports\arm-cortex-m3\Generic\RealView -I..\..\..\..\..\uCOS-II\Source -I..\..\..\..\..\CPU\ST\STM32\inc -I..\..\..\..\..\uC-CPU -I..\..\..\..\..\uC-CPU\Arm-Cortex-M3\RealView -I..\..\..\..\..\uC-LIB -I..\..\..\..\..\uC-Probe\Target\Plugins\uCOS-II -I..\..\..\..\..\uC-Probe\Target\Communication\Generic\Source -I..\..\..\..\..\uC-Probe\Target\Communication\Generic\RS-232\Ports\ST\STM32 -I..\..\..\..\..\uC-Probe\Target\Communication\Generic\RS-232\Source -ID:\Keil\ARM\INC\ST\STM32F10x ..\..\..\..\..\CPU\ST\STM32\src\stm32f10x_iwdg.c]
                          THUMB

                          AREA ||.text||, CODE, READONLY, ALIGN=2

                  IWDG_WriteAccessCmd PROC
;;;54     
;;;55       IWDG->KR = IWDG_WriteAccess;
000000  490d              LDR      r1,|L1.56|
000002  6008              STR      r0,[r1,#0]
;;;56     }
000004  4770              BX       lr
;;;57     
                          ENDP

                  IWDG_SetPrescaler PROC
;;;77     
;;;78       IWDG->PR = IWDG_Prescaler;
000006  490c              LDR      r1,|L1.56|
000008  6048              STR      r0,[r1,#4]
;;;79     }
00000a  4770              BX       lr
;;;80     
                          ENDP

                  IWDG_SetReload PROC
;;;93     
;;;94       IWDG->RLR = Reload;
00000c  490a              LDR      r1,|L1.56|
00000e  6088              STR      r0,[r1,#8]
;;;95     }
000010  4770              BX       lr
;;;96     
                          ENDP

                  IWDG_ReloadCounter PROC
;;;106    {
;;;107      IWDG->KR = KR_Reload;
000012  4909              LDR      r1,|L1.56|
000014  f64af64a          MOV      r0,#0xaaaa
000018  6008              STR      r0,[r1,#0]
;;;108    }
00001a  4770              BX       lr
;;;109    
                          ENDP

                  IWDG_Enable PROC
;;;119    {
;;;120      IWDG->KR = KR_Enable;
00001c  4906              LDR      r1,|L1.56|
00001e  f64cf64c          MOV      r0,#0xcccc
000022  6008              STR      r0,[r1,#0]
;;;121    }
000024  4770              BX       lr
;;;122    
                          ENDP

                  IWDG_GetFlagStatus PROC
;;;133    FlagStatus IWDG_GetFlagStatus(u16 IWDG_FLAG)
;;;134    {
000026  4601              MOV      r1,r0
;;;135      FlagStatus bitstatus = RESET;
000028  2000              MOVS     r0,#0
;;;136    
;;;137      /* Check the parameters */
;;;138      assert(IS_IWDG_FLAG(IWDG_FLAG));
;;;139    
;;;140      if ((IWDG->SR & IWDG_FLAG) != (u32)RESET)
00002a  4a03              LDR      r2,|L1.56|
00002c  68d2              LDR      r2,[r2,#0xc]
00002e  420a              TST      r2,r1
000030  d000              BEQ      |L1.52|
;;;141      {
;;;142        bitstatus = SET;
000032  2001              MOVS     r0,#1
                  |L1.52|
;;;143      }
;;;144      else
;;;145      {
;;;146        bitstatus = RESET;
;;;147      }
;;;148    
;;;149      /* Return the flag status */
;;;150      return bitstatus;
;;;151    }
000034  4770              BX       lr
;;;152    
                          ENDP

000036  0000              DCW      0x0000
                  |L1.56|
000038  40003000          DCD      0x40003000