📄 se65816.inc

📁 linux下的任天堂模拟器代码。供大家参考。
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;Copyright (C) 1997-2007 ZSNES Team ( zsKnight, _Demo_, pagefault, Nach );;http://www.zsnes.com;http://sourceforge.net/projects/zsnes;https://zsnes.bountysource.com;;This program is free software; you can redistribute it and/or;modify it under the terms of the GNU General Public License;version 2 as published by the Free Software Foundation.;;This program is distributed in the hope that it will be useful,;but WITHOUT ANY WARRANTY; without even the implied warranty of;MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the;GNU General Public License for more details.;;You should have received a copy of the GNU General Public License;along with this program; if not, write to the Free Software;Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.EXTSYM brkv,brkv8,copv,copv8,curexecstate,curnmi,initaddrlEXTSYM membank0r16,membank0r8,membank0w16,membank0w8EXTSYM memtabler16,memtabler8,memtablew16,memtablew8EXTSYM regaccessbankr8,snesmap2,snesmmap,stackand,stackorEXTSYM wramdata,SA1xa,SA1xd,SA1xdb,xe,xirqb,SA1xpb,xpc,SA1xs,SA1xx,SA1xyEXTSYM SA1RegP%ifndef NO_DEBUGGEREXTSYM debstop4,nextopcode,debugsa1,skipdebugsa1%endifSECTION .textsa1debug:%ifndef NO_DEBUGGER   cmp byte[debuggeron],0   je .nodebugger   cmp byte[skipdebugsa1],1   je .nodebugger   pushad   mov bl,[SA1xpb]   mov ax,[xpc]   test eax,8000h   jz .loweraddr2   mov eax,[snesmmap+ebx*4]   jmp .nextaddr.loweraddr2   mov eax,[snesmap2+ebx*4].nextaddr   mov ebx,esi   sub ebx,eax   mov [xpc],bx   mov [SA1RegP],dl   mov byte[debugsa1],1   call nextopcode   popad.nodebugger%endif   ret; B = ( or ); C = ,; L = [ or ]; I = #SA1COp61m8nd:  ; ADC(d,x)   addr_BdCxB_8br   ADCMacro8bndSA1COp61m16nd: ; ADC(d,x)   addr_BdCxB_16br   ADCMacro16bndSA1COp61m8d:   ; ADC(d,x)   addr_BdCxB_8br   ADCMacro8bdSA1COp61m16d:  ; ADC(d,x)   addr_BdCxB_16br   ADCMacro16bdSA1COp63m8nd:  ; ADC d,s   addr_dCs_8br   ADCMacro8bndSA1COp63m16nd: ; ADC d,s   addr_dCs_16br   ADCMacro16bndSA1COp63m8d:   ; ADC d,s   addr_dCs_8br   ADCMacro8bdSA1COp63m16d:  ; ADC d,s   addr_dCs_16br   ADCMacro16bdSA1COp65m8nd:  ; ADC d   addr_d_8br   ADCMacro8bndSA1COp65m16nd: ; ADC d   addr_d_16br   ADCMacro16bndSA1COp65m8d:   ; ADC d   addr_d_8br   ADCMacro8bdSA1COp65m16d:  ; ADC d   addr_d_16br   ADCMacro16bdSA1COp67m8nd:  ; ADC [d]   addr_LdL_8br   ADCMacro8bndSA1COp67m16nd: ; ADC [d]   addr_LdL_16br   ADCMacro16bndSA1COp67m8d:   ; ADC [d]   addr_LdL_8br   ADCMacro8bdSA1COp67m16d:  ; ADC [d]   addr_LdL_16br   ADCMacro16bdSA1COp69m8nd:  ; ADC #   addr_I_8br   ADCMacro8bndSA1COp69m16nd: ; ADC #   addr_I_16br   ADCMacro16bndSA1COp69m8d:   ; ADC #   addr_I_8br   ADCMacro8bdSA1COp69m16d:  ; ADC #   addr_I_16br   ADCMacro16bdSA1COp6Dm8nd:  ; ADC a   addr_a_8br   ADCMacro8bndSA1COp6Dm16nd: ; ADC a   addr_a_16br   ADCMacro16bndSA1COp6Dm8d:   ; ADC a   addr_a_8br   ADCMacro8bdSA1COp6Dm16d:  ; ADC a   addr_a_16br   ADCMacro16bdSA1COp6Fm8nd:  ; ADC al   addr_al_8br   ADCMacro8bndSA1COp6Fm16nd: ; ADC al   addr_al_16br   ADCMacro16bndSA1COp6Fm8d:   ; ADC al   addr_al_8br   ADCMacro8bdSA1COp6Fm16d:  ; ADC al   addr_al_16br   ADCMacro16bdSA1COp71m8nd:  ; ADC(d),y   addr_BdBCy_8br   ADCMacro8bndSA1COp71m16nd: ; ADC(d),y   addr_BdBCy_16br   ADCMacro16bndSA1COp71m8d:   ; ADC(d),y   addr_BdBCy_8br   ADCMacro8bdSA1COp71m16d:  ; ADC(d),y   addr_BdBCy_16br   ADCMacro16bdSA1COp72m8nd:  ; ADC (d)   addr_BdB_8br   ADCMacro8bndSA1COp72m16nd: ; ADC (d)   addr_BdB_16br   ADCMacro16bndSA1COp72m8d:   ; ADC (d)   addr_BdB_8br   ADCMacro8bdSA1COp72m16d:  ; ADC (d)   addr_BdB_16br   ADCMacro16bdSA1COp73m8nd:  ; ADC(d,s),y   addr_BdCsBCy_8br   ADCMacro8bndSA1COp73m16nd: ; ADC(d,s),y   addr_BdCsBCy_16br   ADCMacro16bndSA1COp73m8d:   ; ADC(d,s),y   addr_BdCsBCy_8br   ADCMacro8bdSA1COp73m16d:  ; ADC(d,s),y   addr_BdCsBCy_16br   ADCMacro16bdSA1COp75m8nd:  ; ADC d,x   addr_dCx_8br   ADCMacro8bndSA1COp75m16nd: ; ADC d,x   addr_dCx_16br   ADCMacro16bndSA1COp75m8d:   ; ADC d,x   addr_dCx_8br   ADCMacro8bdSA1COp75m16d:  ; ADC d,x   addr_dCx_16br   ADCMacro16bdSA1COp77m8nd:  ; ADC [d],y   addr_LdLCy_8br   ADCMacro8bndSA1COp77m16nd: ; ADC [d],y   addr_LdLCy_16br   ADCMacro16bndSA1COp77m8d:   ; ADC [d],y   addr_LdLCy_8br   ADCMacro8bdSA1COp77m16d:  ; ADC [d],y   addr_LdLCy_16br   ADCMacro16bdSA1COp79m8nd:  ; ADC a,y   addr_aCy_8br   ADCMacro8bndSA1COp79m16nd: ; ADC a,y   addr_aCy_16br   ADCMacro16bndSA1COp79m8d:   ; ADC a,y   addr_aCy_8br   ADCMacro8bdSA1COp79m16d:  ; ADC a,y   addr_aCy_16br   ADCMacro16bdSA1COp7Dm8nd:  ; ADC a,x   addr_aCx_8br   ADCMacro8bndSA1COp7Dm16nd: ; ADC a,x   addr_aCx_16br   ADCMacro16bndSA1COp7Dm8d:   ; ADC a,x   addr_aCx_8br   ADCMacro8bdSA1COp7Dm16d:  ; ADC a,x   addr_aCx_16br   ADCMacro16bdSA1COp7Fm8nd:  ; ADC al,x   addr_alCx_8br   ADCMacro8bndSA1COp7Fm16nd: ; ADC al,x   addr_alCx_16br   ADCMacro16bndSA1COp7Fm8d:   ; ADC al,x   addr_alCx_8br   ADCMacro8bdSA1COp7Fm16d:  ; ADC al,x   addr_alCx_16br   ADCMacro16bdSA1COp21m8: ; AND(d,x)   addr_BdCxB_8br   ANDMacro8bSA1COp21m16:; AND(d,x)   addr_BdCxB_16br   ANDMacro16bSA1COp23m8: ; AND d,s   addr_dCs_8br   ANDMacro8bSA1COp23m16:; AND d,s   addr_dCs_16br   ANDMacro16bSA1COp25m8: ; AND d   addr_d_8br   ANDMacro8bSA1COp25m16:; AND d   addr_d_16br   ANDMacro16bSA1COp27m8: ; AND [d]   addr_LdL_8br   ANDMacro8bSA1COp27m16:; AND [d]   addr_LdL_16br   ANDMacro16bSA1COp29m8: ; AND #   addr_I_8br   ANDMacro8bSA1COp29m16:; AND #   addr_I_16br   ANDMacro16bSA1COp2Dm8: ; AND a   addr_a_8br   ANDMacro8bSA1COp2Dm16:; AND a   addr_a_16br   ANDMacro16bSA1COp2Fm8: ; AND al   addr_al_8br   ANDMacro8bSA1COp2Fm16:; AND al   addr_al_16br   ANDMacro16bSA1COp31m8: ; AND(d),y   addr_BdBCy_8br   ANDMacro8bSA1COp31m16:; AND(d),y   addr_BdBCy_16br   ANDMacro16bSA1COp32m8: ; AND (d)   addr_BdB_8br   ANDMacro8bSA1COp32m16:; AND (d)   addr_BdB_16br   ANDMacro16bSA1COp33m8: ; AND(d,s),y   addr_BdCsBCy_8br   ANDMacro8bSA1COp33m16:; AND(d,s),y   addr_BdCsBCy_16br   ANDMacro16bSA1COp35m8: ; AND d,x   addr_dCx_8br   ANDMacro8bSA1COp35m16:; AND d,x   addr_dCx_16br   ANDMacro16bSA1COp37m8: ; AND [d],y   addr_LdLCy_8br   ANDMacro8bSA1COp37m16:; AND [d],y   addr_LdLCy_16br   ANDMacro16bSA1COp39m8: ; AND a,y   addr_aCy_8br   ANDMacro8bSA1COp39m16:; AND a,y   addr_aCy_16br   ANDMacro16bSA1COp3Dm8: ; AND a,x   addr_aCx_8br   ANDMacro8bSA1COp3Dm16:; AND a,x   addr_aCx_16br   ANDMacro16bSA1COp3Fm8: ; AND al,x   addr_alCx_8br   ANDMacro8bSA1COp3Fm16:; AND al,x   addr_alCx_16br   ANDMacro16bSA1COp06m8: ; ASL d   addr_d_8brni   ASLMacro8b   addr_d_8bw   endloopSA1COp06m16:; ASL d   addr_d_16brni   ASLMacro16b   addr_d_16bw   endloopSA1COp0Am8: ; ASL A   addr_A_8brni   ASLMacro8b   addr_A_8bw   endloopSA1COp0Am16:; ASL A   addr_A_16brni   ASLMacro16b   addr_A_16bw   endloopSA1COp0Em8: ; ASL a   addr_a_8brni   ASLMacro8b   addr_a_8bw   endloopSA1COp0Em16:; ASL a   addr_a_16brni   ASLMacro16b   addr_a_16bw   endloopSA1COp16m8: ; ASL d,x   addr_dCx_8brni   ASLMacro8b   addr_dCx_8bw   endloopSA1COp16m16:; ASL d,x   addr_dCx_16brni   ASLMacro16b   addr_dCx_16bw   endloopSA1COp1Em8: ; ASL a,x   addr_aCx_8brni   ASLMacro8b   addr_aCx_8bw   endloopSA1COp1Em16:; ASL a,x   addr_aCx_16brni   ASLMacro16b   addr_aCx_16bw   endloopSA1COp90:   ; BCC r    test byte[Sflagc],01h    jnz .skip    JumpMacroSA1COpB0:   ; BCS r    test byte[Sflagc],01h    jz .skip    JumpMacroSA1COpF0:   ; BEQ r    test dword[Sflagnz],0FFFFh    jnz .skip    JumpMacroSA1COp30:   ; BMI r    test dword[Sflagnz],018000h    jz .skip    JumpMacroSA1COpD0:   ; BNE r    test dword[Sflagnz],0FFFFh    jz .skip    JumpMacroSA1COp10:   ; BPL r    test dword[Sflagnz],018000h    jnz .skip    JumpMacroSA1COp80:   ; BRA r    movsx eax,byte[esi]    inc esi    add esi,eax    endloopSA1COp50:   ; BVC r    test dword[Sflago],0FFh    jnz .skip    JumpMacroSA1COp70:   ; BVS r    test dword[Sflago],0FFh    jz .skip    JumpMacro;  BIT instruction does not affect N and V flags when using immediate;  addressing mode. When using other addressing modes, the N and V flagsSA1COp89m8: ; BIT #   BITMacroim8bSA1COp89m16:; BIT #   BITMacroim16bSA1COp24m8: ; BIT d   addr_d_8br   BITMacro8bSA1COp24m16:; BIT d   addr_d_16br   BITMacro16bSA1COp2Cm8: ; BIT a   addr_a_8br   BITMacro8bSA1COp2Cm16:; BIT a   addr_a_16br   BITMacro16bSA1COp34m8: ; BIT d,x   addr_dCx_8br   BITMacro8bSA1COp34m16:; BIT d,x   addr_dCx_16br   BITMacro16bSA1COp3Cm8: ; BIT a,x   addr_aCx_8br   BITMacro8bSA1COp3Cm16:; BIT a,x   addr_aCx_16br   BITMacro16bSA1COp00:   ; BRK s%ifndef NO_DEBUGGER   mov byte[debstop4],1%endif   dec esi   endloop   BRKMacroSA1COp82:   ; BRL rl   BRLMacroSA1COp18:   ; CLC i    mov dword[Sflagc],0    endloopSA1COpD8:   ; CLD i    and dl,0F7h    mov bl,dl    mov edi,[SA1tablead+ebx*4]    endloopSA1COp58:   ; CLI i    and dl,0FBh    endloopSA1COpB8:   ; CLV i    mov dword[Sflago],0    endloopSA1COpC1m8: ; CMP(d,x)   addr_BdCxB_8br   CMPMacro8bSA1COpC1m16:; CMP(d,x)   addr_BdCxB_16br   CMPMacro16bSA1COpC3m8: ; CMP d,s   addr_dCs_8br   CMPMacro8bSA1COpC3m16:; CMP d,s   addr_dCs_16br   CMPMacro16bSA1COpC5m8: ; CMP d   addr_d_8br   CMPMacro8bSA1COpC5m16:; CMP d   addr_d_16br   CMPMacro16bSA1COpC7m8: ; CMP [d]   addr_LdL_8br   CMPMacro8bSA1COpC7m16:; CMP [d]   addr_LdL_16br   CMPMacro16bSA1COpC9m8: ; CMP #   addr_I_8br   CMPMacro8bSA1COpC9m16:; CMP #   addr_I_16br   CMPMacro16bSA1COpCDm8: ; CMP a   addr_a_8br   CMPMacro8bSA1COpCDm16:; CMP a   addr_a_16br   CMPMacro16bSA1COpCFm8: ; CMP al   addr_al_8br   CMPMacro8bSA1COpCFm16:; CMP al   addr_al_16br   CMPMacro16bSA1COpD1m8: ; CMP(d),y   addr_BdBCy_8br   CMPMacro8bSA1COpD1m16:; CMP(d),y   addr_BdBCy_16br   CMPMacro16bSA1COpD2m8: ; CMP (d)   addr_BdB_8br   CMPMacro8bSA1COpD2m16:; CMP (d)   addr_BdB_16br   CMPMacro16bSA1COpD3m8: ; CMP(d,s),y   addr_BdCsBCy_8br   CMPMacro8bSA1COpD3m16:; CMP(d,s),y   addr_BdCsBCy_16br   CMPMacro16bSA1COpD5m8: ; CMP d,x   addr_dCx_8br   CMPMacro8bSA1COpD5m16:; CMP d,x   addr_dCx_16br   CMPMacro16bSA1COpD7m8: ; CMP [d],y   addr_LdLCy_8br   CMPMacro8bSA1COpD7m16:; CMP [d],y   addr_LdLCy_16br   CMPMacro16bSA1COpD9m8: ; CMP a,y   addr_aCy_8br   CMPMacro8bSA1COpD9m16:; CMP a,y   addr_aCy_16br   CMPMacro16bSA1COpDDm8: ; CMP a,x   addr_aCx_8br   CMPMacro8bSA1COpDDm16:; CMP a,x   addr_aCx_16br   CMPMacro16bSA1COpDFm8: ; CMP al,x   addr_alCx_8br   CMPMacro8bSA1COpDFm16:; CMP al,x   addr_alCx_16br   CMPMacro16bSA1COp02:   ; SA1COp s   COPMacroSA1COpE0x8: ; CPX #   addr_I_8br   CPXMacro8bSA1COpE0x16:; CPX #   addr_I_16br   CPXMacro16bSA1COpE4x8: ; CPX d   addr_d_8br   CPXMacro8bSA1COpE4x16:; CPX d   addr_d_16br   CPXMacro16bSA1COpECx8: ; CPX a   addr_a_8br   CPXMacro8bSA1COpECx16:; CPX a   addr_a_16br   CPXMacro16bSA1COpC0x8: ; CPY #   addr_I_8br   CPYMacro8bSA1COpC0x16:; CPY #   addr_I_16br   CPYMacro16bSA1COpC4x8: ; CPY d   addr_d_8br   CPYMacro8bSA1COpC4x16:; CPY d   addr_d_16br   CPYMacro16bSA1COpCCx8: ; CPY a   addr_a_8br   CPYMacro8bSA1COpCCx16:; CPY a   addr_a_16br   CPYMacro16bSA1COp3Am8: ; DEC A    addr_A_8brni    dec al    flagsetnz8bnel    addr_A_8bw    endloopSA1COp3Am16:; DEC A    addr_A_16brni    dec ax    flagsetnz16bnel    addr_A_16bw    endloopSA1COpCEm8: ; DEC a    addr_a_8brni    dec al    flagsetnz8bnel    addr_a_8bw    endloopSA1COpCEm16:; DEC a    addr_a_16brni    dec ax    flagsetnz16bnel    addr_a_16bw    endloopSA1COpC6m8: ; DEC d    addr_d_8brni    dec al    flagsetnz8bnel    addr_d_8bw    endloopSA1COpC6m16:; DEC d    addr_d_16brni    dec ax    flagsetnz16bnel    addr_d_16bw    endloopSA1COpD6m8: ; DEC d,x    addr_dCx_16brni    dec al    flagsetnz8bnel    addr_dCx_16bw    endloopSA1COpD6m16:; DEC d,x    addr_dCx_16brni    dec ax    flagsetnz16bnel    addr_dCx_16bw    endloopSA1COpDEm8: ; DEC a,x    addr_aCx_8brni    dec al    flagsetnz8bnel    addr_aCx_8bw    endloopSA1COpDEm16:; DEC a,x
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