rei2c.sim.qmsg
来自「用VHDL编写的quartusii平台上的串行EEPROM配置读取的程序。」· QMSG 代码 · 共 9 行
QMSG
9 行
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Simulator Quartus II " "Info: Running Quartus II Simulator" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.0 Build 148 04/26/2005 SJ Full Version " "Info: Version 5.0 Build 148 04/26/2005 SJ Full Version" { } { } 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Jul 24 14:41:30 2006 " "Info: Processing started: Mon Jul 24 14:41:30 2006" { } { } 0} } { } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sim --read_settings_files=on --write_settings_files=off rei2c -c rei2c " "Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off rei2c -c rei2c" { } { } 0}
{ "Warning" "WSIM_WRONG_IO_TYPE_CHANNEL" "sda~result Output Buried " "Warning: Wrong node type for node \"sda~result\" in vector source file. Design node is of type Output, but signal in vector source file is of type Buried" { } { } 0}
{ "Warning" "WSDB_TRI_BUS_CONTENTION" "12.39 us \|rei2c\|sda " "Warning: Found logic contention at time 12.39 us on bus node \"\|rei2c\|sda\"" { { "Info" "ISDB_NODE_VALUE" "sda 0 " "Info: Node \"sda\" has logic level of 0" { } { } 0} { "Info" "ISDB_NODE_VALUE" "sda 1 " "Info: Node \"sda\" has logic level of 1" { } { } 0} } { } 0}
{ "Info" "ISIM_SIM_SIMULATION_COVERAGE" " 67.80 % " "Info: Simulation coverage is 67.80 %" { } { } 0}
{ "Info" "ISIM_SIM_NUMBER_OF_TRANSITION" "189327 " "Info: Number of transitions in simulation is 189327" { } { } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Simulator 0 s 2 s Quartus II " "Info: Quartus II Simulator was successful. 0 errors, 2 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Mon Jul 24 14:41:43 2006 " "Info: Processing ended: Mon Jul 24 14:41:43 2006" { } { } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:13 " "Info: Elapsed time: 00:00:13" { } { } 0} } { } 0}
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