epptop.fit.smsg

在altera fpga中实现epp模式的并口通信程序

    Info: To finish routing, the Quartus II software will remove the routing constraints for this fan-out and will make another attempt at routing this fan-out after all other fan-outs of this signal are routed
Info: Can't route signal "SRAMADDR[2]" to atom "ram_dp_ar_aw:m1|data_1_out~2116"
    Info: Routing for this connection is constrained
    Info: Error on line number 3310 in Routing Constraints File
    Info: To finish routing, the Quartus II software will remove the routing constraints for this fan-out and will make another attempt at routing this fan-out after all other fan-outs of this signal are routed
Info: Can't route signal "SRAMADDR[2]" to atom "ram_dp_ar_aw:m1|data_1_out~2127"
    Info: Routing for this connection is constrained
    Info: Error on line number 3314 in Routing Constraints File
    Info: To finish routing, the Quartus II software will remove the routing constraints for this fan-out and will make another attempt at routing this fan-out after all other fan-outs of this signal are routed
Info: Can't route signal "SRAMADDR[2]" to atom "ram_dp_ar_aw:m1|data_1_out~2124"
    Info: Routing for this connection is constrained
    Info: Error on line number 3319 in Routing Constraints File
    Info: To finish routing, the Quartus II software will remove the routing constraints for this fan-out and will make another attempt at routing this fan-out after all other fan-outs of this signal are routed
Info: Can't route signal "SRAMADDR[2]" to atom "ram_dp_ar_aw:m1|data_1_out~2112"
    Info: Routing for this connection is constrained
    Info: Error on line number 3322 in Routing Constraints File
    Info: To finish routing, the Quartus II software will remove the routing constraints for this fan-out and will make another attempt at routing this fan-out after all other fan-outs of this signal are routed
Info: Can't route signal "SRAMADDR[2]" to atom "ram_dp_ar_aw:m1|data_1_out~2109"
    Info: Routing for this connection is constrained
    Info: Error on line number 3325 in Routing Constraints File
    Info: To finish routing, the Quartus II software will remove the routing constraints for this fan-out and will make another attempt at routing this fan-out after all other fan-outs of this signal are routed
Info: Can't route signal "SRAMADDR[2]" to atom "ram_dp_ar_aw:m1|data_1_out~2118"
    Info: Routing for this connection is constrained
    Info: Error on line number 3328 in Routing Constraints File
    Info: To finish routing, the Quartus II software will remove the routing constraints for this fan-out and will make another attempt at routing this fan-out after all other fan-outs of this signal are routed
Info: Can't route signal "SRAMADDR[2]" to atom "ram_dp_ar_aw:m1|data_1_out~2125"
    Info: Routing for this connection is constrained
    Info: Error on line number 3335 in Routing Constraints File
    Info: To finish routing, the Quartus II software will remove the routing constraints for this fan-out and will make another attempt at routing this fan-out after all other fan-outs of this signal are routed
Info: Can't route signal "SRAMADDR[2]" to atom "ram_dp_ar_aw:m1|data_1_out~2104"
    Info: Routing for this connection is constrained
    Info: Error on line number 3339 in Routing Constraints File
    Info: To finish routing, the Quartus II software will remove the routing constraints for this fan-out and will make another attempt at routing this fan-out after all other fan-outs of this signal are routed
Info: Can't route signal "SRAMADDR[2]" to atom "ram_dp_ar_aw:m1|data_1_out~2121"
    Info: Routing for this connection is constrained
    Info: Error on line number 3342 in Routing Constraints File
    Info: To finish routing, the Quartus II software will remove the routing constraints for this fan-out and will make another attempt at routing this fan-out after all other fan-outs of this signal are routed
Info: Error on line 3346 of Routing Constraints File. Can't use route port DATAF with atom "ram_dp_ar_aw:m1|data_1_out~2119" due to atom's current configuration
Info: Can't route signal "SRAMADDR[2]" to atom "ram_dp_ar_aw:m1|data_1_out~2119"
    Info: Routing for this connection is constrained
    Info: Error on line number 3346 in Routing Constraints File
    Info: To finish routing, the Quartus II software will remove the routing constraints for this fan-out and will make another attempt at routing this fan-out after all other fan-outs of this signal are routed
Info: Error on line 3369 of Routing Constraints File. Can't use route port DATAE with atom "ram_dp_ar_aw:m1|data_1_out~2119" due to atom's current configuration
Info: Can't route signal "SRAMADDR[1]" to atom "ram_dp_ar_aw:m1|data_1_out~2119"
    Info: Routing for this connection is constrained
    Info: Error on line number 3369 in Routing Constraints File
    Info: To finish routing, the Quartus II software will remove the routing constraints for this fan-out and will make another attempt at routing this fan-out after all other fan-outs of this signal are routed
Info: Error on line 3387 of Routing Constraints File. Can't use route port DATAE with atom "ram_dp_ar_aw:m1|data_1_out~2122" due to atom's current configuration
Info: Can't route signal "SRAMADDR[1]" to atom "ram_dp_ar_aw:m1|data_1_out~2122"
    Info: Routing for this connection is constrained
    Info: Error on line number 3387 in Routing Constraints File
    Info: To finish routing, the Quartus II software will remove the routing constraints for this fan-out and will make another attempt at routing this fan-out after all other fan-outs of this signal are routed
Info: Error on line 3404 of Routing Constraints File. Can't use route port DATAE with atom "ram_dp_ar_aw:m1|data_1_out~2113" due to atom's current configuration
Info: Can't route signal "SRAMADDR[1]" to atom "ram_dp_ar_aw:m1|data_1_out~2113"
    Info: Routing for this connection is constrained
    Info: Error on line number 3403 in Routing Constraints File
    Info: To finish routing, the Quartus II software will remove the routing constraints for this fan-out and will make another attempt at routing this fan-out after all other fan-outs of this signal are routed
Info: Can't route signal "SRAMADDR[1]" to atom "ram_dp_ar_aw:m1|mem[6][2]~3358"
    Info: Routing for this connection is constrained
    Info: Error on line number 3407 in Routing Constraints File
    Info: To finish routing, the Quartus II software will remove the routing constraints for this fan-out and will make another attempt at routing this fan-out after all other fan-outs of this signal are routed
Info: Can't route signal "SRAMADDR[1]" to atom "ram_dp_ar_aw:m1|data_1_out~2114"
    Info: Routing for this connection is constrained
    Info: Error on line number 3410 in Routing Constraints File
    Info: To finish routing, the Quartus II software will remove the routing constraints for this fan-out and will make another attempt at routing this fan-out after all other fan-outs of this signal are routed
Info: Can't route signal "SRAMADDR[1]" to atom "ram_dp_ar_aw:m1|data_1_out~2105"
    Info: Routing for this connection is constrained
    Info: Error on line number 3413 in Routing Constraints File
    Info: To finish routing, the Quartus II software will remove the routing constraints for this fan-out and will make another attempt at routing this fan-out after all other fan-outs of this signal are routed
Info: Average interconnect usage is 0% of the available device resources. Peak interconnect usage is 2%
    Info: The peak interconnect region extends from location X37_Y25 to location X49_Y37
Info: Fitter routing operations ending: elapsed time is 00:00:01
Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time.
    Info: Optimizations that may affect the design's routability were skipped
    Info: Optimizations that may affect the design's timing were skipped
Info: Started post-fitting delay annotation
Warning: Found 18 output pins without output pin load capacitance assignment
    Info: Pin "INT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "WAIT" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "EPPDATA[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "EPPDATA[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "EPPDATA[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "EPPDATA[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "EPPDATA[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "EPPDATA[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "EPPDATA[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "EPPDATA[7]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "SRAMDATA[0]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "SRAMDATA[1]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "SRAMDATA[2]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "SRAMDATA[3]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "SRAMDATA[4]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "SRAMDATA[5]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "SRAMDATA[6]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Info: Pin "SRAMDATA[7]" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
Info: Delay annotation completed successfully
Warning: Following 1 pins have nothing, GND, or VCC driving datain port -- changes to this connectivity may change fitting results
    Info: Pin INT has GND driving its datain port
Info: Following groups of pins have the same output enable
    Info: Following pins have the same output enable: EPP2SRAM:M0|EPP_Data~27
        Info: Type bidirectional pin EPPDATA[2] uses the 3.3-V LVTTL I/O standard
        Info: Type bidirectional pin EPPDATA[6] uses the 3.3-V LVTTL I/O standard
        Info: Type bidirectional pin EPPDATA[1] uses the 3.3-V LVTTL I/O standard
        Info: Type bidirectional pin EPPDATA[5] uses the 3.3-V LVTTL I/O standard
        Info: Type bidirectional pin EPPDATA[0] uses the 3.3-V LVTTL I/O standard
        Info: Type bidirectional pin EPPDATA[4] uses the 3.3-V LVTTL I/O standard
        Info: Type bidirectional pin EPPDATA[3] uses the 3.3-V LVTTL I/O standard
        Info: Type bidirectional pin EPPDATA[7] uses the 3.3-V LVTTL I/O standard
    Info: Following pins have the same output enable: ram_dp_ar_aw:m1|data_1_out[0]~2128
        Info: Type bidirectional pin SRAMDATA[2] uses the 3.3-V LVTTL I/O standard
        Info: Type bidirectional pin SRAMDATA[6] uses the 3.3-V LVTTL I/O standard
        Info: Type bidirectional pin SRAMDATA[1] uses the 3.3-V LVTTL I/O standard
        Info: Type bidirectional pin SRAMDATA[5] uses the 3.3-V LVTTL I/O standard
        Info: Type bidirectional pin SRAMDATA[0] uses the 3.3-V LVTTL I/O standard
        Info: Type bidirectional pin SRAMDATA[4] uses the 3.3-V LVTTL I/O standard
        Info: Type bidirectional pin SRAMDATA[3] uses the 3.3-V LVTTL I/O standard
        Info: Type bidirectional pin SRAMDATA[7] uses the 3.3-V LVTTL I/O standard
Info: Quartus II Fitter was successful. 0 errors, 2 warnings
    Info: Allocated 244 megabytes of memory during processing
    Info: Processing ended: Tue Dec 30 21:44:00 2008
    Info: Elapsed time: 00:00:48