board.c

colilo,COLDFIRE MCF5282的bootloader

#include "arch.h"
#include "mcfuart.h"

char	ident[] = "Motorola eLITE";
char	copyright[] = "(C) 1999, Moreton Bay Ventures, Rob Scott";
// For eLITE, reserve 1st 64k for dBUG, 2nd for boot loader, last 64k for dBUG
#define	IMAGE_ADDR  0x30030000
#define IMAGE_SIZE 0x000c0000
#define XFER_ADDR 0x400
#define DEFAULT_PORT 1

extern unsigned int consoleBase;

void configureConsole()
{
	consoleBase = MCFUART_BASE1;
	configureSerial(consoleBase, 38400, MCF_CLK);
}

void configureAuxSerial()
{
	configureSerial(MCFUART_BASE2, 115200, MCF_CLK);
}

void setLED(int state)
{
	unsigned char bits;

	switch(state) {
		case 0:
			bits = 0x00;
			break;
		case 1:
			bits = 0x06;
			break;
		case 2:
			bits = 0x5b;
			break;
		case 3:
			bits = 0x4f;
			break;
		case 4:
			bits = 0x66;
			break;
		case 5:
			bits = 0x6d;
			break;
		case 6:
			bits = 0x7d;
			break;
		case 7:
			bits = 0x07;
			break;
		case 8:
			bits = 0x7f;
			break;
		case 10:
			bits = 0x77;
			break;
		case 11:
			bits = 0x7C;
			break;
		case 12:
			bits = 0x39;
			break;
		case 13:
			bits = 0x5e;
			break;
		case 14:
			bits = 0x79;
			break;
		case 15:
			bits = 0x71;
			break;
		default:
			return;
	}
	*((volatile unsigned short *) 0x40000000) = (unsigned short)(bits << 8);
}

extern unsigned int downloadPort;
extern unsigned int image_size;
extern unsigned char *xfer_addr;
extern unsigned char *down_addr;
extern unsigned char *dest_addr;
extern unsigned char *source_addr;

void setImageParams()
{
	downloadPort = DEFAULT_PORT;
	image_size  = IMAGE_SIZE;
	xfer_addr   = (unsigned char *)XFER_ADDR;
	down_addr   = (unsigned char *)IMAGE_ADDR;
	dest_addr   = (unsigned char *)0xf1000000;
	source_addr = (unsigned char *)IMAGE_ADDR;
}

void setupBoard()
{
	volatile unsigned char	*mbar;
	mbar = (volatile unsigned char *) MCF_MBAR;

	/*
	 *	Setup chip selects...
	 */
	/* CS0 -- FLASH ROM */
	*((volatile unsigned short *) (mbar + MCFSIM_CSAR0)) = 0xffe0;
	*((volatile unsigned long *) (mbar + MCFSIM_CSMR0)) = 0x000f0000;
	*((volatile unsigned short *) (mbar + MCFSIM_CSCR0)) = 0x1da3;

	/* CS1 -- not used */
	*((volatile unsigned short *) (mbar + MCFSIM_CSAR1)) = 0x0000;
	*((volatile unsigned long *) (mbar + MCFSIM_CSMR1)) = 0x00000000;
	*((volatile unsigned short *) (mbar + MCFSIM_CSCR1)) = 0x0000;

	/* CS2 -- SRAM */
	*((volatile unsigned short *) (mbar + MCFSIM_CSAR2)) = 0x3000;
	*((volatile unsigned long *) (mbar + MCFSIM_CSMR2)) = 0x000f0000;
	*((volatile unsigned short *) (mbar + MCFSIM_CSCR2)) = 0x1903;

	/* CS3 -- LED bank and parallel port, address 0x40000000 */
	*((volatile unsigned short *) (mbar + MCFSIM_CSAR3)) = 0x4000;
	*((volatile unsigned long *) (mbar + MCFSIM_CSMR3)) = 0x000f0000;
	*((volatile unsigned short *) (mbar + MCFSIM_CSCR3)) = 0x0183;
	setLED(0);

	/* CS4 -- Not used */
	*((volatile unsigned short *) (mbar + MCFSIM_CSAR4)) = 0x0000;
	*((volatile unsigned long *) (mbar + MCFSIM_CSMR4)) = 0x00000000;
	*((volatile unsigned short *) (mbar + MCFSIM_CSCR4)) = 0x0000;

	/* CS5 -- Not used */
	*((volatile unsigned short *) (mbar + MCFSIM_CSAR5)) = 0x0000;
	*((volatile unsigned long *) (mbar + MCFSIM_CSMR5)) = 0x00000000;
	*((volatile unsigned short *) (mbar + MCFSIM_CSCR5)) = 0x0000;

	/* CS6 -- Not used */
	*((volatile unsigned short *) (mbar + MCFSIM_CSAR6)) = 0x0000;
	*((volatile unsigned long *) (mbar + MCFSIM_CSMR6)) = 0x00000000;
	*((volatile unsigned short *) (mbar + MCFSIM_CSCR6)) = 0x0000;

	/* CS7 -- Not used */
	*((volatile unsigned short *) (mbar + MCFSIM_CSAR7)) = 0x0000;
	*((volatile unsigned long *) (mbar + MCFSIM_CSMR7)) = 0x00000000;
	*((volatile unsigned short *) (mbar + MCFSIM_CSCR7)) = 0x0000;
}

void setupDRAM()
{
	volatile unsigned char *mbar = (unsigned char *)MCF_MBAR;

	/*
	
	DCTR definition:

     <15>: DAEM, 1 = Drive Multiplexed Address During External Master DRAM xfer
     <14>: EDO,  1 = EDO, 0 = Normal
     <12>: RCD,  1 = 2 clk RAS-to-CAS, 0 = 1.0 clk RAS-to-CAS
  <10:09>: RSH,  10 = 3.5 clk RAS low, 01 = 2.5 clk, 00 = 1.5 clk
  <06:05>: RP,   10 = 3.5 clk RAS Precharge, 01 = 2.5 clk, 00 = 1.5 clk
     <03>: CAS,  1 = 2.5 clk CAS assertion, 0 = 1.5 clk
     <01>: CP,   1 = 1.5 CAS clk precharge, 0 = .5 clk
     <00>: CSR,  1 = 2.0 clk CAS before RAS setup, 0 = 1.0 clk

	*/

	*((volatile unsigned short *) (mbar + MCFSIM_DCRR)) = 0x0034;
	*((volatile unsigned short *) (mbar + MCFSIM_DCTR)) = 0x144B;
	*((volatile unsigned short *) (mbar + MCFSIM_DCAR0)) = 0x0000;
	*((volatile unsigned long *) (mbar + MCFSIM_DCMR0)) = 0x003e0000;
	*((volatile unsigned char *) (mbar + MCFSIM_DCCR0)) = 0x07;
}