aliens.c.24.lreg

是一个键盘测试程序

    (expr_list:REG_DEAD (reg:SI 67)
        (nil)))

(insn 46 45 47 3 aliens.c:197 (set (mem/f:SI (plus:SI (reg/f:SI 7 sp)
                (const_int 4 [0x4])) [0 S4 A32])
        (const_int 20480 [0x5000])) 36 {*movsi_1} (nil)
    (nil))

(insn 47 46 48 3 aliens.c:197 (set (reg:SI 68 [ image ])
        (mem/f:SI (plus:SI (reg/f:SI 20 frame)
                (const_int -4 [0xfffffffc])) [0 image+0 S4 A32])) 36 {*movsi_1} (nil)
    (nil))

(insn 48 47 49 3 aliens.c:197 (set (mem/f:SI (reg/f:SI 7 sp) [0 S4 A32])
        (reg:SI 68 [ image ])) 36 {*movsi_1} (nil)
    (expr_list:REG_DEAD (reg:SI 68 [ image ])
        (nil)))

(call_insn 49 48 50 3 aliens.c:197 (set (reg:SI 0 ax)
        (call (mem:QI (symbol_ref:SI ("SDL_SetColorKey") [flags 0x41] <function_decl 0xb7a0dbd0 SDL_SetColorKey>) [0 S1 A8])
            (const_int 12 [0xc]))) 489 {*call_value_0} (nil)
    (expr_list:REG_UNUSED (reg:SI 0 ax)
        (nil))
    (nil))
;; End of basic block 3, registers live:
 6 [bp] 7 [sp] 16 [argp] 20 [frame]

;; Start of basic block 4, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
(code_label 50 49 80 4 3 "" [1 uses])

(note 80 50 51 4 [bb 4] NOTE_INSN_BASIC_BLOCK)

(note 51 80 52 4 ("aliens.c") 200)

(insn 52 51 53 4 aliens.c:200 (set (reg:SI 69 [ image ])
        (mem/f:SI (plus:SI (reg/f:SI 20 frame)
                (const_int -4 [0xfffffffc])) [0 image+0 S4 A32])) 36 {*movsi_1} (nil)
    (nil))

(insn 53 52 54 4 aliens.c:200 (set (mem/f:SI (reg/f:SI 7 sp) [0 S4 A32])
        (reg:SI 69 [ image ])) 36 {*movsi_1} (nil)
    (expr_list:REG_DEAD (reg:SI 69 [ image ])
        (nil)))

(call_insn 54 53 55 4 aliens.c:200 (set (reg:SI 0 ax)
        (call (mem:QI (symbol_ref:SI ("SDL_DisplayFormat") [flags 0x41] <function_decl 0xb7a0fd14 SDL_DisplayFormat>) [0 S1 A8])
            (const_int 4 [0x4]))) 489 {*call_value_0} (nil)
    (nil)
    (nil))

(insn 55 54 56 4 aliens.c:200 (set (reg:SI 70)
        (reg:SI 0 ax)) 36 {*movsi_1} (nil)
    (expr_list:REG_DEAD (reg:SI 0 ax)
        (nil)))

(insn 56 55 57 4 aliens.c:200 (set (mem/f:SI (plus:SI (reg/f:SI 20 frame)
                (const_int -8 [0xfffffff8])) [0 surface+0 S4 A32])
        (reg:SI 70)) 36 {*movsi_1} (nil)
    (expr_list:REG_DEAD (reg:SI 70)
        (nil)))

(note 57 56 58 4 ("aliens.c") 201)

(insn 58 57 59 4 aliens.c:201 (set (reg:SI 71 [ image ])
        (mem/f:SI (plus:SI (reg/f:SI 20 frame)
                (const_int -4 [0xfffffffc])) [0 image+0 S4 A32])) 36 {*movsi_1} (nil)
    (nil))

(insn 59 58 60 4 aliens.c:201 (set (mem/f:SI (reg/f:SI 7 sp) [0 S4 A32])
        (reg:SI 71 [ image ])) 36 {*movsi_1} (nil)
    (expr_list:REG_DEAD (reg:SI 71 [ image ])
        (nil)))

(call_insn 60 59 61 4 aliens.c:201 (call (mem:QI (symbol_ref:SI ("SDL_FreeSurface") [flags 0x41] <function_decl 0xb7a0d360 SDL_FreeSurface>) [0 S1 A8])
        (const_int 4 [0x4])) 360 {*call_0} (nil)
    (nil)
    (nil))

(note 61 60 64 4 ("aliens.c") 202)

(insn 64 61 65 4 aliens.c:202 (set (reg:SI 73 [ surface ])
        (mem/f:SI (plus:SI (reg/f:SI 20 frame)
                (const_int -8 [0xfffffff8])) [0 surface+0 S4 A32])) 36 {*movsi_1} (nil)
    (nil))

(insn 65 64 69 4 aliens.c:202 (set (reg:SI 58 [ <result> ])
        (reg:SI 73 [ surface ])) 36 {*movsi_1} (nil)
    (expr_list:REG_DEAD (reg:SI 73 [ surface ])
        (nil)))
;; End of basic block 4, registers live:
 6 [bp] 7 [sp] 16 [argp] 20 [frame] 58

(note 69 65 70 NOTE_INSN_FUNCTION_END)

(note 70 69 71 ("aliens.c") 203)

;; Start of basic block 5, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 58
(code_label 71 70 82 5 1 "" [1 uses])

(note 82 71 72 5 [bb 5] NOTE_INSN_BASIC_BLOCK)

(insn 72 82 75 5 aliens.c:203 (set (reg/i:SI 0 ax [ <result> ])
        (reg:SI 58 [ <result> ])) 36 {*movsi_1} (nil)
    (expr_list:REG_DEAD (reg:SI 58 [ <result> ])
        (nil)))

(insn 75 72 0 5 aliens.c:203 (use (reg/i:SI 0 ax [ <result> ])) -1 (nil)
    (nil))
;; End of basic block 5, registers live:
 0 [ax] 6 [bp] 7 [sp] 16 [argp] 20 [frame]


;; Function LoadData



Pass 0

  Register 58 costs: AREG:-1000 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:36000 INT_SSE_REGS:36000 FLOAT_INT_SSE_REGS:36000 ALL_REGS:36000 MEM:9000
  Register 59 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:6000
  Register 60 costs: AREG:-1000 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:6000
  Register 61 costs: AREG:-1000 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:6000
  Register 62 costs: AREG:-1000 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:6000
  Register 63 costs: AREG:-1000 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:6000
  Register 65 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:6000
  Register 66 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:6000
  Register 67 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:6000
  Register 68 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:6000
  Register 69 costs: AREG:-1000 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:6000
  Register 70 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:6000
  Register 72 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:2000 INDEX_REGS:0 LEGACY_REGS:2000 GENERAL_REGS:2000 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:6000
  Register 73 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:6000
  Register 74 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:2000 INDEX_REGS:0 LEGACY_REGS:2000 GENERAL_REGS:2000 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:6000
  Register 75 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:6000
  Register 76 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:6000
  Register 77 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:6000
  Register 78 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:27000 INT_SSE_REGS:27000 FLOAT_INT_SSE_REGS:27000 ALL_REGS:27000 MEM:8000
  Register 79 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:54000 INT_SSE_REGS:54000 FLOAT_INT_SSE_REGS:54000 ALL_REGS:54000 MEM:13000
  Register 80 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:2000 INDEX_REGS:0 LEGACY_REGS:2000 GENERAL_REGS:2000 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:5000
  Register 81 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:5000
  Register 82 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:5000
  Register 83 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:4000
  Register 84 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:5000
  Register 85 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:27000 INT_SSE_REGS:27000 FLOAT_INT_SSE_REGS:27000 ALL_REGS:27000 MEM:8000
  Register 86 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:54000 INT_SSE_REGS:54000 FLOAT_INT_SSE_REGS:54000 ALL_REGS:54000 MEM:13000
  Register 87 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:2000 INDEX_REGS:0 LEGACY_REGS:2000 GENERAL_REGS:2000 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:5000
  Register 88 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:5000
  Register 89 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:5000
  Register 90 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:4000
  Register 91 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:18000 INT_SSE_REGS:18000 FLOAT_INT_SSE_REGS:18000 ALL_REGS:18000 MEM:5000
  Register 94 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:27000 INT_SSE_REGS:27000 FLOAT_INT_SSE_REGS:27000 ALL_REGS:27000 MEM:10000
  Register 96 costs: AREG:0 DREG:0 CREG:0 BREG:0 SIREG:0 DIREG:0 AD_REGS:0 Q_REGS:0 NON_Q_REGS:0 INDEX_REGS:0 LEGACY_REGS:0 GENERAL_REGS:0 FLOAT_INT_REGS:27000 INT_SSE_REGS:27000 FLOAT_INT_SSE_REGS:27000 ALL_REGS:27000 MEM:10000

  Register 53 pref FLOAT_INT_SSE_REGS or none
  Register 54 pref FLOAT_INT_SSE_REGS or none
  Register 55 pref FLOAT_INT_SSE_REGS or none
  Register 56 pref FLOAT_INT_SSE_REGS or none
  Register 57 pref FLOAT_INT_SSE_REGS or none
  Register 58 pref AREG, else GENERAL_REGS
  Register 59 pref GENERAL_REGS or none
  Register 60 pref AREG, else GENERAL_REGS
  Register 61 pref AREG, else GENERAL_REGS
  Register 62 pref AREG, else GENERAL_REGS
  Register 63 pref AREG, else GENERAL_REGS
  Register 64 pref FLOAT_INT_SSE_REGS or none
  Register 65 pref GENERAL_REGS or none
  Register 66 pref GENERAL_REGS or none
  Register 67 pref GENERAL_REGS or none
  Register 68 pref GENERAL_REGS or none
  Register 69 pref AREG, else GENERAL_REGS
  Register 70 pref GENERAL_REGS or none
  Register 71 pref FLOAT_INT_SSE_REGS or none
  Register 72 pref INDEX_REGS, else GENERAL_REGS
  Register 73 pref GENERAL_REGS or none
  Register 74 pref INDEX_REGS, else GENERAL_REGS
  Register 75 pref GENERAL_REGS or none
  Register 76 pref GENERAL_REGS or none
  Register 77 pref GENERAL_REGS or none
  Register 78 pref GENERAL_REGS or none
  Register 79 pref GENERAL_REGS or none
  Register 80 pref INDEX_REGS, else GENERAL_REGS
  Register 81 pref GENERAL_REGS or none
  Register 82 pref GENERAL_REGS or none
  Register 83 pref GENERAL_REGS or none
  Register 84 pref GENERAL_REGS or none
  Register 85 pref GENERAL_REGS or none
  Register 86 pref GENERAL_REGS or none
  Register 87 pref INDEX_REGS, else GENERAL_REGS
  Register 88 pref GENERAL_REGS or none
  Register 89 pref GENERAL_REGS or none
  Register 90 pref GENERAL_REGS or none
  Register 91 pref GENERAL_REGS or none
  Register 92 pref FLOAT_INT_SSE_REGS or none
  Register 93 pref FLOAT_INT_SSE_REGS or none
  Register 94 pref GENERAL_REGS or none
  Register 95 pref FLOAT_INT_SSE_REGS or none
  Register 96 pref GENERAL_REGS or none
97 registers.

Register 58 used 4 times across 6 insns; set 3 times; pref AREG, else GENERAL_REGS.

Register 59 used 2 times across 2 insns in block 0; set 1 time; GENERAL_REGS or none; pointer.

Register 60 used 2 times across 3 insns in block 0; set 1 time; pref AREG, else GENERAL_REGS.

Register 61 used 2 times across 3 insns in block 0; set 1 time; pref AREG, else GENERAL_REGS.

Register 62 used 2 times across 3 insns in block 0; set 1 time; pref AREG, else GENERAL_REGS.

Register 63 used 2 times across 2 insns in block 0; set 1 time; pref AREG, else GENERAL_REGS.

Register 65 used 2 times across 2 insns in block 4; set 1 time; GENERAL_REGS or none.

Register 66 used 2 times across 2 insns in block 4; set 1 time; GENERAL_REGS or none; pointer.

Register 67 used 2 times across 2 insns in block 4; set 1 time; GENERAL_REGS or none; pointer.

Register 68 used 2 times across 2 insns in block 4; set 1 time; GENERAL_REGS or none; pointer.

Register 69 used 2 times across 2 insns in block 4; set 1 time; pref AREG, else GENERAL_REGS.

Register 70 used 2 times across 2 insns in block 5; set 1 time; GENERAL_REGS or none; pointer.

Register 72 used 2 times across 3 insns in block 6; set 1 time; pref INDEX_REGS, else GENERAL_REGS.

Register 73 used 2 times across 2 insns in block 6; set 1 time; GENERAL_REGS or none.

Register 74 used 2 times across 2 insns in block 6; set 1 time; pref INDEX_REGS, else GENERAL_REGS.

Register 75 used 2 times across 2 insns in block 6; set 1 time; GENERAL_REGS or none.

Register 76 used 2 times across 2 insns in block 6; set 1 time; GENERAL_REGS or none.

Register 77 used 2 times across 2 insns in block 8; set 1 time; GENERAL_REGS or none.

Register 78 used 3 times across 4 insns in block 10; set 1 time; GENERAL_REGS or none.

Register 79 used 6 times across 6 insns in block 10; set 3 times; GENERAL_REGS or none.

Register 80 used 2 times across 6 insns in block 10; set 1 time; pref INDEX_REGS, else GENERAL_REGS.

Register 81 used 2 times across 2 insns in block 10; set 1 time; GENERAL_REGS or none.

Register 82 used 2 times across 2 insns in block 10; set 1 time; GENERAL_REGS or none.

Register 83 used 2 times across 2 insns in block 10; set 1 time; GENERAL_REGS or none.

Register 84 used 2 times across 2 insns in block 10; set 1 time; GENERAL_REGS or none; pointer.

Register 85 used 3 times across 4 insns in block 10; set 1 time; GENERAL_REGS or none.

Register 86 used 6 times across 6 insns in block 10; set 3 times; GENERAL_REGS or none.

Register 87 used 2 times across 6 insns in block 10; set 1 time; pref INDEX_REGS, else GENERAL_REGS.

Register 88 used 2 times across 2 insns in block 10; set 1 time; GENERAL_REGS or none.

Register 89 used 2 times across 2 insns in block 10; set 1 time; GENERAL_REGS or none.

Register 90 used 2 times across 2 insns in block 10; set 1 time; GENERAL_REGS or none.

Register 91 used 2 times across 2 insns in block 10; set 1 time; GENERAL_REGS or none; pointer.

Register 94 used 3 times across 2 insns in block 6; set 1 time; GENERAL_REGS or none; pointer.

Register 96 used 3 times across 2 insns in block 10; set 1 time; GENERAL_REGS or none; pointer.

12 basic blocks, 17 edges.

Basic block 0: first insn 195, last 56, prev -1, next 1, loop_depth 0, count 0, freq 0.
Predecessors:  ENTRY (fallthru)
Successors:  1 (fallthru) 2
Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
Invalid sum of outgoing probabilities 0.0%

Basic block 1: first insn 196, last 66, prev 0, next 2, loop_depth 0, count 0, freq 0.
Predecessors:  0 (fallthru)
Successors:  13
Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame] 58
Invalid sum of outgoing probabilities 0.0%

Basic block 2: first insn 68, last 72, prev 1, next 3, loop_depth 0, count 0, freq 0.
Predecessors:  0
Successors:  3 (fallthru)
Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
Invalid sum of outgoing probabilities 0.0%

Basic block 3: first insn 74, last 76, prev 2, next 4, loop_depth 0, count 0, freq 0.
Predecessors:  6 2 (fallthru)
Successors:  4 (fallthru) 8
Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
Invalid sum of outgoing probabilities 0.0%

Basic block 4: first insn 199, last 102, prev 3, next 5, loop_depth 0, count 0, freq 0.
Predecessors:  3 (fallthru)
Successors:  5 (fallthru) 6
Registers live at start: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
Registers live at end: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
Invalid sum of outgoing probabilities 0.0%