📄 hardware.lst
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// initial subroutine. (H/W setting part)
//
// Ex: F_SACM_A2000_Initial:
// ...
// call F_SP_SACM_A2000_Init_ : S480/S240/MS01 is same
// ...
// retf
////////////////////////////////////////////////////////////////////////////////
F_SP_SACM_A2000_Init_:
000090D1 40 92 r1=0x0000; // 24MHz, Fcpu=Fosc
000090D2 19 D3 13 70 [P_SystemClock]=r1 // Frequency 20MHz
000090D4 70 92 r1 = 0x0030 // TimerA CKA=Fosc/2 CKB=1 Tout:off
000090D5 19 D3 0B 70 [P_TimerA_Ctrl] = r1 // Initial Timer A
000090D7 09 93 00 FD r1 = 0xfd00 // 16K
000090D9 19 D3 0A 70 [P_TimerA_Data] = r1
000090DB 09 93 A8 00 r1 = 0x00A8 // Set the DAC Ctrl
000090DD 19 D3 2A 70 [P_DAC_Ctrl] = r1
000090DF 09 93 FF FF r1 = 0xffff
000090E1 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
000090E3 40 92 r1 =0x0000 //
000090E4 11 93 F5 02 r1 = [R_InterruptStatus] //
000090E6 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
//R1 |= C_IRQ4_1KHz
000090E8 19 D3 F5 02 [R_InterruptStatus] = r1 //
000090EA 19 D3 10 70 [P_INT_Ctrl] = r1 //
000090EC 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_S480_Initial()
// or F_SACM_S480_Initial:
//////////////////////////////////////////////////////////////////
F_SP_SACM_S480_Init_:
000090ED 40 92 r1 = 0x0000 // 24MHz Fosc
000090EE 19 D3 13 70 [P_SystemClock]=r1 // Initial System Clock
000090F0 70 92 r1=0x0030 // TimerA CKA=Fosc/2 CKB=1 Tout:off
000090F1 19 D3 0B 70 [P_TimerA_Ctrl]=r1 // Initial Timer A
//R1 = 0xfd00 // 16K
000090F3 09 93 ED FC r1 = 0xfced // 15.625K
000090F5 19 D3 0A 70 [P_TimerA_Data]=r1
000090F7 09 93 A8 00 r1 = 0x00A8 //
000090F9 19 D3 2A 70 [P_DAC_Ctrl] = r1 //
000090FB 09 93 FF FF r1 = 0xffff
000090FD 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
000090FF 11 93 F5 02 R1 = [R_InterruptStatus] //
00009101 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
//R1 |= C_IRQ4_1KHz // Enable 1KHz IRQ4 for S480 decoder
00009103 19 D3 F5 02 [R_InterruptStatus] = r1 //
00009105 19 D3 10 70 [P_INT_Ctrl] = r1 //
00009107 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_S240_Initial()
// or F_SACM_S240_Initial:
//////////////////////////////////////////////////////////////////
F_SP_SACM_S240_Init_:
00009108 60 92 r1=0x0020;
00009109 19 D3 13 70 [P_SystemClock]=r1
0000910B 09 93 A8 00 r1 = 0x00A8; //
0000910D 19 D3 2A 70 [P_DAC_Ctrl]= r1
0000910F 70 92 r1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
00009110 19 D3 0B 70 [P_TimerA_Ctrl] = r1;
00009112 09 93 00 FE r1 = 0xfe00; // 24K
00009114 19 D3 0A 70 [P_TimerA_Data] = r1;
00009116 09 93 FF FF r1 = 0xffff
00009118 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
0000911A 11 93 F5 02 r1 = [R_InterruptStatus] //
0000911C 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
0000911E 19 D3 F5 02 [R_InterruptStatus] = r1 //
00009120 19 D3 10 70 [P_INT_Ctrl] = r1 //
00009122 90 9A RETF
//////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_MS01_Initial()
// or F_SACM_MS01_Initial:
//
// Ex: F_SACM_MS01_Initial:
// ...
// call F_SP_SACM_MS01_Init_
// call F_SP_Play_Mode0/1/2/3 ->0,1,2,3 depending on the para1
// ...
// retf
//////////////////////////////////////////////////////////////////
F_SP_SACM_MS01_Init_:
00009123 40 92 r1 = 0x0000; // 24MHz, Fcpu=Fosc
00009124 19 D3 13 70 [P_SystemClock] = r1; // Initial System Clock
00009126 70 92 r1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
00009127 19 D3 0B 70 [P_TimerA_Ctrl] = r1 // Initial Timer A
//R1 = 0x0003 // 8K
00009129 40 92 r1 = 0x0000 // Fosc/2
0000912A 19 D3 0D 70 [P_TimerB_Ctrl] = r1; // Initial Timer B -> 8192
//R1 = 0xFFFF
0000912C 09 93 00 FA r1 = 0xFA00 // Any time for ADPCM channel 0,1
0000912E 19 D3 0C 70 [P_TimerB_Data] = r1 // 8K sample rate
00009130 09 93 FF FF r1 = 0xffff
00009132 19 D3 11 70 [P_INT_Clear] = r1 // Clear interrupt occuiped events
00009134 90 9A RETF
//........................................
F_SP_PlayMode0_: // with F_SP_SACM_MS01_Initial
00009135 46 92 r1 = 0x0006
00009136 19 D3 2A 70 [P_DAC_Ctrl] = r1
00009138 09 93 00 FE r1 = 0xFE00
0000913A 19 D3 0A 70 [P_TimerA_Data] = r1 //
0000913C 11 93 F5 02 r1 = [R_InterruptStatus] //
0000913E 09 A3 10 84 r1 |= C_FIQ_PWM+C_IRQ2_TMB+C_IRQ4_1KHz
00009140 19 D3 F5 02 [R_InterruptStatus] = r1 //
00009142 19 D3 10 70 [P_INT_Ctrl] = r1 //
00009144 90 9A RETF
F_SP_PlayMode1_: // with F_SP_SACM_MS01_Initial
00009145 09 93 A8 00 r1 = 0x00A8
00009147 19 D3 2A 70 [P_DAC_Ctrl] = r1
00009149 09 93 00 FE r1 = 0xFE00
0000914B 19 D3 0A 70 [P_TimerA_Data] = r1 //
0000914D 11 93 F5 02 r1 = [R_InterruptStatus] //
0000914F 09 A3 10 24 r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
00009151 19 D3 F5 02 [R_InterruptStatus] = r1 //
00009153 19 D3 10 70 [P_INT_Ctrl] = r1 //
00009155 90 9A RETF
F_SP_PlayMode2_: // with F_SP_SACM_MS01_Initial
00009156 09 93 A8 00 r1 = 0x00A8
00009158 19 D3 2A 70 [P_DAC_Ctrl] = r1
0000915A 09 93 9A FD r1 = 0xFD9A
0000915C 19 D3 0A 70 [P_TimerA_Data] = r1 //
0000915E 11 93 F5 02 r1 = [R_InterruptStatus] //
00009160 09 A3 10 24 r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
00009162 19 D3 F5 02 [R_InterruptStatus] = r1 //
00009164 19 D3 10 70 [P_INT_Ctrl] = r1 //
00009166 90 9A RETF
F_SP_PlayMode3_: // with F_SP_SACM_MS01_Initial
00009167 09 93 A8 00 r1 = 0x00A8
00009169 19 D3 2A 70 [P_DAC_Ctrl] = r1
0000916B 09 93 00 FD r1 = 0xFD00
0000916D 19 D3 0A 70 [P_TimerA_Data] = r1 //
0000916F 11 93 F5 02 r1 = [R_InterruptStatus] //
00009171 09 A3 10 24 r1 |= C_FIQ_TMA+C_IRQ2_TMB+C_IRQ4_1KHz
00009173 19 D3 F5 02 [R_InterruptStatus] = r1 //
00009175 19 D3 10 70 [P_INT_Ctrl] = r1 //
00009177 90 9A RETF
///////////////////////////////////////////////////////////////////////////////
// Function: The partial code of hardware setting of SACM_MS01_Initial()
// or F_SACM_MS01_Initial:
//
// Ex: F_SACM_DVR_Initial:
// ...
// call F_SP_SACM_DVR_Init_
// call F_SP_Play_Mode0/1/2/3 ->0,1,2,3 depending on the para1
// ...
// retf
// Ex1:
// F_SACM_DVR_Record: (or F_SACM_DVR_InitEncoder)
// ...
// call F_SP_SACM_DVR_Rec_Init
// ...
// retf
// Ex2:
// F_SACM_DVR_Play: (or F_SACM_DVR_InitDecoder)
// ...
// call F_SP_SACM_DVR_Play_Init_
// ...
// retf
///////////////////////////////////////////////////////////////////////////////
F_SP_SACM_DVR_Init_:
00009178 40 92 r1 = 0x0000; // 24MHz, Fcpu=Fosc
00009179 19 D3 13 70 [P_SystemClock] = r1; // Frequency 20MHz
0000917B 70 92 r1 = 0x0030; // TimerA CKA=Fosc/2 CKB=1 Tout:off
0000917C 19 D3 0B 70 [P_TimerA_Ctrl] = r1;
0000917E 09 93 00 FA r1 = 0xfa00; // 8K @ 24.576MHz
//r1 = 0xfb1d; // 8K @ 20MHz
00009180 19 D3 0A 70 [P_TimerA_Data] = r1;
00009182 75 92 r1 = 0x0035; // ADINI should be open (107)
00009183 19 D3 15 70 [P_ADC_Ctrl] = r1;
00009185 09 93 A8 00 r1 = 0x00A8; // Set the DA Ctrl
00009187 19 D3 2A 70 [P_DAC_Ctrl] = r1;
00009189 09 93 FF FF r1 = 0xffff;
0000918B 19 D3 11 70 [P_INT_Clear] = r1; // Clear interrupt occuiped events
0000918D 11 93 F5 02 r1 = [R_InterruptStatus] //
0000918F 09 A3 00 20 r1 |= C_FIQ_TMA // Enable Timer A FIQ
00009191 19 D3 F5 02 [R_InterruptStatus] = r1 //
00009193 19 D3 10 70 [P_INT_Ctrl] = r1 //
00009195 90 9A RETF
F_SP_SACM_DVR_Rec_Init_: // call by SACM_DVR_Record / SACM_DVR_InitEncoder
00009196 75 92 r1 = 0x0035; //mic input
//r1 = 0x0037 //line_in input
00009197 19 D3 15 70 [P_ADC_Ctrl] = r1; //enable ADC
00009199 09 93 00 FE r1=0xfe00; //24K @ 24.576MHz
0000919B 19 D3 0A 70 [P_TimerA_Data] = r1
0000919D 90 9A RETF
F_SP_SACM_DVR_Play_Init_:
0000919E 40 92 r1 = 0x0000 // call by SACM_DVR_Stop / SACM_DVR_Play
0000919F 19 D3 15 70 [P_ADC_Ctrl] = r1; // Disable ADC
000091A1 09 93 00 FD r1 = 0xfd00; // 16K @ 24.576MHz
000091A3 19 D3 0A 70 [P_TimerA_Data] = r1;
000091A5 90 9A RETF
///////////////////////////////////////////////////////////////////////////////
// Function: Extra Functions provided by Sunplus
// Type:
// 1. DAC Ramp up/down
// 2. IO config/import/export
// 3. Get resource data
//
//
///////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////
// Function: Ramp Up/Down to avoid speaker "pow" noise
// Destory: R1,R2
////////////////////////////////////////////////////////
_SP_RampUpDAC1: .PROC
F_SP_RampUpDAC1:
000091A6 90 D4 push r1,r2 to [sp]
000091A7 11 93 17 70 r1=[P_DAC1]
000091A9 09 B3 C0 FF r1 &= ~0x003f
000091AB 09 43 00 80 cmp r1,0x8000
000091AD 0E 0E jb L_RU_NormalUp
000091AE 19 5E je L_RU_End
L_RU_DownLoop:
000091AF 40 F0 12 92 call F_Delay
000091B1 41 94 r2 = 0x0001
000091B2 1A D5 12 70 [P_Watchdog_Clear] = r2
000091B4 09 23 40 00 r1 -= 0x40
000091B6 19 D3 17 70 [P_DAC1] = r1
000091B8 09 43 00 80 cmp r1,0x8000
000091BA 4C 4E jne L_RU_DownLoop
L_RD_DownEnd:
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