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📄 ofdm1.mdl

📁 该链路仿真了OFDM系统在克服瑞丽多径衰落的影响中性能
💻 MDL
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	  }
	  HDLCActiveTab		  "0"
	}
	PropName		"Components"
      }
      Name		      "Configuration"
      CurrentDlgPage	      "Solver"
    }
    PropName		    "ConfigurationSets"
  }
  Simulink.ConfigSet {
    $PropName		    "ActiveConfigurationSet"
    $ObjectID		    1
  }
  BlockDefaults {
    Orientation		    "right"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    NamePlacement	    "normal"
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    ShowName		    on
  }
  BlockParameterDefaults {
    Block {
      BlockType		      DataTypeConversion
      OutMin		      "[]"
      OutMax		      "[]"
      OutDataTypeMode	      "Inherit via back propagation"
      OutDataType	      "fixdt(1,16,0)"
      OutScaling	      "[]"
      OutDataTypeStr	      "Inherit: Inherit via back propagation"
      LockScale		      off
      ConvertRealWorld	      "Real World Value (RWV)"
      RndMeth		      "Zero"
      SaturateOnIntegerOverflow	on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Display
      Format		      "short"
      Decimation	      "10"
      Floating		      off
      SampleTime	      "-1"
    }
    Block {
      BlockType		      EnablePort
      StatesWhenEnabling      "held"
      ShowOutputPort	      off
      ZeroCross		      on
    }
    Block {
      BlockType		      From
      IconDisplay	      "Tag"
      TagVisibility	      "local"
    }
    Block {
      BlockType		      Gain
      Gain		      "1"
      Multiplication	      "Element-wise(K.*u)"
      ParamMin		      "[]"
      ParamMax		      "[]"
      ParameterDataTypeMode   "Same as input"
      ParameterDataType	      "fixdt(1,16,0)"
      ParameterScalingMode    "Best Precision: Matrix-wise"
      ParameterScaling	      "[]"
      ParamDataTypeStr	      "Inherit: Same as input"
      OutMin		      "[]"
      OutMax		      "[]"
      OutDataTypeMode	      "Same as input"
      OutDataType	      "fixdt(1,16,0)"
      OutScaling	      "[]"
      OutDataTypeStr	      "Inherit: Same as input"
      LockScale		      off
      RndMeth		      "Floor"
      SaturateOnIntegerOverflow	on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Goto
      IconDisplay	      "Tag"
    }
    Block {
      BlockType		      Ground
    }
    Block {
      BlockType		      Inport
      Port		      "1"
      UseBusObject	      off
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      OutMin		      "[]"
      OutMax		      "[]"
      DataType		      "auto"
      OutDataType	      "fixdt(1,16,0)"
      OutScaling	      "[]"
      OutDataTypeStr	      "Inherit: auto"
      SignalType	      "auto"
      SamplingMode	      "auto"
      LatchByDelayingOutsideSignal off
      LatchByCopyingInsideSignal off
      Interpolate	      on
    }
    Block {
      BlockType		      Logic
      Operator		      "AND"
      Inputs		      "2"
      IconShape		      "rectangular"
      AllPortsSameDT	      on
      OutDataTypeMode	      "Logical (see Configuration Parameters: Optimization)"
      LogicDataType	      "uint(8)"
      OutDataTypeStr	      "Inherit: Logical (see Configuration Parameters: Optimization)"
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Math
      Operator		      "exp"
      OutputSignalType	      "auto"
      SampleTime	      "-1"
      OutMin		      "[]"
      OutMax		      "[]"
      OutDataTypeMode	      "Same as first input"
      OutDataType	      "fixdt(1,16,0)"
      OutScaling	      "[]"
      OutDataTypeStr	      "Inherit: Same as first input"
      LockScale		      off
      RndMeth		      "Floor"
      SaturateOnIntegerOverflow	on
    }
    Block {
      BlockType		      Outport
      Port		      "1"
      UseBusObject	      off
      BusObject		      "BusObject"
      BusOutputAsStruct	      off
      PortDimensions	      "-1"
      SampleTime	      "-1"
      OutMin		      "[]"
      OutMax		      "[]"
      DataType		      "auto"
      OutDataType	      "fixdt(1,16,0)"
      OutScaling	      "[]"
      OutDataTypeStr	      "Inherit: auto"
      SignalType	      "auto"
      SamplingMode	      "auto"
      OutputWhenDisabled      "held"
      InitialOutput	      "[]"
    }
    Block {
      BlockType		      Product
      Inputs		      "2"
      Multiplication	      "Element-wise(.*)"
      CollapseMode	      "All dimensions"
      CollapseDim	      "1"
      InputSameDT	      on
      OutMin		      "[]"
      OutMax		      "[]"
      OutDataTypeMode	      "Same as first input"
      OutDataType	      "fixdt(1,16,0)"
      OutScaling	      "[]"
      OutDataTypeStr	      "Inherit: Same as first input"
      LockScale		      off
      RndMeth		      "Zero"
      SaturateOnIntegerOverflow	on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      Selector
      NumberOfDimensions      "1"
      IndexMode		      "One-based"
      InputPortWidth	      "-1"
      SampleTime	      "-1"
    }
    Block {
      BlockType		      "S-Function"
      FunctionName	      "system"
      SFunctionModules	      "''"
      PortCounts	      "[]"
      SFunctionDeploymentMode off
    }
    Block {
      BlockType		      SubSystem
      ShowPortLabels	      "FromPortIcon"
      Permissions	      "ReadWrite"
      PermitHierarchicalResolution "All"
      TreatAsAtomicUnit	      off
      CheckFcnCallInpInsideContextMsg off
      SystemSampleTime	      "-1"
      RTWFcnNameOpts	      "Auto"
      RTWFileNameOpts	      "Auto"
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      SimViewingDevice	      off
      DataTypeOverride	      "UseLocalSettings"
      MinMaxOverflowLogging   "UseLocalSettings"
    }
    Block {
      BlockType		      Sum
      IconShape		      "rectangular"
      Inputs		      "++"
      CollapseMode	      "All dimensions"
      CollapseDim	      "1"
      InputSameDT	      on
      AccumDataTypeStr	      "Inherit: Inherit via internal rule"
      OutMin		      "[]"
      OutMax		      "[]"
      OutDataTypeMode	      "Same as first input"
      OutDataType	      "fixdt(1,16,0)"
      OutScaling	      "[]"
      OutDataTypeStr	      "Inherit: Same as first input"
      LockScale		      off
      RndMeth		      "Floor"
      SaturateOnIntegerOverflow	on
      SampleTime	      "-1"
    }
    Block {
      BlockType		      ToWorkspace
      VariableName	      "simulink_output"
      MaxDataPoints	      "1000"
      Decimation	      "1"
      SampleTime	      "0"
      FixptAsFi		      off
    }
    Block {
      BlockType		      Terminator
    }
    Block {
      BlockType		      Concatenate
      NumInputs		      "2"
      ConcatenateDimension    "1"
    }
    Block {
      BlockType		      FrameConversion
      InheritSamplingMode     off
      OutFrame		      "Frame-based"
    }
    Block {
      BlockType		      Reshape
      OutputDimensionality    "1-D array"
      OutputDimensions	      "[1,1]"
    }
    Block {
      BlockType		      Constant
      Value		      "1"
      VectorParams1D	      on
      SamplingMode	      "Sample based"
      OutMin		      "[]"
      OutMax		      "[]"
      OutDataTypeMode	      "Inherit from 'Constant value'"
      OutDataType	      "fixdt(1,16,0)"
      ConRadixGroup	      "Use specified scaling"
      OutScaling	      "[]"
      OutDataTypeStr	      "Inherit: Inherit from 'Constant value'"
      SampleTime	      "inf"
      FramePeriod	      "inf"
    }
    Block {
      BlockType		      RelationalOperator
      Operator		      ">="
      InputSameDT	      on
      LogicOutDataTypeMode    "Logical (see Configuration Parameters: Optimization)"
      LogicDataType	      "uint(8)"
      OutDataTypeStr	      "Inherit: Logical (see Configuration Parameters: Optimization)"
      ZeroCross		      on
      SampleTime	      "-1"
    }
  }
  AnnotationDefaults {
    HorizontalAlignment	    "center"
    VerticalAlignment	    "middle"
    ForegroundColor	    "black"
    BackgroundColor	    "white"
    DropShadow		    off
    FontName		    "Helvetica"
    FontSize		    10
    FontWeight		    "normal"
    FontAngle		    "normal"
    UseDisplayTextAsClickCallback off
  }
  LineDefaults {
    FontName		    "Helvetica"
    FontSize		    9
    FontWeight		    "normal"
    FontAngle		    "normal"
  }
  System {
    Name		    "OFDM1"
    Location		    [2, 79, 1014, 713]
    Open		    on
    ModelBrowserVisibility  off
    ModelBrowserWidth	    200
    ScreenColor		    "white"
    PaperOrientation	    "landscape"
    PaperPositionMode	    "auto"
    PaperType		    "A4"
    PaperUnits		    "centimeters"
    TiledPaperMargins	    [0.500000, 0.500000, 0.500000, 0.500000]
    TiledPageScale	    1
    ShowPageBoundaries	    off
    ZoomFactor		    "100"
    ReportName		    "simulink-default.rpt"
    Block {
      BlockType		      Reference
      Name		      "AWGN\nChannel"
      Ports		      [1, 1]
      Position		      [490, 227, 570, 273]
      NamePlacement	      "alternate"
      ShowName		      off
      SourceBlock	      "commchan3/AWGN\nChannel"
      SourceType	      "AWGN Channel"
      ShowPortLabels	      "FromPortIcon"
      SystemSampleTime	      "-1"
      FunctionWithSeparateData off
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      seed		      "54321"
      noiseMode		      "Signal to noise ratio  (SNR)"
      EbNodB		      "10"
      EsNodB		      "EbNodB+10*log10(log2(M))"
      SNRdB		      "20"
      bitsPerSym	      "1"
      Ps		      "1"
      Tsym		      "Tsym"
      variance		      "10^(-0.1*15)/(2048*2)"
    }
    Block {
      BlockType		      Reference
      Name		      "Bit data stream"
      Ports		      [0, 1]
      Position		      [15, 228, 95, 272]
      DialogController	      "commDDGCreate"
      DialogControllerArgs    "DataTag0"
      SourceBlock	      "commrandsrc2/Bernoulli Binary\nGenerator"
      SourceType	      "Bernoulli Binary Generator"
      ShowPortLabels	      "FromPortIcon"
      SystemSampleTime	      "-1"
      FunctionWithSeparateData off
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      P			      "0.5"
      seed		      "435345"
      Ts		      "0.25*2264/2048*0.5e-7"
      frameBased	      on
      sampPerFrame	      "2048*4"
      orient		      off
      outDataType	      "double"
    }
    Block {
      BlockType		      Reference
      Name		      "Bit data stream1"
      Ports		      [0, 1]
      Position		      [930, 153, 1010, 197]
      DialogController	      "commDDGCreate"
      DialogControllerArgs    "DataTag1"
      SourceBlock	      "commrandsrc2/Bernoulli Binary\nGenerator"
      SourceType	      "Bernoulli Binary Generator"
      ShowPortLabels	      "FromPortIcon"
      SystemSampleTime	      "-1"
      FunctionWithSeparateData off
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      P			      "0.5"
      seed		      "435345"
      Ts		      "0.25*2264/2048*0.5e-7"
      frameBased	      on
      sampPerFrame	      "2048*4"
      orient		      off
      outDataType	      "double"
    }
    Block {
      BlockType		      Reference
      Name		      "Bit data stream2"
      Ports		      [0, 1]
      Position		      [80, 453, 160, 497]
      DialogController	      "commDDGCreate"
      DialogControllerArgs    "DataTag2"
      SourceBlock	      "commrandsrc2/Bernoulli Binary\nGenerator"
      SourceType	      "Bernoulli Binary Generator"
      ShowPortLabels	      "FromPortIcon"
      SystemSampleTime	      "-1"
      FunctionWithSeparateData off
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      P			      "0"
      seed		      "435345"
      Ts		      "2264/2048*0.5e-7"
      frameBased	      on
      sampPerFrame	      "1024*2"
      orient		      off
      outDataType	      "double"
    }
    Block {
      BlockType		      Display
      Name		      "Display"
      Ports		      [1]
      Position		      [1235, 201, 1325, 279]
      Decimation	      "1"
      Lockdown		      off
    }
    Block {
      BlockType		      Display
      Name		      "Display7"
      Ports		      [1]
      Position		      [1285, 375, 1370, 445]
      Decimation	      "1"
      Lockdown		      off
    }
    Block {
      BlockType		      Product
      Name		      "Divide"
      Ports		      [2, 1]
      Position		      [775, 211, 830, 364]
      Inputs		      "*/"
      InputSameDT	      off
      OutDataTypeMode	      "Inherit via internal rule"
      OutDataType	      "sfix(16)"
      OutScaling	      "2^-10"
      OutDataTypeStr	      "Inherit: Inherit via internal rule"
      RndMeth		      "Floor"
      SaturateOnIntegerOverflow	off
    }
    Block {
      BlockType		      Reference
      Name		      "Error Rate\nCalculation"
      Ports		      [2, 1]
      Position		      [1105, 212, 1180, 263]
      SourceBlock	      "commsink2/Error Rate\nCalculation"
      SourceType	      "Error Rate Calculation"
      N			      "0"
      st_delay		      "0"
      cp_mode		      "Entire frame"
      subframe		      "[]"
      PMode		      "Port"
      WsName		      "ErrorVec"
      RsMode2		      off
      stop		      off
      numErr		      "100"
      maxBits		      "1e6"
    }
    Block {
      BlockType		      Reference
      Name		      "Find Delay"
      Ports		      [2, 1]
      Position		      [1190, 388, 1270, 432]
      SourceBlock	      "commutil2/Find Delay"
      SourceType	      "Find Delay"
      ShowPortLabels	      "FromPortIcon"
      SystemSampleTime	      "-1"
      FunctionWithSeparateData off
      RTWMemSecFuncInitTerm   "Inherit from model"
      RTWMemSecFuncExecute    "Inherit from model"
      RTWMemSecDataConstants  "Inherit from model"
      RTWMemSecDataInternal   "Inherit from model"
      RTWMemSecDataParameters "Inherit from model"
      corrLength	      "200"
      chgSigOP		      off
      stopUpdate	      off
      numConstDelay	      "3"
    }
    Block {
      BlockType		      Reference
      Name		      "Multipath Rayleigh\nFading Channel1"
      Ports		      [1, 1]
      Position		      [350, 221, 445, 279]
      SourceBlock	      "commchan3/Multipath Rayleigh\nFading Channel"
      SourceType	      "Multipath Rayleigh Fading Channel"
      ShowPortLabels	      "FromPortIcon"
      SystemSampleTime	      "-1"
      FunctionWithSeparateData off
      RTWMemSecFuncInitTerm   "Inherit from model"

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