dss_cisr.c

DSP6000,bios APPLICATIONS 源码程序

/*
 *  Copyright 2000 by Texas Instruments Incorporated.
 *  All rights reserved. Property of Texas Instruments Incorporated.
 *  Restricted rights to use, duplicate or disclose this code are
 *  granted through contract.
 *  U.S. Patent Nos. 5,283,900  5,392,448
 */
/* "@(#) DSP/BIOS 4.00 03-27-00 (barracuda-e08)" */
/*
 *  ======== dss_cisr.c ========
 */

#include <std.h>

#include <dss.h>

#define DEBUG 0

#if DEBUG
#include <clk.h>
#include <log.h>
extern LOG_Obj debug;
#endif

#if defined (_50_)

static Uns *drr = (Uns *) 0x20; /* Buffered SP Data Read  Register */
static Uns *dxr = (Uns *) 0x21; /* Buffered SP Data Write Register */

#define DRR     *drr
#define DXR     *dxr

#elif defined (_54_)

/* '#define BSP 1' (or pass -DBSP=1) to use buffered serial port */
#define BSP 1
#if BSP == 1    /* Use Buffered Serial Port (or Serial Port 0) */
static Uns *drr = (Uns *) 0x20; /* Buffered SP Data Read  Register */
static Uns *dxr = (Uns *) 0x21; /* Buffered SP Data Write Register */
#else
static Uns *drr = (Uns *) 0x30; /* Synchronous SP Data Read  Register */
static Uns *dxr = (Uns *) 0x31; /* Synchronous SP Data Write Register */
#endif

#define DRR     *drr
#define DXR     *dxr


#elif defined (_29_)

volatile ioport Uns portFFF0;

#define DRR portFFF0
#define DXR portFFF0

#elif defined (_62_)

#define SERIAL_PORT  0          /* define McBSP Serial Port ID: 0 or 1 */

#if SERIAL_PORT == 0
static Uns *drr = (Uns *) 0x018c0000; /* McBSP 0 Data Receive Register */
static Uns *dxr = (Uns *) 0x018c0004; /* McBSP 0 Data Transmit Register */
#else
static Uns *drr = (Uns *) 0x01900000; /* McBSP 1 Data Receive Register */
static Uns *dxr = (Uns *) 0x01900004; /* McBSP 1 Data Transmit Register */
#endif

#define DRR     *drr
#define DXR     *dxr

extern void DSS_rxPrime(void);
extern void DSS_txPrime(void);

#endif

/*
 *  ======== DSS_cisr ========
 */
void DSS_cisr(void)
{
    volatile int dummy;
    int rxDone = 0;
    int txDone = 0;

#if DEBUG
    dummy = CLK_gethtime();
    LOG_event(&debug,dummy,0,0);
#if defined (_62_)
    DXR = DRR;                  /* copy data right back out */
#else
    DXR = (DRR & 0xfffe);       /* copy data right back out */
#endif
    return;
#endif

    if (DSS_rxCnt) {
        *DSS_rxPtr++ = DRR;
        DSS_rxCnt--;
        if (DSS_rxCnt == 0) {
            rxDone = 1;
        }
    }
    else {
        dummy = DRR;
        DSS_error |= 0x1;
    }

    if (DSS_txCnt) {
#if defined (_62_)
        DXR = *DSS_txPtr++;
#else
        DXR = *DSS_txPtr++ & 0xfffe;
#endif
        DSS_txCnt--;
        if (DSS_txCnt == 0) {
            txDone = 1;
        }
    }
    else {
        DXR = 0;
        DSS_error |= 0x2;
    }

    if ((rxDone | txDone) == 0) {
        return;         /* rete */
    }

    if (rxDone) {
        /*
         * don't have to set writerSize or writerAddr
         * since we only provide "full" frames and these
         * fields are already set.
         */
        PIP_put(&DSS_rxPipe);

        DSS_rxPrime();
    }

    if (txDone) {
        /*
         * don't have to set readerSize or readerAddr
         * since they're already set.
         */
        PIP_free(&DSS_txPipe);

        DSS_txPrime();
    }
}