readme.txt

DSP6000,bios APPLICATIONS 源码程序

Step by step instructions on how to flash the DSP/BIOS audio example
onto a 6211 DSK with CCS 1.2. This should give a good roadmap for ROMing
of DSP/BIOS programs in general.

Copyright Texas Instruments 2000. Texas Instruments proprietary data,
internal data.

2/14/2001
Jack Greenbaum and Alec Bellanca, TI Santa Barbara
[e-mail], [e-mail]

1) Load the DSP/BIOS configuration used for loading through CCS and make
the following changes. This example uses rombios.cdb from this
directory.

A) Select ROM Autoinit model in global settings. 

B) Add memory sections -- two for flash and one for the 6211 internal
sram. We could use two for internal, one for the 1k boot section and
then the remaining 63k, but no need to for this example. In fact this
example enables level 2 cache as part of the normal DSP/BIOS startup.

FLASH_BOOT 
	comment: Section of DSK flash which is loaded into IRAM by chip reset
	base: 0x90000000
	no heap
	len: 0x400
	space: code/data

FLASH_REST
	comment: Rest of DSK flash
	base: 0x90000400
	no heap
	len: 0xfc00
	space: code/data

IRAM
	comment: 6211 internal SRAM block (usually used as L2 cache)
	base: 0x0
	no heap
	len: 0x10000
	space: code/data

C) Turn off "Reuse startup code space" in MEM manager, then move
.sysinit to FLASH. "Reuse starup code space" only makes sense when
.sysinit is in a mem section with a heap.

2) Save the .cdb, then hand edit the cfg.cmd file.

The sections below are to be loaded into ROM then copied into RAM. Each of
them must have their entry in the DSP/BIOS generated linker command file
changed to reflect this placement.

  .bios
  .rtdx_text (c5xxx only)
  .text
  .hwi_vec
  .switch
  .trcinit

Search for each of these section in the cfg.cmd file. Change the ">
SDRAM" to "load = FLASH_REST, run = SDRAM". Be careful to leave the align
directive after the "run = SDRAM" for .hwi_vec.

These sections below may be left in rom. They are data tables and startup code. 
Change their location from > SDRAM to > FLASH_REST. Note that some of these
can be placed in FLASH from the MEM manager.

  .const
  .sysinit
  .gblinit
  .cinit
  .pinit

3) Write custom boot code. The very first instructions run after chip
reset must configure the EMIF, copy the appropriate sections from FLASH
to SDRAM, then jump to the program entry point. The file boot.asm
included in this directory does that. You will need to edit the table of
sections to copy, see below.

4) Build a custom linker command file to handle placement of the boot
code. boot.asm must be placed in the first 1K for flash so that it get's
copied to IRAM after chip reset. As well this linker command file must
include the DSP/BIOS generated and edited file to complete the
placement. rombios.cmd in this directory is a working example.

5) Build and link. rombios.mak in this directory is the CCS project file
for this example.

6) Edit the "copy table" in boot.asm to match the placement. The copy
routine in boot.asm uses a table of section locations and sizes to know
where to copy from FLASH into where in SDRAM. These locations are found
in the linker map file. For example, in my build the line for .text is:

.text      0    90001880    00003240     RUN ADDR = 80002800

The 0x90001880 is the load address, 0x3240 is the length, and 0x80002800
is the run address. You need to plug these values into the table at the
bottom of boot.asm for each of the sections to be copied to ram.


7) Rebuild to assemble the correct values into boot.obj. None of the
other objects change, and the size of boot.obj does not change, so
nothing will move.

8) Build the .hex file for the flash programmer. Use the hex.cmd file
in this directory as the input file for the hex6x utility.

9) Program the flash with the 6211 DSK flash programming utility. See
c:\ti\c6000\examples\dsk\flash for details. Note that you will first
need to exit CCS to release the jtag port.

10) Hit reset. You *should* be hearing sound now!