msim.scr

another 8051 core porocesssor vhdl source code

#!/bin/csh -f
# msim.scr - simulator script for VHDL simulation of M8051
#
########################################################################

set SRC_DIR = "../rtl"
set TEST = "func1"
set CODE_DIR = "../../assembler/deliverable"
set LIS_DIR = lis
set NET_DIR = "../gates/synop"
set RUNTIME = "742400 ns"

# Deal with command Line arguments
foreach OPTION ($argv)
  switch ($OPTION)
    case -g:
      set gates
      breaksw
    case -c:
      set ngui_mode
      breaksw
    default:
      echo "${0}: Unknown option ${OPTION}"
      exit 1
  endsw
end

# Create a listing repository if it does not already exist
if (!(-d ${LIS_DIR})) mkdir ${LIS_DIR}

# Re-create modelsim working directory
if (-e work) rm -r work
vlib work

if ($?gates) then
  # Compile the netlist
  vcom -nologo -skip a ${NET_DIR}/m8051.vhd
  vcom -nologo -just a ${NET_DIR}/m8051.vhd
  set VSIM_OPTIONS = "-t ns -noglitch -L vhd_lib -sdftyp /U2=${NET_DIR}/m8051.sdf"
  set TYPE = gate
else
  # Compile the core RTL modules into the library work.
  vcom ${SRC_DIR}/m3s001bo.vhd \
       ${SRC_DIR}/m3s002bo.vhd \
       ${SRC_DIR}/m3s005bo.vhd \
       ${SRC_DIR}/m3s006bo.vhd \
       ${SRC_DIR}/m3s007bo.vhd \
       ${SRC_DIR}/m3s009bo.vhd \
       ${SRC_DIR}/m3s013bo.vhd \
       ${SRC_DIR}/m3s014bo.vhd \
       ${SRC_DIR}/m3s018bo.vhd \
       ${SRC_DIR}/m3s019bo.vhd \
       ${SRC_DIR}/m3s022bo.vhd \
       ${SRC_DIR}/m3s023bo.vhd \
       ${SRC_DIR}/m3s024bo.vhd \
       ${SRC_DIR}/m3s025bo.vhd \
       ${SRC_DIR}/m3s027bo.vhd \
       ${SRC_DIR}/m3s029bo.vhd \
       ${SRC_DIR}/m3s030bo.vhd \
       ${SRC_DIR}/m3s031bo.vhd \
       ${SRC_DIR}/m3s032bo.vhd \
       ${SRC_DIR}/m3s033bo.vhd \
       ${SRC_DIR}/m3s034bo.vhd \
       ${SRC_DIR}/m3s035bo.vhd \
       ${SRC_DIR}/m3s039bo.vhd \
       ${SRC_DIR}/m3s040bo.vhd \
       ${SRC_DIR}/m3s041bo.vhd \
       ${SRC_DIR}/m3s003bo.vhd \
       ${SRC_DIR}/m3s004bo.vhd \
       ${SRC_DIR}/m3s008bo.vhd \
       ${SRC_DIR}/m3s011bo.vhd \
       ${SRC_DIR}/m3s016bo.vhd \
       ${SRC_DIR}/m3s020bo.vhd \
       ${SRC_DIR}/m3s028bo.vhd \
       ${SRC_DIR}/m3s010bo.vhd \
       ${SRC_DIR}/m3s015bo.vhd \
       ${SRC_DIR}/m8051.vhd

  set VSIM_OPTIONS = "-t ns"
  set TYPE = rtl
endif

# Compile the Testbench
vcom ./speed.vhd \
     ./tbs_dec.vhd \
     ./io_buffer.vhd \
     ./rom.vhd \
     ./ram.vhd \
     ./m8051_tb.vhd

# Link the assembler code
rm -f default_rom.hex
ln -s ${CODE_DIR}/${TEST}.hex default_rom.hex

# Run the simulation
if ($?ngui_mode) then
  vsim m8051_tb_e -c ${VSIM_OPTIONS} -do "run ${RUNTIME}; quit" | \
  tee ./msim_${TYPE}.log
else
  vsim m8051_tb_e ${VSIM_OPTIONS} -do "do wave.do; run ${RUNTIME}; quit" | \
  tee ./msim_${TYPE}.log
endif