hier_scan.scr

another 8051 core porocesssor vhdl source code

/* This script is to add scan chains into the design and generate ATPG vectors*/
/* Date    3rd June 1996.  */
/* Modified on 1th July 1998 */
/* Modified on 15th October 1999 */

/*set scan parameters and check design for test insertion suitability*/

read -format db m8051.db

current_design "m8051"
remove_attribute find(design) dont_touch

remove_attribute umc18_slow/DFFQS* dont_use
remove_attribute umc18_slow/DFFS* dont_use

set_test_methodology full_scan
set_scan_style multiplexed_flip_flop

set_min_fault_coverage 99

check_test -verbose > chk_scan.rpt

/* insert multiple scan chains. */

insert_scan

set_input_delay -clock "NX1" 1 {"test_se" "test_si1" "test_si2"}
set_input_delay -clock "NX2" 1 {"test_se" "test_si1" "test_si2"}

/* incremental compile after scan insertion and create vectors */
compile -incremental_mapping

create_test_patterns -compaction_effort med -random_pattern_failure_limit 128 -backtrack_effort medium

/*output scanned design*/

vhdlout_architecture_name = SCAN
write -format db -hierarchy -out m8051_scan.db

write_test -out ../../gates/synop/test_vectors

/* Report on the netlist as modified by scan chain insertion */
report_constraints -verbose > scan_constraint_rpt
report_constraints -all_violators > scan_violation_all.rpt
report_constraints -all_violators -verbose > scan_violation.verb_rpt
report_timing -path full -delay max -max_paths 1 -nworst 1 > scan_timing.rpt
report_area > scan_area.rpt

/* Report on fault coverage */
report_test -coverage -atpg_conflicts -constraints -port > scan.rpt
report_test -fault -class untested > scan_faults.rpt
report_test -fault -class abandoned >> scan_faults.rpt

quit