m3s041bo.vhd

another 8051 core porocesssor vhdl source code

--*******************************************************************       --
--IMPORTANT NOTICE                                                          --
--================                                                          --
--Copyright Mentor Graphics Corporation 1996 - 1999.  All rights reserved.  --
--This file and associated deliverables are the trade secrets,              --
--confidential information and copyrighted works of Mentor Graphics         --
--Corporation and its licensors and are subject to your license agreement   --
--with Mentor Graphics Corporation.                                         --
--                                                                          --
--Use of these deliverables for the purpose of making silicon from an IC    --
--design is limited to the terms and conditions of your license agreement   --
--with Mentor Graphics If you have further questions please contact Mentor  --
--Graphics Customer Support.                                                --
--                                                                          --
--This Mentor Graphics core (m8051 v1999.120) was extracted on              --
--workstation hostid _hostid_ Inventra                                      --
--M8051 ALU Carry Combiner Element
--Copyright Mentor Graphics Corporation and Licensors 1998. All Rights reserved.
--v1.001
--*********************************************************************
--@(#)m3s041bo.vhd	1.2 04/08/99 SCCS Version Control

--File	        :       m3s041bo.vhd
--Created on    :       25th March 1997
--Purpose       :       Gate Level ALU Carry Combiner/Look Ahead Element
--Version       :       1.001
--Mod Date      :       2nd April 1998
--Mod History	:       1.001 _e suffix removed from entity names.
--
--*********************************************************************
--Hierarchy record      :
--Called by             :m3s004bo.vhd
--Calls to              :None
--*********************************************************************
library IEEE;

use IEEE.std_logic_1164.all;
library WORK;

--*********************************************************************
--Entity Definition
--*********************************************************************

entity m3s041bo is 
--*******************************************************************       --
--IMPORTANT NOTICE                                                          --
--================                                                          --
--Copyright Mentor Graphics Corporation 1996 - 1999.  All rights reserved.  --
--This file and associated deliverables are the trade secrets,              --
--confidential information and copyrighted works of Mentor Graphics         --
--Corporation and its licensors and are subject to your license agreement   --
--with Mentor Graphics Corporation.                                         --
--                                                                          --
--Use of these deliverables for the purpose of making silicon from an IC    --
--design is limited to the terms and conditions of your license agreement   --
--with Mentor Graphics If you have further questions please contact Mentor  --
--Graphics Customer Support.                                                --
--                                                                          --
--This Mentor Graphics core (m8051 v1999.120) was extracted on              --
--workstation hostid _hostid_ Inventra                                      --
       port(S:    out std_logic_vector(3 downto 0);
            P:    in  std_logic_vector(3 downto 0);
            G:    in  std_logic_vector(2 downto 0);
            C_IN: in  std_logic;
            C_EN: in  std_logic 
            );
end m3s041bo;
--*********************************************************************
--Architecture definition
--*********************************************************************
architecture m3s041bo_rtl of m3s041bo is
--*********************************************************************
begin
-- This module combines ALU product/propagate (P) and carry/generate (G)
-- bits to produce carry corrected result (S) of a 4-bit ALU operation
-- (a carry look ahead generator).  It is instantiated separately from
-- the ALU in order to prevent naive synthesis algorithms from producing
-- slow ripple carry implementations of this function.

process(P, G, C_IN, C_EN)
begin
   S(0) <= P(0) xor     C_IN;
   S(1) <= P(1) xor ( ( C_IN and P(0) ) or
                      ( C_EN and G(0) ) );
   S(2) <= P(2) xor ( ( C_IN and P(0) and P(1) ) or
                      ( C_EN and P(1) and G(0) ) or
                      ( C_EN and G(1) ) );
   S(3) <= P(3) xor ( ( C_IN and P(0) and P(1) and P(2) ) or
                      ( C_EN and P(1) and P(2) and G(0) ) or
                      ( C_EN and P(2) and G(1) ) or
                      ( C_EN and G(2) ) );
end process;
--*********************************************************************
end m3s041bo_rtl;
--*********************************************************************